; ModuleID = 'bug.3a1fbbbh-cgu.0'
source_filename = "bug.3a1fbbbh-cgu.0"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"core::option::Option<u128>::Some" = type { [1 x i64], i128, [0 x i64] }
%"[closure@bug.rs:10:23: 10:66]" = type {}
%"[closure@bug.rs:7:14: 9:10]" = type {}
%"core::ops::RangeFull" = type {}
%"core::panic::PanicInfo" = type { [0 x i64], { {}*, [3 x i64]* }, [0 x i64], i64*, [0 x i64], %"core::panic::Location"*, [0 x i64] }
%"core::panic::Location" = type { [0 x i64], { [0 x i8]*, i64 }, [0 x i32], i32, [0 x i32], i32, [0 x i32] }

; core::slice::<impl [T]>::get
; Function Attrs: inlinehint nounwind nonlazybind
define internal { i8*, i64 } @"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$3get17hf6b80a671874953fE"([0 x i8]* noalias nonnull readonly align 1 %self.0, i64 %self.1) unnamed_addr #0 {
start:
; call <core::ops::range::RangeFull as core::slice::index::SliceIndex<[T]>>::get
  %0 = call { i8*, i64 } @"_ZN97_$LT$core..ops..range..RangeFull$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$3get17h74c2e2bb7245d0f5E"([0 x i8]* noalias nonnull readonly align 1 %self.0, i64 %self.1)
  %1 = extractvalue { i8*, i64 } %0, 0
  %2 = extractvalue { i8*, i64 } %0, 1
  br label %bb1

bb1:                                              ; preds = %start
  %3 = insertvalue { i8*, i64 } undef, i8* %1, 0
  %4 = insertvalue { i8*, i64 } %3, i64 %2, 1
  ret { i8*, i64 } %4
}

; core::option::Option<T>::map
; Function Attrs: inlinehint nounwind nonlazybind
define internal { i64, i128 } @"_ZN4core6option15Option$LT$T$GT$3map17hc9e7ddb66f602558E"(i8* noalias readonly align 1 %0, i64 %1) unnamed_addr #0 personality i32 (...)* @rust_eh_personality {
start:
  %2 = alloca { i8*, i32 }, align 8
  %_9 = alloca i8, align 1
  %_7 = alloca { i8*, i64 }, align 8
  %3 = alloca { i64, i128 }, align 8
  %self = alloca { i8*, i64 }, align 8
  %4 = getelementptr inbounds { i8*, i64 }, { i8*, i64 }* %self, i32 0, i32 0
  store i8* %0, i8** %4, align 8
  %5 = getelementptr inbounds { i8*, i64 }, { i8*, i64 }* %self, i32 0, i32 1
  store i64 %1, i64* %5, align 8
  store i8 0, i8* %_9, align 1
  store i8 1, i8* %_9, align 1
  %6 = bitcast { i8*, i64 }* %self to {}**
  %7 = load {}*, {}** %6, align 8
  %8 = icmp eq {}* %7, null
  %_3 = select i1 %8, i64 0, i64 1
  switch i64 %_3, label %bb2 [
    i64 0, label %bb1
    i64 1, label %bb3
  ]

bb1:                                              ; preds = %start
  %9 = bitcast { i64, i128 }* %3 to i64*
  store i64 0, i64* %9, align 8
  br label %bb8

bb2:                                              ; preds = %start
  unreachable

bb3:                                              ; preds = %start
  %10 = bitcast { i8*, i64 }* %self to { [0 x i8]*, i64 }*
  %11 = getelementptr inbounds { [0 x i8]*, i64 }, { [0 x i8]*, i64 }* %10, i32 0, i32 0
  %x.0 = load [0 x i8]*, [0 x i8]** %11, align 8, !nonnull !2
  %12 = getelementptr inbounds { [0 x i8]*, i64 }, { [0 x i8]*, i64 }* %10, i32 0, i32 1
  %x.1 = load i64, i64* %12, align 8
  store i8 0, i8* %_9, align 1
  %13 = bitcast { i8*, i64 }* %_7 to { [0 x i8]*, i64 }*
  %14 = getelementptr inbounds { [0 x i8]*, i64 }, { [0 x i8]*, i64 }* %13, i32 0, i32 0
  store [0 x i8]* %x.0, [0 x i8]** %14, align 8
  %15 = getelementptr inbounds { [0 x i8]*, i64 }, { [0 x i8]*, i64 }* %13, i32 0, i32 1
  store i64 %x.1, i64* %15, align 8
  %16 = getelementptr inbounds { i8*, i64 }, { i8*, i64 }* %_7, i32 0, i32 0
  %17 = load i8*, i8** %16, align 8, !nonnull !2
  %18 = getelementptr inbounds { i8*, i64 }, { i8*, i64 }* %_7, i32 0, i32 1
  %19 = load i64, i64* %18, align 8
  %20 = bitcast i8* %17 to [0 x i8]*
; call bug::do_error::{{closure}}
  %_5 = call i128 @"_ZN3bug8do_error28_$u7b$$u7b$closure$u7d$$u7d$17hdffd4f29f96c1d1cE"([0 x i8]* noalias nonnull readonly align 1 %20, i64 %19)
  br label %bb4

bb4:                                              ; preds = %bb3
  %21 = bitcast { i64, i128 }* %3 to %"core::option::Option<u128>::Some"*
  %22 = getelementptr inbounds %"core::option::Option<u128>::Some", %"core::option::Option<u128>::Some"* %21, i32 0, i32 1
  store i128 %_5, i128* %22, align 8
  %23 = bitcast { i64, i128 }* %3 to i64*
  store i64 1, i64* %23, align 8
  br label %bb8

bb5:                                              ; preds = %bb7, %bb8
  %24 = getelementptr inbounds { i64, i128 }, { i64, i128 }* %3, i32 0, i32 0
  %25 = load i64, i64* %24, align 8, !range !3
  %26 = getelementptr inbounds { i64, i128 }, { i64, i128 }* %3, i32 0, i32 1
  %27 = load i128, i128* %26, align 8
  %28 = insertvalue { i64, i128 } undef, i64 %25, 0
  %29 = insertvalue { i64, i128 } %28, i128 %27, 1
  ret { i64, i128 } %29

bb6:                                              ; No predecessors!
  %30 = bitcast { i8*, i32 }* %2 to i8**
  %31 = load i8*, i8** %30, align 8
  %32 = getelementptr inbounds { i8*, i32 }, { i8*, i32 }* %2, i32 0, i32 1
  %33 = load i32, i32* %32, align 8
  %34 = insertvalue { i8*, i32 } undef, i8* %31, 0
  %35 = insertvalue { i8*, i32 } %34, i32 %33, 1
  resume { i8*, i32 } %35

bb7:                                              ; preds = %bb8
  store i8 0, i8* %_9, align 1
  br label %bb5

bb8:                                              ; preds = %bb1, %bb4
  %36 = load i8, i8* %_9, align 1, !range !4
  %37 = trunc i8 %36 to i1
  br i1 %37, label %bb7, label %bb5
}

; core::option::Option<T>::map_or
; Function Attrs: inlinehint nounwind nonlazybind
define internal zeroext i1 @"_ZN4core6option15Option$LT$T$GT$6map_or17h48ae1869fe2e3ca4E"(i64 %0, i128 %1, i1 zeroext %default) unnamed_addr #0 personality i32 (...)* @rust_eh_personality {
start:
  %2 = alloca { i8*, i32 }, align 8
  %_10 = alloca i8, align 1
  %_9 = alloca i8, align 1
  %_7 = alloca i128, align 8
  %3 = alloca i8, align 1
  %self = alloca { i64, i128 }, align 8
  %4 = getelementptr inbounds { i64, i128 }, { i64, i128 }* %self, i32 0, i32 0
  store i64 %0, i64* %4, align 8
  %5 = getelementptr inbounds { i64, i128 }, { i64, i128 }* %self, i32 0, i32 1
  store i128 %1, i128* %5, align 8
  store i8 0, i8* %_9, align 1
  store i8 0, i8* %_10, align 1
  store i8 1, i8* %_9, align 1
  store i8 1, i8* %_10, align 1
  %6 = bitcast { i64, i128 }* %self to i64*
  %_4 = load i64, i64* %6, align 8, !range !3
  switch i64 %_4, label %bb2 [
    i64 0, label %bb1
    i64 1, label %bb3
  ]

bb1:                                              ; preds = %start
  store i8 0, i8* %_9, align 1
  %7 = zext i1 %default to i8
  store i8 %7, i8* %3, align 1
  br label %bb11

bb2:                                              ; preds = %start
  unreachable

bb3:                                              ; preds = %start
  %8 = bitcast { i64, i128 }* %self to %"core::option::Option<u128>::Some"*
  %9 = getelementptr inbounds %"core::option::Option<u128>::Some", %"core::option::Option<u128>::Some"* %8, i32 0, i32 1
  %t = load i128, i128* %9, align 8
  store i8 0, i8* %_10, align 1
  store i128 %t, i128* %_7, align 8
  %10 = load i128, i128* %_7, align 8
; call bug::do_error::{{closure}}
  %11 = call zeroext i1 @"_ZN3bug8do_error28_$u7b$$u7b$closure$u7d$$u7d$17h76e843e5ed8c9d1eE"(i128 %10)
  %12 = zext i1 %11 to i8
  store i8 %12, i8* %3, align 1
  br label %bb5

bb4:                                              ; preds = %bb8, %bb9
  %13 = bitcast { i8*, i32 }* %2 to i8**
  %14 = load i8*, i8** %13, align 8
  %15 = getelementptr inbounds { i8*, i32 }, { i8*, i32 }* %2, i32 0, i32 1
  %16 = load i32, i32* %15, align 8
  %17 = insertvalue { i8*, i32 } undef, i8* %14, 0
  %18 = insertvalue { i8*, i32 } %17, i32 %16, 1
  resume { i8*, i32 } %18

bb5:                                              ; preds = %bb3
  br label %bb11

bb6:                                              ; preds = %bb10, %bb11
  %19 = load i8, i8* %_9, align 1, !range !4
  %20 = trunc i8 %19 to i1
  br i1 %20, label %bb12, label %bb7

bb7:                                              ; preds = %bb12, %bb6
  %21 = load i8, i8* %3, align 1, !range !4
  %22 = trunc i8 %21 to i1
  ret i1 %22

bb8:                                              ; preds = %bb9
  store i8 0, i8* %_9, align 1
  br label %bb4

bb9:                                              ; No predecessors!
  %23 = load i8, i8* %_9, align 1, !range !4
  %24 = trunc i8 %23 to i1
  br i1 %24, label %bb8, label %bb4

bb10:                                             ; preds = %bb11
  store i8 0, i8* %_10, align 1
  br label %bb6

bb11:                                             ; preds = %bb1, %bb5
  %25 = load i8, i8* %_10, align 1, !range !4
  %26 = trunc i8 %25 to i1
  br i1 %26, label %bb10, label %bb6

bb12:                                             ; preds = %bb6
  store i8 0, i8* %_9, align 1
  br label %bb7
}

; <core::ops::range::RangeFull as core::slice::index::SliceIndex<[T]>>::get
; Function Attrs: inlinehint nounwind nonlazybind
define internal { i8*, i64 } @"_ZN97_$LT$core..ops..range..RangeFull$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$3get17h74c2e2bb7245d0f5E"([0 x i8]* noalias nonnull readonly align 1 %slice.0, i64 %slice.1) unnamed_addr #0 {
start:
  %0 = alloca { i8*, i64 }, align 8
  %1 = bitcast { i8*, i64 }* %0 to { [0 x i8]*, i64 }*
  %2 = getelementptr inbounds { [0 x i8]*, i64 }, { [0 x i8]*, i64 }* %1, i32 0, i32 0
  store [0 x i8]* %slice.0, [0 x i8]** %2, align 8
  %3 = getelementptr inbounds { [0 x i8]*, i64 }, { [0 x i8]*, i64 }* %1, i32 0, i32 1
  store i64 %slice.1, i64* %3, align 8
  %4 = getelementptr inbounds { i8*, i64 }, { i8*, i64 }* %0, i32 0, i32 0
  %5 = load i8*, i8** %4, align 8
  %6 = getelementptr inbounds { i8*, i64 }, { i8*, i64 }* %0, i32 0, i32 1
  %7 = load i64, i64* %6, align 8
  %8 = insertvalue { i8*, i64 } undef, i8* %5, 0
  %9 = insertvalue { i8*, i64 } %8, i64 %7, 1
  ret { i8*, i64 } %9
}

; Function Attrs: nounwind nonlazybind
define i32 @do_error() unnamed_addr #1 {
start:
  %_10 = alloca %"[closure@bug.rs:10:23: 10:66]", align 1
  %_9 = alloca %"[closure@bug.rs:7:14: 9:10]", align 1
  %_8 = alloca %"core::ops::RangeFull", align 1
  %buf = alloca [0 x i8], align 1
; call core::slice::<impl [T]>::get
  %0 = call { i8*, i64 } @"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$3get17hf6b80a671874953fE"([0 x i8]* noalias nonnull readonly align 1 %buf, i64 0)
  %_4.0 = extractvalue { i8*, i64 } %0, 0
  %_4.1 = extractvalue { i8*, i64 } %0, 1
  br label %bb1

bb1:                                              ; preds = %start
; call core::option::Option<T>::map
  %1 = call { i64, i128 } @"_ZN4core6option15Option$LT$T$GT$3map17hc9e7ddb66f602558E"(i8* noalias readonly align 1 %_4.0, i64 %_4.1)
  %_3.0 = extractvalue { i64, i128 } %1, 0
  %_3.1 = extractvalue { i64, i128 } %1, 1
  br label %bb2

bb2:                                              ; preds = %bb1
; call core::option::Option<T>::map_or
  %_2 = call zeroext i1 @"_ZN4core6option15Option$LT$T$GT$6map_or17h48ae1869fe2e3ca4E"(i64 %_3.0, i128 %_3.1, i1 zeroext true)
  br label %bb3

bb3:                                              ; preds = %bb2
  %2 = icmp ule i1 %_2, true
  call void @llvm.assume(i1 %2)
  %3 = zext i1 %_2 to i32
  ret i32 %3
}

; bug::do_error::{{closure}}
; Function Attrs: nounwind nonlazybind
define internal i128 @"_ZN3bug8do_error28_$u7b$$u7b$closure$u7d$$u7d$17hdffd4f29f96c1d1cE"([0 x i8]* noalias nonnull readonly align 1 %_src.0, i64 %_src.1) unnamed_addr #1 {
start:
  ret i128 1339673755198158349046276780029383958
}

; bug::do_error::{{closure}}
; Function Attrs: nounwind nonlazybind
define internal zeroext i1 @"_ZN3bug8do_error28_$u7b$$u7b$closure$u7d$$u7d$17h76e843e5ed8c9d1eE"(i128 %x) unnamed_addr #1 {
start:
  %0 = icmp eq i128 %x, 1339673755198158349046276780029383958
  ret i1 %0
}

; Function Attrs: noreturn nounwind nonlazybind
define hidden void @rust_begin_unwind(%"core::panic::PanicInfo"* noalias readonly align 8 dereferenceable(32) %_panic) unnamed_addr #2 {
start:
  br label %bb1

bb1:                                              ; preds = %bb1, %start
  br label %bb1
}

; Function Attrs: nonlazybind
declare i32 @rust_eh_personality(...) unnamed_addr #3

; Function Attrs: nounwind willreturn
declare void @llvm.assume(i1) #4

attributes #0 = { inlinehint nounwind nonlazybind "target-cpu"="x86-64" "target-features"="+lvi-cfi" }
attributes #1 = { nounwind nonlazybind "target-cpu"="x86-64" }
attributes #2 = { noreturn nounwind nonlazybind "target-cpu"="x86-64" }
attributes #3 = { nonlazybind "target-cpu"="x86-64" }
attributes #4 = { nounwind willreturn }

!llvm.module.flags = !{!0, !1}

!0 = !{i32 7, !"PIC Level", i32 2}
!1 = !{i32 2, !"RtLibUseGOT", i32 1}
!2 = !{}
!3 = !{i64 0, i64 2}
!4 = !{i8 0, i8 2}