From 8eba29ac1015e989e6ba96ff17a75d548afde7ff Mon Sep 17 00:00:00 2001
From: Askar Safin <safinaskar@mail.ru>
Date: Sat, 8 Feb 2025 07:23:11 +0300
Subject: [PATCH] rustc_middle: parallel: TyCtxt: remove "unsafe impl
 DynSend/DynSync"

We don't need to "short circuit trait resolution", because DynSend and DynSync are auto traits and thus coinductive
---
 compiler/rustc_middle/src/ty/context.rs | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/compiler/rustc_middle/src/ty/context.rs b/compiler/rustc_middle/src/ty/context.rs
index c6fc5f98f56f2..3cd66d4f190c3 100644
--- a/compiler/rustc_middle/src/ty/context.rs
+++ b/compiler/rustc_middle/src/ty/context.rs
@@ -1290,9 +1290,6 @@ pub struct TyCtxt<'tcx> {
     gcx: &'tcx GlobalCtxt<'tcx>,
 }
 
-// Explicitly implement `DynSync` and `DynSend` for `TyCtxt` to short circuit trait resolution.
-unsafe impl DynSend for TyCtxt<'_> {}
-unsafe impl DynSync for TyCtxt<'_> {}
 fn _assert_tcx_fields() {
     sync::assert_dyn_sync::<&'_ GlobalCtxt<'_>>();
     sync::assert_dyn_send::<&'_ GlobalCtxt<'_>>();