From 6f40f0cdab5f978f8fc59035abd731017ab2e04b Mon Sep 17 00:00:00 2001 From: Tsukasa OI Date: Wed, 2 Apr 2025 01:13:40 +0000 Subject: [PATCH] rustc_target: RISC-V: add base "I"-related important extensions Of ratified RISC-V features defined, this commit adds extensions satisfying following criteria: * Formerly a part of the "I" extension and splitted thereafter (now ratified as "I" + "Zifencei" + "Zicsr" + "Zicntr" + "Zihpm") or * Dicoverable from newer versions of the Linux kernel and implemented as a part of std_detect's feature ("Zihintpause"). This is based on the latest ratified ISA Manuals (version 20240411). Additional (1): One of those, "Zicsr", is a dependency of many other ISA extensions and this commit adds correct dependencies to "Zicsr". Additional (2): In RISC-V, "G" is an abbreviation of following extensions: * "I" * "M" * "A" * "F" * "D" * "Zicsr" (although implied by "F") * "Zifencei" and all RISC-V targets with the "G" abbreviation and targets for Android / VxWorks are updated accordingly. Note: Android will require RVA22 (likely RVA22U64) and some more extensions, which is a superset of RV64GC. For VxWorks, all BSPs currently distributed by Wind River are for boards with RV64GC (this commit also updates riscv32-wrs-vxworks though). --- .../src/spec/targets/riscv32_wrs_vxworks.rs | 2 +- .../src/spec/targets/riscv32gc_unknown_linux_gnu.rs | 2 +- .../spec/targets/riscv32gc_unknown_linux_musl.rs | 2 +- .../src/spec/targets/riscv64_linux_android.rs | 2 +- .../src/spec/targets/riscv64_wrs_vxworks.rs | 2 +- .../src/spec/targets/riscv64gc_unknown_freebsd.rs | 2 +- .../src/spec/targets/riscv64gc_unknown_fuchsia.rs | 2 +- .../src/spec/targets/riscv64gc_unknown_hermit.rs | 2 +- .../src/spec/targets/riscv64gc_unknown_linux_gnu.rs | 2 +- .../spec/targets/riscv64gc_unknown_linux_musl.rs | 2 +- .../src/spec/targets/riscv64gc_unknown_netbsd.rs | 2 +- .../src/spec/targets/riscv64gc_unknown_none_elf.rs | 2 +- .../src/spec/targets/riscv64gc_unknown_nuttx_elf.rs | 2 +- .../src/spec/targets/riscv64gc_unknown_openbsd.rs | 2 +- compiler/rustc_target/src/target_features.rs | 13 +++++++++---- tests/ui/check-cfg/target_feature.stderr | 5 +++++ 16 files changed, 28 insertions(+), 18 deletions(-) diff --git a/compiler/rustc_target/src/spec/targets/riscv32_wrs_vxworks.rs b/compiler/rustc_target/src/spec/targets/riscv32_wrs_vxworks.rs index 8a4bc58e546e8..efc17d8d083b7 100644 --- a/compiler/rustc_target/src/spec/targets/riscv32_wrs_vxworks.rs +++ b/compiler/rustc_target/src/spec/targets/riscv32_wrs_vxworks.rs @@ -16,7 +16,7 @@ pub(crate) fn target() -> Target { cpu: "generic-rv32".into(), llvm_abiname: "ilp32d".into(), max_atomic_width: Some(32), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), stack_probes: StackProbeType::Inline, ..base::vxworks::opts() }, diff --git a/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_gnu.rs index 6dda346aaaf56..5b7feef70d099 100644 --- a/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_gnu.rs +++ b/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_gnu.rs @@ -17,7 +17,7 @@ pub(crate) fn target() -> Target { options: TargetOptions { code_model: Some(CodeModel::Medium), cpu: "generic-rv32".into(), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), llvm_abiname: "ilp32d".into(), max_atomic_width: Some(32), supported_split_debuginfo: Cow::Borrowed(&[SplitDebuginfo::Off]), diff --git a/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_musl.rs index ba10e3c688184..938b39b10c64e 100644 --- a/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_musl.rs +++ b/compiler/rustc_target/src/spec/targets/riscv32gc_unknown_linux_musl.rs @@ -19,7 +19,7 @@ pub(crate) fn target() -> Target { options: TargetOptions { code_model: Some(CodeModel::Medium), cpu: "generic-rv32".into(), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), llvm_abiname: "ilp32d".into(), max_atomic_width: Some(32), supported_split_debuginfo: Cow::Borrowed(&[SplitDebuginfo::Off]), diff --git a/compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs b/compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs index c8ef737b9e73b..9f02ed4bcbe9f 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64_linux_android.rs @@ -19,7 +19,7 @@ pub(crate) fn target() -> Target { options: TargetOptions { code_model: Some(CodeModel::Medium), cpu: "generic-rv64".into(), - features: "+m,+a,+f,+d,+c,+zba,+zbb,+zbs,+v".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei,+zba,+zbb,+zbs,+v".into(), llvm_abiname: "lp64d".into(), supported_sanitizers: SanitizerSet::ADDRESS, max_atomic_width: Some(64), diff --git a/compiler/rustc_target/src/spec/targets/riscv64_wrs_vxworks.rs b/compiler/rustc_target/src/spec/targets/riscv64_wrs_vxworks.rs index 39aa70035e4a7..8d8c21952de5f 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64_wrs_vxworks.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64_wrs_vxworks.rs @@ -16,7 +16,7 @@ pub(crate) fn target() -> Target { cpu: "generic-rv64".into(), llvm_abiname: "lp64d".into(), max_atomic_width: Some(64), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), stack_probes: StackProbeType::Inline, ..base::vxworks::opts() }, diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_freebsd.rs index ecf6567753111..e628095b88a6d 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_freebsd.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_freebsd.rs @@ -15,7 +15,7 @@ pub(crate) fn target() -> Target { options: TargetOptions { code_model: Some(CodeModel::Medium), cpu: "generic-rv64".into(), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), llvm_abiname: "lp64d".into(), max_atomic_width: Some(64), ..base::freebsd::opts() diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs index e260237ca7764..c4466e13d1439 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs @@ -4,7 +4,7 @@ pub(crate) fn target() -> Target { let mut base = base::fuchsia::opts(); base.code_model = Some(CodeModel::Medium); base.cpu = "generic-rv64".into(); - base.features = "+m,+a,+f,+d,+c".into(); + base.features = "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(); base.llvm_abiname = "lp64d".into(); base.max_atomic_width = Some(64); base.stack_probes = StackProbeType::Inline; diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_hermit.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_hermit.rs index 88b5dca284ae9..5c15bdd9f6454 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_hermit.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_hermit.rs @@ -14,7 +14,7 @@ pub(crate) fn target() -> Target { data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), options: TargetOptions { cpu: "generic-rv64".into(), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), relocation_model: RelocModel::Pic, code_model: Some(CodeModel::Medium), tls_model: TlsModel::LocalExec, diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_gnu.rs index 8ffb622511db0..af2f42fa00a2f 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_gnu.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_gnu.rs @@ -17,7 +17,7 @@ pub(crate) fn target() -> Target { options: TargetOptions { code_model: Some(CodeModel::Medium), cpu: "generic-rv64".into(), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), llvm_abiname: "lp64d".into(), max_atomic_width: Some(64), supported_split_debuginfo: Cow::Borrowed(&[SplitDebuginfo::Off]), diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_musl.rs index 33b08fdcb0510..70c19952af063 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_musl.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_linux_musl.rs @@ -17,7 +17,7 @@ pub(crate) fn target() -> Target { options: TargetOptions { code_model: Some(CodeModel::Medium), cpu: "generic-rv64".into(), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), llvm_abiname: "lp64d".into(), max_atomic_width: Some(64), supported_split_debuginfo: Cow::Borrowed(&[SplitDebuginfo::Off]), diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_netbsd.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_netbsd.rs index 2b647e36f18a8..1f359d1e7fe6d 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_netbsd.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_netbsd.rs @@ -15,7 +15,7 @@ pub(crate) fn target() -> Target { options: TargetOptions { code_model: Some(CodeModel::Medium), cpu: "generic-rv64".into(), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), llvm_abiname: "lp64d".into(), max_atomic_width: Some(64), mcount: "__mcount".into(), diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_none_elf.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_none_elf.rs index d6f0a5499b99c..5a5aad93efba1 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_none_elf.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_none_elf.rs @@ -22,7 +22,7 @@ pub(crate) fn target() -> Target { llvm_abiname: "lp64d".into(), cpu: "generic-rv64".into(), max_atomic_width: Some(64), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), panic_strategy: PanicStrategy::Abort, relocation_model: RelocModel::Static, code_model: Some(CodeModel::Medium), diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_nuttx_elf.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_nuttx_elf.rs index bc6829897a423..e8abc926dd0ed 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_nuttx_elf.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_nuttx_elf.rs @@ -24,7 +24,7 @@ pub(crate) fn target() -> Target { llvm_abiname: "lp64d".into(), cpu: "generic-rv64".into(), max_atomic_width: Some(64), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), panic_strategy: PanicStrategy::Abort, relocation_model: RelocModel::Static, code_model: Some(CodeModel::Medium), diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_openbsd.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_openbsd.rs index 75f508d8e933b..85d7dfe7865ed 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_openbsd.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_openbsd.rs @@ -15,7 +15,7 @@ pub(crate) fn target() -> Target { options: TargetOptions { code_model: Some(CodeModel::Medium), cpu: "generic-rv64".into(), - features: "+m,+a,+f,+d,+c".into(), + features: "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(), llvm_abiname: "lp64d".into(), max_atomic_width: Some(64), ..base::openbsd::opts() diff --git a/compiler/rustc_target/src/target_features.rs b/compiler/rustc_target/src/target_features.rs index 0e6523f0880e8..b32ea903adf87 100644 --- a/compiler/rustc_target/src/target_features.rs +++ b/compiler/rustc_target/src/target_features.rs @@ -488,7 +488,7 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[ ("c", Stable, &[]), ("d", Unstable(sym::riscv_target_feature), &["f"]), ("e", Unstable(sym::riscv_target_feature), &[]), - ("f", Unstable(sym::riscv_target_feature), &[]), + ("f", Unstable(sym::riscv_target_feature), &["zicsr"]), ( "forced-atomics", Stability::Forbidden { reason: "unsound because it changes the ABI of atomic operations" }, @@ -517,15 +517,20 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[ ("zdinx", Unstable(sym::riscv_target_feature), &["zfinx"]), ("zfh", Unstable(sym::riscv_target_feature), &["zfhmin"]), ("zfhmin", Unstable(sym::riscv_target_feature), &["f"]), - ("zfinx", Unstable(sym::riscv_target_feature), &[]), + ("zfinx", Unstable(sym::riscv_target_feature), &["zicsr"]), ("zhinx", Unstable(sym::riscv_target_feature), &["zhinxmin"]), ("zhinxmin", Unstable(sym::riscv_target_feature), &["zfinx"]), + ("zicntr", Unstable(sym::riscv_target_feature), &["zicsr"]), + ("zicsr", Unstable(sym::riscv_target_feature), &[]), + ("zifencei", Unstable(sym::riscv_target_feature), &[]), + ("zihintpause", Unstable(sym::riscv_target_feature), &[]), + ("zihpm", Unstable(sym::riscv_target_feature), &["zicsr"]), ("zk", Stable, &["zkn", "zkr", "zkt"]), ("zkn", Stable, &["zbkb", "zbkc", "zbkx", "zkne", "zknd", "zknh"]), ("zknd", Stable, &[]), ("zkne", Stable, &[]), ("zknh", Stable, &[]), - ("zkr", Stable, &[]), + ("zkr", Stable, &["zicsr"]), ("zks", Stable, &["zbkb", "zbkc", "zbkx", "zksed", "zksh"]), ("zksed", Stable, &[]), ("zksh", Stable, &[]), @@ -533,7 +538,7 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[ ("zvbb", Unstable(sym::riscv_target_feature), &["zvkb"]), ("zvbc", Unstable(sym::riscv_target_feature), &["zve64x"]), ("zve32f", Unstable(sym::riscv_target_feature), &["zve32x", "f"]), - ("zve32x", Unstable(sym::riscv_target_feature), &["zvl32b"]), + ("zve32x", Unstable(sym::riscv_target_feature), &["zvl32b", "zicsr"]), ("zve64d", Unstable(sym::riscv_target_feature), &["zve64f", "d"]), ("zve64f", Unstable(sym::riscv_target_feature), &["zve32f", "zve64x"]), ("zve64x", Unstable(sym::riscv_target_feature), &["zve32x", "zvl64b"]), diff --git a/tests/ui/check-cfg/target_feature.stderr b/tests/ui/check-cfg/target_feature.stderr index e23984dc59584..26900318ca336 100644 --- a/tests/ui/check-cfg/target_feature.stderr +++ b/tests/ui/check-cfg/target_feature.stderr @@ -318,6 +318,11 @@ LL | cfg!(target_feature = "_UNEXPECTED_VALUE"); `zfinx` `zhinx` `zhinxmin` +`zicntr` +`zicsr` +`zifencei` +`zihintpause` +`zihpm` `zk` `zkn` `zknd`