diff --git a/compiler/rustc_codegen_llvm/src/abi.rs b/compiler/rustc_codegen_llvm/src/abi.rs index 7105933815138..8294e29d07df6 100644 --- a/compiler/rustc_codegen_llvm/src/abi.rs +++ b/compiler/rustc_codegen_llvm/src/abi.rs @@ -17,14 +17,13 @@ use rustc_target::callconv::{ use rustc_target::spec::SanitizerSet; use smallvec::SmallVec; -use crate::attributes::llfn_attrs_from_instance; +use crate::attributes::{self, llfn_attrs_from_instance}; use crate::builder::Builder; use crate::context::CodegenCx; use crate::llvm::{self, Attribute, AttributePlace}; use crate::type_::Type; use crate::type_of::LayoutLlvmExt; use crate::value::Value; -use crate::{attributes, llvm_util}; trait ArgAttributesExt { fn apply_attrs_to_llfn(&self, idx: AttributePlace, cx: &CodegenCx<'_, '_>, llfn: &Value); @@ -437,7 +436,6 @@ impl<'ll, 'tcx> FnAbiLlvmExt<'ll, 'tcx> for FnAbi<'tcx, Ty<'tcx>> { let apply_range_attr = |idx: AttributePlace, scalar: rustc_abi::Scalar| { if cx.sess().opts.optimize != config::OptLevel::No - && llvm_util::get_version() >= (19, 0, 0) && matches!(scalar.primitive(), Primitive::Int(..)) // If the value is a boolean, the range is 0..2 and that ultimately // become 0..0 when the type becomes i1, which would be rejected @@ -571,19 +569,6 @@ impl<'ll, 'tcx> FnAbiLlvmExt<'ll, 'tcx> for FnAbi<'tcx, Ty<'tcx>> { } _ => {} } - if bx.cx.sess().opts.optimize != config::OptLevel::No - && llvm_util::get_version() < (19, 0, 0) - && let BackendRepr::Scalar(scalar) = self.ret.layout.backend_repr - && matches!(scalar.primitive(), Primitive::Int(..)) - // If the value is a boolean, the range is 0..2 and that ultimately - // become 0..0 when the type becomes i1, which would be rejected - // by the LLVM verifier. - && !scalar.is_bool() - // LLVM also rejects full range. - && !scalar.is_always_valid(bx) - { - bx.range_metadata(callsite, scalar.valid_range(bx)); - } for arg in self.args.iter() { match &arg.mode { PassMode::Ignore => {} diff --git a/compiler/rustc_codegen_llvm/src/attributes.rs b/compiler/rustc_codegen_llvm/src/attributes.rs index 3d7afa17bdf3d..e8c42d16733ec 100644 --- a/compiler/rustc_codegen_llvm/src/attributes.rs +++ b/compiler/rustc_codegen_llvm/src/attributes.rs @@ -407,30 +407,28 @@ pub(crate) fn llfn_attrs_from_instance<'ll, 'tcx>( // Do not set sanitizer attributes for naked functions. to_add.extend(sanitize_attrs(cx, codegen_fn_attrs.no_sanitize)); - if llvm_util::get_version() >= (19, 0, 0) { - // For non-naked functions, set branch protection attributes on aarch64. - if let Some(BranchProtection { bti, pac_ret }) = - cx.sess().opts.unstable_opts.branch_protection - { - assert!(cx.sess().target.arch == "aarch64"); - if bti { - to_add.push(llvm::CreateAttrString(cx.llcx, "branch-target-enforcement")); - } - if let Some(PacRet { leaf, pc, key }) = pac_ret { - if pc { - to_add.push(llvm::CreateAttrString(cx.llcx, "branch-protection-pauth-lr")); - } - to_add.push(llvm::CreateAttrStringValue( - cx.llcx, - "sign-return-address", - if leaf { "all" } else { "non-leaf" }, - )); - to_add.push(llvm::CreateAttrStringValue( - cx.llcx, - "sign-return-address-key", - if key == PAuthKey::A { "a_key" } else { "b_key" }, - )); + // For non-naked functions, set branch protection attributes on aarch64. + if let Some(BranchProtection { bti, pac_ret }) = + cx.sess().opts.unstable_opts.branch_protection + { + assert!(cx.sess().target.arch == "aarch64"); + if bti { + to_add.push(llvm::CreateAttrString(cx.llcx, "branch-target-enforcement")); + } + if let Some(PacRet { leaf, pc, key }) = pac_ret { + if pc { + to_add.push(llvm::CreateAttrString(cx.llcx, "branch-protection-pauth-lr")); } + to_add.push(llvm::CreateAttrStringValue( + cx.llcx, + "sign-return-address", + if leaf { "all" } else { "non-leaf" }, + )); + to_add.push(llvm::CreateAttrStringValue( + cx.llcx, + "sign-return-address-key", + if key == PAuthKey::A { "a_key" } else { "b_key" }, + )); } } } @@ -510,12 +508,6 @@ pub(crate) fn llfn_attrs_from_instance<'ll, 'tcx>( InstructionSetAttr::ArmA32 => "-thumb-mode".to_string(), InstructionSetAttr::ArmT32 => "+thumb-mode".to_string(), })) - // HACK: LLVM versions 19+ do not have the FPMR feature and treat it as always enabled - // It only exists as a feature in LLVM 18, cannot be passed down for any other version - .chain(match &*cx.tcx.sess.target.arch { - "aarch64" if llvm_util::get_version().0 == 18 => vec!["+fpmr".to_string()], - _ => vec![], - }) .collect::>(); if cx.tcx.sess.target.is_like_wasm { diff --git a/compiler/rustc_codegen_llvm/src/builder.rs b/compiler/rustc_codegen_llvm/src/builder.rs index 297f104d124ad..35134e9f5a050 100644 --- a/compiler/rustc_codegen_llvm/src/builder.rs +++ b/compiler/rustc_codegen_llvm/src/builder.rs @@ -30,6 +30,7 @@ use smallvec::SmallVec; use tracing::{debug, instrument}; use crate::abi::FnAbiLlvmExt; +use crate::attributes; use crate::common::Funclet; use crate::context::{CodegenCx, FullCx, GenericCx, SCx}; use crate::llvm::{ @@ -38,7 +39,6 @@ use crate::llvm::{ use crate::type_::Type; use crate::type_of::LayoutLlvmExt; use crate::value::Value; -use crate::{attributes, llvm_util}; #[must_use] pub(crate) struct GenericBuilder<'a, 'll, CX: Borrow>> { @@ -927,11 +927,9 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> { debug_assert_ne!(self.val_ty(val), dest_ty); let trunc = self.trunc(val, dest_ty); - if llvm_util::get_version() >= (19, 0, 0) { - unsafe { - if llvm::LLVMIsAInstruction(trunc).is_some() { - llvm::LLVMSetNUW(trunc, True); - } + unsafe { + if llvm::LLVMIsAInstruction(trunc).is_some() { + llvm::LLVMSetNUW(trunc, True); } } trunc @@ -941,11 +939,9 @@ impl<'a, 'll, 'tcx> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> { debug_assert_ne!(self.val_ty(val), dest_ty); let trunc = self.trunc(val, dest_ty); - if llvm_util::get_version() >= (19, 0, 0) { - unsafe { - if llvm::LLVMIsAInstruction(trunc).is_some() { - llvm::LLVMSetNSW(trunc, True); - } + unsafe { + if llvm::LLVMIsAInstruction(trunc).is_some() { + llvm::LLVMSetNSW(trunc, True); } } trunc @@ -1899,10 +1895,6 @@ impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> { hash: &'ll Value, bitmap_bits: &'ll Value, ) { - assert!( - crate::llvm_util::get_version() >= (19, 0, 0), - "MCDC intrinsics require LLVM 19 or later" - ); self.call_intrinsic("llvm.instrprof.mcdc.parameters", &[fn_name, hash, bitmap_bits]); } @@ -1914,10 +1906,6 @@ impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> { bitmap_index: &'ll Value, mcdc_temp: &'ll Value, ) { - assert!( - crate::llvm_util::get_version() >= (19, 0, 0), - "MCDC intrinsics require LLVM 19 or later" - ); let args = &[fn_name, hash, bitmap_index, mcdc_temp]; self.call_intrinsic("llvm.instrprof.mcdc.tvbitmap.update", args); } @@ -1929,10 +1917,6 @@ impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> { #[instrument(level = "debug", skip(self))] pub(crate) fn mcdc_condbitmap_update(&mut self, cond_index: &'ll Value, mcdc_temp: &'ll Value) { - assert!( - crate::llvm_util::get_version() >= (19, 0, 0), - "MCDC intrinsics require LLVM 19 or later" - ); let align = self.tcx.data_layout.i32_align.abi; let current_tv_index = self.load(self.cx.type_i32(), mcdc_temp, align); let new_tv_index = self.add(current_tv_index, cond_index); diff --git a/compiler/rustc_codegen_llvm/src/context.rs b/compiler/rustc_codegen_llvm/src/context.rs index f7b096ff976a6..23ba95fd42f92 100644 --- a/compiler/rustc_codegen_llvm/src/context.rs +++ b/compiler/rustc_codegen_llvm/src/context.rs @@ -163,23 +163,6 @@ pub(crate) unsafe fn create_module<'ll>( let mut target_data_layout = sess.target.data_layout.to_string(); let llvm_version = llvm_util::get_version(); - if llvm_version < (19, 0, 0) { - if sess.target.arch == "aarch64" || sess.target.arch.starts_with("arm64") { - // LLVM 19 sets -Fn32 in its data layout string for 64-bit ARM - // Earlier LLVMs leave this default, so remove it. - // See https://github.com/llvm/llvm-project/pull/90702 - target_data_layout = target_data_layout.replace("-Fn32", ""); - } - } - - if llvm_version < (19, 0, 0) { - if sess.target.arch == "loongarch64" { - // LLVM 19 updates the LoongArch64 data layout. - // See https://github.com/llvm/llvm-project/pull/93814 - target_data_layout = target_data_layout.replace("-n32:64", "-n64"); - } - } - if llvm_version < (20, 0, 0) { if sess.target.arch == "aarch64" || sess.target.arch.starts_with("arm64") { // LLVM 20 defines three additional address spaces for alternate @@ -1183,10 +1166,8 @@ impl<'ll> CodegenCx<'ll, '_> { if self.sess().instrument_coverage() { ifn!("llvm.instrprof.increment", fn(ptr, t_i64, t_i32, t_i32) -> void); - if crate::llvm_util::get_version() >= (19, 0, 0) { - ifn!("llvm.instrprof.mcdc.parameters", fn(ptr, t_i64, t_i32) -> void); - ifn!("llvm.instrprof.mcdc.tvbitmap.update", fn(ptr, t_i64, t_i32, ptr) -> void); - } + ifn!("llvm.instrprof.mcdc.parameters", fn(ptr, t_i64, t_i32) -> void); + ifn!("llvm.instrprof.mcdc.tvbitmap.update", fn(ptr, t_i64, t_i32, ptr) -> void); } ifn!("llvm.type.test", fn(ptr, t_metadata) -> i1); diff --git a/compiler/rustc_codegen_llvm/src/llvm_util.rs b/compiler/rustc_codegen_llvm/src/llvm_util.rs index 4e85286ed55cf..36e35f81392bc 100644 --- a/compiler/rustc_codegen_llvm/src/llvm_util.rs +++ b/compiler/rustc_codegen_llvm/src/llvm_util.rs @@ -256,7 +256,6 @@ pub(crate) fn to_llvm_features<'a>(sess: &Session, s: &'a str) -> Option Some(LLVMFeature::new("perfmon")), ("aarch64", "paca") => Some(LLVMFeature::new("pauth")), ("aarch64", "pacg") => Some(LLVMFeature::new("pauth")), - ("aarch64", "pauth-lr") if get_version().0 < 19 => None, // Before LLVM 20 those two features were packaged together as b16b16 ("aarch64", "sve-b16b16") if get_version().0 < 20 => Some(LLVMFeature::new("b16b16")), ("aarch64", "sme-b16b16") if get_version().0 < 20 => Some(LLVMFeature::new("b16b16")), @@ -270,20 +269,9 @@ pub(crate) fn to_llvm_features<'a>(sess: &Session, s: &'a str) -> Option Some(LLVMFeature::new("fp16fml")), ("aarch64", "fp16") => Some(LLVMFeature::new("fullfp16")), // Filter out features that are not supported by the current LLVM version - ("aarch64", "fpmr") if get_version().0 != 18 => None, + ("aarch64", "fpmr") => None, // only existed in 18 ("arm", "fp16") => Some(LLVMFeature::new("fullfp16")), - // In LLVM 18, `unaligned-scalar-mem` was merged with `unaligned-vector-mem` into a single - // feature called `fast-unaligned-access`. In LLVM 19, it was split back out. - ("riscv32" | "riscv64", "unaligned-scalar-mem" | "unaligned-vector-mem") - if get_version().0 == 18 => - { - Some(LLVMFeature::new("fast-unaligned-access")) - } // Filter out features that are not supported by the current LLVM version - ("riscv32" | "riscv64", "zaamo") if get_version().0 < 19 => None, - ("riscv32" | "riscv64", "zabha") if get_version().0 < 19 => None, - ("riscv32" | "riscv64", "zalrsc") if get_version().0 < 19 => None, - ("riscv32" | "riscv64", "zama16b") if get_version().0 < 19 => None, ("riscv32" | "riscv64", "zacas") if get_version().0 < 20 => None, // Enable the evex512 target feature if an avx512 target feature is enabled. ("x86", s) if s.starts_with("avx512") => { @@ -295,10 +283,9 @@ pub(crate) fn to_llvm_features<'a>(sess: &Session, s: &'a str) -> Option Some(LLVMFeature::new("hasleoncasa")), // In LLVM 19, there is no `v8plus` feature and `v9` means "SPARC-V9 instruction available and SPARC-V8+ ABI used". // https://github.com/llvm/llvm-project/blob/llvmorg-19.1.0/llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp#L27-L28 - // Before LLVM 19, there is no `v8plus` feature and `v9` means "SPARC-V9 instruction available". + // Before LLVM 19, there was no `v8plus` feature and `v9` means "SPARC-V9 instruction available". // https://github.com/llvm/llvm-project/blob/llvmorg-18.1.0/llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp#L26 ("sparc", "v8plus") if get_version().0 == 19 => Some(LLVMFeature::new("v9")), - ("sparc", "v8plus") if get_version().0 < 19 => None, ("powerpc", "power8-crypto") => Some(LLVMFeature::new("crypto")), // These new `amx` variants and `movrs` were introduced in LLVM20 ("x86", "amx-avx512" | "amx-fp8" | "amx-movrs" | "amx-tf32" | "amx-transpose") diff --git a/compiler/rustc_driver_impl/src/lib.rs b/compiler/rustc_driver_impl/src/lib.rs index 21b9542d0e1e8..6fb01bf415acc 100644 --- a/compiler/rustc_driver_impl/src/lib.rs +++ b/compiler/rustc_driver_impl/src/lib.rs @@ -64,6 +64,7 @@ use rustc_session::lint::{Lint, LintId}; use rustc_session::output::{CRATE_TYPES, collect_crate_types, invalid_output_for_target}; use rustc_session::{EarlyDiagCtxt, Session, config, filesearch}; use rustc_span::FileName; +use rustc_span::def_id::LOCAL_CRATE; use rustc_target::json::ToJson; use rustc_target::spec::{Target, TargetTuple}; use time::OffsetDateTime; @@ -392,14 +393,10 @@ pub fn run_compiler(at_args: &[String], callbacks: &mut (dyn Callbacks + Send)) } fn dump_feature_usage_metrics(tcxt: TyCtxt<'_>, metrics_dir: &Path) { - let output_filenames = tcxt.output_filenames(()); - let mut metrics_file_name = std::ffi::OsString::from("unstable_feature_usage_metrics-"); - let mut metrics_path = output_filenames.with_directory_and_extension(metrics_dir, "json"); - let metrics_file_stem = - metrics_path.file_name().expect("there should be a valid default output filename"); - metrics_file_name.push(metrics_file_stem); - metrics_path.pop(); - metrics_path.push(metrics_file_name); + let hash = tcxt.crate_hash(LOCAL_CRATE); + let crate_name = tcxt.crate_name(LOCAL_CRATE); + let metrics_file_name = format!("unstable_feature_usage_metrics-{crate_name}-{hash}.json"); + let metrics_path = metrics_dir.join(metrics_file_name); if let Err(error) = tcxt.features().dump_feature_usage_metrics(metrics_path) { // FIXME(yaahc): once metrics can be enabled by default we will want "failure to emit // default metrics" to only produce a warning when metrics are enabled by default and emit diff --git a/compiler/rustc_llvm/llvm-wrapper/CoverageMappingWrapper.cpp b/compiler/rustc_llvm/llvm-wrapper/CoverageMappingWrapper.cpp index b8884486c3330..4695de8ea09a3 100644 --- a/compiler/rustc_llvm/llvm-wrapper/CoverageMappingWrapper.cpp +++ b/compiler/rustc_llvm/llvm-wrapper/CoverageMappingWrapper.cpp @@ -47,7 +47,6 @@ struct LLVMRustMCDCBranchParameters { int16_t ConditionIDs[2]; }; -#if LLVM_VERSION_GE(19, 0) static coverage::mcdc::BranchParameters fromRust(LLVMRustMCDCBranchParameters Params) { return coverage::mcdc::BranchParameters( @@ -59,7 +58,6 @@ fromRust(LLVMRustMCDCDecisionParameters Params) { return coverage::mcdc::DecisionParameters(Params.BitmapIdx, Params.NumConditions); } -#endif // Must match the layout of // `rustc_codegen_llvm::coverageinfo::ffi::CoverageSpan`. @@ -203,7 +201,6 @@ extern "C" void LLVMRustCoverageWriteFunctionMappingsToBuffer( Region.Span.LineEnd, Region.Span.ColumnEnd)); } -#if LLVM_VERSION_GE(19, 0) // MC/DC branch regions: for (const auto &Region : ArrayRef(MCDCBranchRegions, NumMCDCBranchRegions)) { MappingRegions.push_back(coverage::CounterMappingRegion::makeBranchRegion( @@ -221,7 +218,6 @@ extern "C" void LLVMRustCoverageWriteFunctionMappingsToBuffer( Region.Span.LineStart, Region.Span.ColumnStart, Region.Span.LineEnd, Region.Span.ColumnEnd)); } -#endif // Write the converted expressions and mappings to a byte buffer. auto CoverageMappingWriter = coverage::CoverageMappingWriter( diff --git a/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp b/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp index 257bdc01993fb..e02c80c50b14a 100644 --- a/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp +++ b/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp @@ -47,10 +47,7 @@ #include // Conditional includes prevent clang-format from fully sorting the list, -// so keep them separate. -#if LLVM_VERSION_GE(19, 0) -#include "llvm/Support/PGOOptions.h" -#endif +// so if any are needed, keep them separate down here. using namespace llvm; @@ -432,31 +429,15 @@ extern "C" LLVMTargetMachineRef LLVMRustCreateTargetMachine( } if (!strcmp("zlib", DebugInfoCompression) && llvm::compression::zlib::isAvailable()) { -#if LLVM_VERSION_GE(19, 0) Options.MCOptions.CompressDebugSections = DebugCompressionType::Zlib; -#else - Options.CompressDebugSections = DebugCompressionType::Zlib; -#endif } else if (!strcmp("zstd", DebugInfoCompression) && llvm::compression::zstd::isAvailable()) { -#if LLVM_VERSION_GE(19, 0) Options.MCOptions.CompressDebugSections = DebugCompressionType::Zstd; -#else - Options.CompressDebugSections = DebugCompressionType::Zstd; -#endif } else if (!strcmp("none", DebugInfoCompression)) { -#if LLVM_VERSION_GE(19, 0) Options.MCOptions.CompressDebugSections = DebugCompressionType::None; -#else - Options.CompressDebugSections = DebugCompressionType::None; -#endif } -#if LLVM_VERSION_GE(19, 0) Options.MCOptions.X86RelaxRelocations = RelaxELFRelocations; -#else - Options.RelaxELFRelocations = RelaxELFRelocations; -#endif Options.UseInitArray = UseInitArray; Options.EmulatedTLS = UseEmulatedTls; @@ -753,34 +734,23 @@ extern "C" LLVMRustResult LLVMRustOptimize( auto FS = vfs::getRealFileSystem(); if (PGOGenPath) { assert(!PGOUsePath && !PGOSampleUsePath); - PGOOpt = PGOOptions(PGOGenPath, "", "", "", FS, PGOOptions::IRInstr, - PGOOptions::NoCSAction, -#if LLVM_VERSION_GE(19, 0) - PGOOptions::ColdFuncOpt::Default, -#endif - DebugInfoForProfiling); + PGOOpt = PGOOptions( + PGOGenPath, "", "", "", FS, PGOOptions::IRInstr, PGOOptions::NoCSAction, + PGOOptions::ColdFuncOpt::Default, DebugInfoForProfiling); } else if (PGOUsePath) { assert(!PGOSampleUsePath); - PGOOpt = PGOOptions(PGOUsePath, "", "", "", FS, PGOOptions::IRUse, - PGOOptions::NoCSAction, -#if LLVM_VERSION_GE(19, 0) - PGOOptions::ColdFuncOpt::Default, -#endif - DebugInfoForProfiling); + PGOOpt = PGOOptions( + PGOUsePath, "", "", "", FS, PGOOptions::IRUse, PGOOptions::NoCSAction, + PGOOptions::ColdFuncOpt::Default, DebugInfoForProfiling); } else if (PGOSampleUsePath) { - PGOOpt = PGOOptions(PGOSampleUsePath, "", "", "", FS, PGOOptions::SampleUse, - PGOOptions::NoCSAction, -#if LLVM_VERSION_GE(19, 0) - PGOOptions::ColdFuncOpt::Default, -#endif - DebugInfoForProfiling); + PGOOpt = + PGOOptions(PGOSampleUsePath, "", "", "", FS, PGOOptions::SampleUse, + PGOOptions::NoCSAction, PGOOptions::ColdFuncOpt::Default, + DebugInfoForProfiling); } else if (DebugInfoForProfiling) { - PGOOpt = PGOOptions("", "", "", "", FS, PGOOptions::NoAction, - PGOOptions::NoCSAction, -#if LLVM_VERSION_GE(19, 0) - PGOOptions::ColdFuncOpt::Default, -#endif - DebugInfoForProfiling); + PGOOpt = PGOOptions( + "", "", "", "", FS, PGOOptions::NoAction, PGOOptions::NoCSAction, + PGOOptions::ColdFuncOpt::Default, DebugInfoForProfiling); } auto PB = PassBuilder(TM, PTO, PGOOpt, &PIC); diff --git a/compiler/rustc_llvm/llvm-wrapper/RustWrapper.cpp b/compiler/rustc_llvm/llvm-wrapper/RustWrapper.cpp index 53df59930f4fd..3cfa54fc2aafd 100644 --- a/compiler/rustc_llvm/llvm-wrapper/RustWrapper.cpp +++ b/compiler/rustc_llvm/llvm-wrapper/RustWrapper.cpp @@ -467,12 +467,8 @@ extern "C" LLVMAttributeRef LLVMRustCreateRangeAttribute(LLVMContextRef C, unsigned NumBits, const uint64_t LowerWords[], const uint64_t UpperWords[]) { -#if LLVM_VERSION_GE(19, 0) return LLVMCreateConstantRangeAttribute(C, Attribute::Range, NumBits, LowerWords, UpperWords); -#else - report_fatal_error("LLVM 19.0 is required for Range Attribute"); -#endif } // These values **must** match ffi::AllocKindFlags. @@ -1591,43 +1587,6 @@ extern "C" LLVMValueRef LLVMRustBuildMemSet(LLVMBuilderRef B, LLVMValueRef Dst, MaybeAlign(DstAlign), IsVolatile)); } -// Polyfill for `LLVMBuildCallBr`, which was added in LLVM 19. -// -// FIXME: Remove when Rust's minimum supported LLVM version reaches 19. -#if LLVM_VERSION_LT(19, 0) -DEFINE_SIMPLE_CONVERSION_FUNCTIONS(OperandBundleDef, LLVMOperandBundleRef) - -extern "C" LLVMValueRef -LLVMBuildCallBr(LLVMBuilderRef B, LLVMTypeRef Ty, LLVMValueRef Fn, - LLVMBasicBlockRef DefaultDest, LLVMBasicBlockRef *IndirectDests, - unsigned NumIndirectDests, LLVMValueRef *Args, unsigned NumArgs, - LLVMOperandBundleRef *Bundles, unsigned NumBundles, - const char *Name) { - Value *Callee = unwrap(Fn); - FunctionType *FTy = unwrap(Ty); - - // FIXME: Is there a way around this? - std::vector IndirectDestsUnwrapped; - IndirectDestsUnwrapped.reserve(NumIndirectDests); - for (unsigned i = 0; i < NumIndirectDests; ++i) { - IndirectDestsUnwrapped.push_back(unwrap(IndirectDests[i])); - } - - // FIXME: Is there a way around this? - SmallVector OpBundles; - OpBundles.reserve(NumBundles); - for (unsigned i = 0; i < NumBundles; ++i) { - OpBundles.push_back(*unwrap(Bundles[i])); - } - - return wrap( - unwrap(B)->CreateCallBr(FTy, Callee, unwrap(DefaultDest), - ArrayRef(IndirectDestsUnwrapped), - ArrayRef(unwrap(Args), NumArgs), - ArrayRef(OpBundles), Name)); -} -#endif - extern "C" void LLVMRustPositionBuilderAtStart(LLVMBuilderRef B, LLVMBasicBlockRef BB) { auto Point = unwrap(BB)->getFirstInsertionPt(); @@ -1771,24 +1730,6 @@ extern "C" LLVMValueRef LLVMRustBuildMaxNum(LLVMBuilderRef B, LLVMValueRef LHS, return wrap(unwrap(B)->CreateMaxNum(unwrap(LHS), unwrap(RHS))); } -#if LLVM_VERSION_LT(19, 0) -enum { - LLVMGEPFlagInBounds = (1 << 0), - LLVMGEPFlagNUSW = (1 << 1), - LLVMGEPFlagNUW = (1 << 2), -}; -extern "C" LLVMValueRef -LLVMBuildGEPWithNoWrapFlags(LLVMBuilderRef B, LLVMTypeRef Ty, - LLVMValueRef Pointer, LLVMValueRef *Indices, - unsigned NumIndices, const char *Name, - unsigned NoWrapFlags) { - if (NoWrapFlags & LLVMGEPFlagInBounds) - return LLVMBuildInBoundsGEP2(B, Ty, Pointer, Indices, NumIndices, Name); - else - return LLVMBuildGEP2(B, Ty, Pointer, Indices, NumIndices, Name); -} -#endif - // Transfers ownership of DiagnosticHandler unique_ptr to the caller. extern "C" DiagnosticHandler * LLVMRustContextGetDiagnosticHandler(LLVMContextRef C) { @@ -1856,11 +1797,7 @@ extern "C" void LLVMRustContextConfigureDiagnosticHandler( } } if (DiagnosticHandlerCallback) { -#if LLVM_VERSION_GE(19, 0) DiagnosticHandlerCallback(&DI, DiagnosticHandlerContext); -#else - DiagnosticHandlerCallback(DI, DiagnosticHandlerContext); -#endif return true; } return false; @@ -2008,21 +1945,3 @@ extern "C" void LLVMRustSetNoSanitizeHWAddress(LLVMValueRef Global) { MD.NoHWAddress = true; GV.setSanitizerMetadata(MD); } - -// Operations on composite constants. -// These are clones of LLVM api functions that will become available in future -// releases. They can be removed once Rust's minimum supported LLVM version -// supports them. See https://github.com/rust-lang/rust/issues/121868 See -// https://llvm.org/doxygen/group__LLVMCCoreValueConstantComposite.html - -// FIXME: Remove when Rust's minimum supported LLVM version reaches 19. -// https://github.com/llvm/llvm-project/commit/e1405e4f71c899420ebf8262d5e9745598419df8 -#if LLVM_VERSION_LT(19, 0) -extern "C" LLVMValueRef LLVMConstStringInContext2(LLVMContextRef C, - const char *Str, - size_t Length, - bool DontNullTerminate) { - return wrap(ConstantDataArray::getString(*unwrap(C), StringRef(Str, Length), - !DontNullTerminate)); -} -#endif diff --git a/compiler/rustc_middle/src/ty/context.rs b/compiler/rustc_middle/src/ty/context.rs index 13217ae58e900..037f3cd43b65c 100644 --- a/compiler/rustc_middle/src/ty/context.rs +++ b/compiler/rustc_middle/src/ty/context.rs @@ -1804,10 +1804,15 @@ impl<'tcx> TyCtxt<'tcx> { // - needs_metadata: for putting into crate metadata. // - instrument_coverage: for putting into coverage data (see // `hash_mir_source`). + // - metrics_dir: metrics use the strict version hash in the filenames + // for dumped metrics files to prevent overwriting distinct metrics + // for similar source builds (may change in the future, this is part + // of the proof of concept impl for the metrics initiative project goal) cfg!(debug_assertions) || self.sess.opts.incremental.is_some() || self.needs_metadata() || self.sess.instrument_coverage() + || self.sess.opts.unstable_opts.metrics_dir.is_some() } #[inline] diff --git a/library/alloctests/tests/lib.rs b/library/alloctests/tests/lib.rs index 46c11ea150bf8..f1f4cc6f93bbd 100644 --- a/library/alloctests/tests/lib.rs +++ b/library/alloctests/tests/lib.rs @@ -63,6 +63,7 @@ mod fmt; mod heap; mod linked_list; mod misc_tests; +mod num; mod rc; mod slice; mod sort; diff --git a/library/alloctests/tests/num.rs b/library/alloctests/tests/num.rs new file mode 100644 index 0000000000000..3c76e68c60640 --- /dev/null +++ b/library/alloctests/tests/num.rs @@ -0,0 +1,69 @@ +use std::fmt::{Debug, Display}; +use std::str::FromStr; + +fn assert_nb(value: Int) { + let s = value.to_string(); + let s2 = format!("s: {}.", value); + + assert_eq!(format!("s: {s}."), s2); + let Ok(ret) = Int::from_str(&s) else { + panic!("failed to convert into to string"); + }; + assert_eq!(ret, value); +} + +macro_rules! uint_to_s { + ($($fn_name:ident, $int:ident,)+) => { + $( + #[test] + fn $fn_name() { + assert_nb::<$int>($int::MIN); + assert_nb::<$int>($int::MAX); + assert_nb::<$int>(1); + assert_nb::<$int>($int::MIN / 2); + assert_nb::<$int>($int::MAX / 2); + } + )+ + } +} +macro_rules! int_to_s { + ($($fn_name:ident, $int:ident,)+) => { + $( + #[test] + fn $fn_name() { + assert_nb::<$int>($int::MIN); + assert_nb::<$int>($int::MAX); + assert_nb::<$int>(1); + assert_nb::<$int>(0); + assert_nb::<$int>(-1); + assert_nb::<$int>($int::MIN / 2); + assert_nb::<$int>($int::MAX / 2); + } + )+ + } +} + +int_to_s!( + test_i8_to_string, + i8, + test_i16_to_string, + i16, + test_i32_to_string, + i32, + test_i64_to_string, + i64, + test_i128_to_string, + i128, +); +uint_to_s!( + test_u8_to_string, + u8, + test_u16_to_string, + u16, + test_u32_to_string, + u32, + test_u64_to_string, + u64, + test_u128_to_string, + u128, +); diff --git a/src/bootstrap/src/core/build_steps/llvm.rs b/src/bootstrap/src/core/build_steps/llvm.rs index e21804fa3c07f..69a8bd59f16ca 100644 --- a/src/bootstrap/src/core/build_steps/llvm.rs +++ b/src/bootstrap/src/core/build_steps/llvm.rs @@ -346,8 +346,6 @@ impl Step for Llvm { .define("LLVM_INCLUDE_DOCS", "OFF") .define("LLVM_INCLUDE_BENCHMARKS", "OFF") .define("LLVM_INCLUDE_TESTS", enable_tests) - // FIXME: remove this when minimal llvm is 19 - .define("LLVM_ENABLE_TERMINFO", "OFF") .define("LLVM_ENABLE_LIBEDIT", "OFF") .define("LLVM_ENABLE_BINDINGS", "OFF") .define("LLVM_ENABLE_Z3_SOLVER", "OFF") @@ -610,11 +608,11 @@ fn check_llvm_version(builder: &Builder<'_>, llvm_config: &Path) { let version = get_llvm_version(builder, llvm_config); let mut parts = version.split('.').take(2).filter_map(|s| s.parse::().ok()); if let (Some(major), Some(_minor)) = (parts.next(), parts.next()) { - if major >= 18 { + if major >= 19 { return; } } - panic!("\n\nbad LLVM version: {version}, need >=18\n\n") + panic!("\n\nbad LLVM version: {version}, need >=19\n\n") } fn configure_cmake( diff --git a/src/ci/docker/README.md b/src/ci/docker/README.md index 20b6f7d10ef56..488a6a2bce122 100644 --- a/src/ci/docker/README.md +++ b/src/ci/docker/README.md @@ -14,9 +14,9 @@ To run a specific CI job locally, you can use the `citool` Rust crate: cargo run --manifest-path src/ci/citool/Cargo.toml run-local ``` -For example, to run the `x86_64-gnu-llvm-18-1` job: +For example, to run the `x86_64-gnu-llvm-19-1` job: ``` -cargo run --manifest-path src/ci/citool/Cargo.toml run-local x86_64-gnu-llvm-18-1 +cargo run --manifest-path src/ci/citool/Cargo.toml run-local x86_64-gnu-llvm-19-1 ``` The job will output artifacts in an `obj/` dir at the root of a repository. Note @@ -27,10 +27,10 @@ Docker image executed in the given CI job. while locally, to the `obj/` directory. This is primarily to prevent strange linker errors when using multiple Docker images. -For some Linux workflows (for example `x86_64-gnu-llvm-18-N`), the process is more involved. You will need to see which script is executed for the given workflow inside the [`jobs.yml`](../github-actions/jobs.yml) file and pass it through the `DOCKER_SCRIPT` environment variable. For example, to reproduce the `x86_64-gnu-llvm-18-3` workflow, you can run the following script: +For some Linux workflows (for example `x86_64-gnu-llvm-19-N`), the process is more involved. You will need to see which script is executed for the given workflow inside the [`jobs.yml`](../github-actions/jobs.yml) file and pass it through the `DOCKER_SCRIPT` environment variable. For example, to reproduce the `x86_64-gnu-llvm-19-3` workflow, you can run the following script: ``` -DOCKER_SCRIPT=x86_64-gnu-llvm3.sh ./src/ci/docker/run.sh x86_64-gnu-llvm-18 +DOCKER_SCRIPT=x86_64-gnu-llvm3.sh ./src/ci/docker/run.sh x86_64-gnu-llvm-19 ``` ## Local Development diff --git a/src/ci/docker/host-x86_64/x86_64-gnu-llvm-18/Dockerfile b/src/ci/docker/host-x86_64/x86_64-gnu-llvm-18/Dockerfile deleted file mode 100644 index aefc0f376f689..0000000000000 --- a/src/ci/docker/host-x86_64/x86_64-gnu-llvm-18/Dockerfile +++ /dev/null @@ -1,69 +0,0 @@ -FROM ubuntu:24.04 - -ARG DEBIAN_FRONTEND=noninteractive - -RUN apt-get update && apt-get install -y --no-install-recommends \ - bzip2 \ - g++ \ - gcc-multilib \ - make \ - ninja-build \ - file \ - curl \ - ca-certificates \ - python3 \ - git \ - cmake \ - sudo \ - gdb \ - llvm-18-tools \ - llvm-18-dev \ - libedit-dev \ - libssl-dev \ - pkg-config \ - zlib1g-dev \ - xz-utils \ - nodejs \ - mingw-w64 \ - # libgccjit dependencies - flex \ - libmpfr-dev \ - libgmp-dev \ - libmpc3 \ - libmpc-dev \ - && rm -rf /var/lib/apt/lists/* - -# Install powershell (universal package) so we can test x.ps1 on Linux -# FIXME: need a "universal" version that supports libicu74, but for now it still works to ignore that dep. -RUN curl -sL "https://github.com/PowerShell/PowerShell/releases/download/v7.3.1/powershell_7.3.1-1.deb_amd64.deb" > powershell.deb && \ - dpkg --ignore-depends=libicu72 -i powershell.deb && \ - rm -f powershell.deb - -COPY scripts/sccache.sh /scripts/ -RUN sh /scripts/sccache.sh - -# We are disabling CI LLVM since this builder is intentionally using a host -# LLVM, rather than the typical src/llvm-project LLVM. -ENV NO_DOWNLOAD_CI_LLVM 1 -ENV EXTERNAL_LLVM 1 - -# Using llvm-link-shared due to libffi issues -- see #34486 -ENV RUST_CONFIGURE_ARGS \ - --build=x86_64-unknown-linux-gnu \ - --llvm-root=/usr/lib/llvm-18 \ - --enable-llvm-link-shared \ - --set rust.randomize-layout=true \ - --set rust.thin-lto-import-instr-limit=10 - -COPY scripts/shared.sh /scripts/ - -ARG SCRIPT_ARG - -COPY scripts/add_dummy_commit.sh /tmp/ -COPY scripts/x86_64-gnu-llvm.sh /tmp/ -COPY scripts/x86_64-gnu-llvm2.sh /tmp/ -COPY scripts/x86_64-gnu-llvm3.sh /tmp/ -COPY scripts/stage_2_test_set1.sh /tmp/ -COPY scripts/stage_2_test_set2.sh /tmp/ - -ENV SCRIPT "/tmp/add_dummy_commit.sh && /tmp/${SCRIPT_ARG}" diff --git a/src/ci/docker/host-x86_64/x86_64-gnu-llvm-19/Dockerfile b/src/ci/docker/host-x86_64/x86_64-gnu-llvm-19/Dockerfile index e0ed2e227f810..be235f648b527 100644 --- a/src/ci/docker/host-x86_64/x86_64-gnu-llvm-19/Dockerfile +++ b/src/ci/docker/host-x86_64/x86_64-gnu-llvm-19/Dockerfile @@ -3,6 +3,7 @@ FROM ubuntu:24.10 ARG DEBIAN_FRONTEND=noninteractive RUN apt-get update && apt-get install -y --no-install-recommends \ + bzip2 \ g++ \ gcc-multilib \ make \ diff --git a/src/ci/github-actions/jobs.yml b/src/ci/github-actions/jobs.yml index f62ed23d038c7..85d0d3aca2e8e 100644 --- a/src/ci/github-actions/jobs.yml +++ b/src/ci/github-actions/jobs.yml @@ -105,7 +105,7 @@ pr: - name: mingw-check-tidy continue_on_error: true <<: *job-linux-4c - - name: x86_64-gnu-llvm-18 + - name: x86_64-gnu-llvm-19 env: ENABLE_GCC_CODEGEN: "1" # We are adding (temporarily) a dummy commit on the compiler @@ -329,34 +329,6 @@ auto: DOCKER_SCRIPT: x86_64-gnu-llvm3.sh <<: *job-linux-4c - # The x86_64-gnu-llvm-18 job is split into multiple jobs to run tests in parallel. - # x86_64-gnu-llvm-18-1 skips tests that run in x86_64-gnu-llvm-18-{2,3}. - - name: x86_64-gnu-llvm-18-1 - env: - RUST_BACKTRACE: 1 - READ_ONLY_SRC: "0" - IMAGE: x86_64-gnu-llvm-18 - DOCKER_SCRIPT: stage_2_test_set1.sh - <<: *job-linux-4c - - # Skip tests that run in x86_64-gnu-llvm-18-{1,3} - - name: x86_64-gnu-llvm-18-2 - env: - RUST_BACKTRACE: 1 - READ_ONLY_SRC: "0" - IMAGE: x86_64-gnu-llvm-18 - DOCKER_SCRIPT: x86_64-gnu-llvm2.sh - <<: *job-linux-4c - - # Skip tests that run in x86_64-gnu-llvm-18-{1,2} - - name: x86_64-gnu-llvm-18-3 - env: - RUST_BACKTRACE: 1 - READ_ONLY_SRC: "0" - IMAGE: x86_64-gnu-llvm-18 - DOCKER_SCRIPT: x86_64-gnu-llvm3.sh - <<: *job-linux-4c - - name: x86_64-gnu-nopt <<: *job-linux-4c diff --git a/src/doc/rustc/src/platform-support/TEMPLATE.md b/src/doc/rustc/src/platform-support/TEMPLATE.md index 96c79973a1634..f523237ab06ff 100644 --- a/src/doc/rustc/src/platform-support/TEMPLATE.md +++ b/src/doc/rustc/src/platform-support/TEMPLATE.md @@ -6,7 +6,8 @@ One-sentence description of the target (e.g. CPU, OS) ## Target maintainers -- Some Person, https://github.com/... +[@Ghost](https://github.com/Ghost) +[@octocat](https://github.com/octocat) ## Requirements diff --git a/src/doc/rustc/src/platform-support/aarch64-nintendo-switch-freestanding.md b/src/doc/rustc/src/platform-support/aarch64-nintendo-switch-freestanding.md index 308e1fe2f92a0..6951d7f23f8d8 100644 --- a/src/doc/rustc/src/platform-support/aarch64-nintendo-switch-freestanding.md +++ b/src/doc/rustc/src/platform-support/aarch64-nintendo-switch-freestanding.md @@ -4,10 +4,10 @@ Nintendo Switch with pure-Rust toolchain. -## Designated Developers +## Target Maintainers -* [@leo60228](https://github.com/leo60228) -* [@jam1garner](https://github.com/jam1garner) +[@leo60228](https://github.com/leo60228) +[@jam1garner](https://github.com/jam1garner) ## Requirements diff --git a/src/doc/rustc/src/platform-support/aarch64-unknown-teeos.md b/src/doc/rustc/src/platform-support/aarch64-unknown-teeos.md index e2f2379ec440d..be11d0cdd1037 100644 --- a/src/doc/rustc/src/platform-support/aarch64-unknown-teeos.md +++ b/src/doc/rustc/src/platform-support/aarch64-unknown-teeos.md @@ -20,8 +20,8 @@ TEEOS is open source in progress. [MORE about](https://gitee.com/opentrustee-gro ## Target maintainers -- Petrochenkov Vadim -- Sword-Destiny +[@petrochenkov](https://github.com/petrochenkov) +[@Sword-Destiny](https://github.com/Sword-Destiny) ## Setup We use OpenHarmony SDK for TEEOS. diff --git a/src/doc/rustc/src/platform-support/aix.md b/src/doc/rustc/src/platform-support/aix.md index 5a198062b9529..3002a5c4b2cd9 100644 --- a/src/doc/rustc/src/platform-support/aix.md +++ b/src/doc/rustc/src/platform-support/aix.md @@ -6,8 +6,8 @@ Rust for AIX operating system, currently only 64-bit PowerPC is supported. ## Target maintainers -- David Tenty `daltenty@ibm.com`, https://github.com/daltenty -- Chris Cambly, `ccambly@ca.ibm.com`, https://github.com/gilamn5tr +[@daltenty](https://github.com/daltenty) +[@gilamn5tr](https://github.com/gilamn5tr) ## Requirements diff --git a/src/doc/rustc/src/platform-support/amdgcn-amd-amdhsa.md b/src/doc/rustc/src/platform-support/amdgcn-amd-amdhsa.md index 0b2f798e66de1..16152dd2dad51 100644 --- a/src/doc/rustc/src/platform-support/amdgcn-amd-amdhsa.md +++ b/src/doc/rustc/src/platform-support/amdgcn-amd-amdhsa.md @@ -6,7 +6,7 @@ AMD GPU target for compute/HSA (Heterogeneous System Architecture). ## Target maintainers -- [@Flakebi](https://github.com/Flakebi) +[@Flakebi](https://github.com/Flakebi) ## Requirements diff --git a/src/doc/rustc/src/platform-support/android.md b/src/doc/rustc/src/platform-support/android.md index 54e7ddca32aab..a54288f8f050e 100644 --- a/src/doc/rustc/src/platform-support/android.md +++ b/src/doc/rustc/src/platform-support/android.md @@ -8,9 +8,9 @@ ## Target maintainers -- Chris Wailes ([@chriswailes](https://github.com/chriswailes)) -- Matthew Maurer ([@maurer](https://github.com/maurer)) -- Martin Geisler ([@mgeisler](https://github.com/mgeisler)) +[@chriswailes](https://github.com/chriswailes) +[@maurer](https://github.com/maurer) +[@mgeisler](https://github.com/mgeisler) ## Requirements diff --git a/src/doc/rustc/src/platform-support/apple-darwin.md b/src/doc/rustc/src/platform-support/apple-darwin.md index 22c54d04b1eb8..e41aee9bdb248 100644 --- a/src/doc/rustc/src/platform-support/apple-darwin.md +++ b/src/doc/rustc/src/platform-support/apple-darwin.md @@ -9,8 +9,8 @@ Apple macOS targets. ## Target maintainers -- [@thomcc](https://github.com/thomcc) -- [@madsmtm](https://github.com/madsmtm) +[@thomcc](https://github.com/thomcc) +[@madsmtm](https://github.com/madsmtm) ## Requirements diff --git a/src/doc/rustc/src/platform-support/apple-ios-macabi.md b/src/doc/rustc/src/platform-support/apple-ios-macabi.md index 79966d908d898..d4b71dbd4f492 100644 --- a/src/doc/rustc/src/platform-support/apple-ios-macabi.md +++ b/src/doc/rustc/src/platform-support/apple-ios-macabi.md @@ -9,9 +9,9 @@ Apple Mac Catalyst targets. ## Target maintainers -- [@badboy](https://github.com/badboy) -- [@BlackHoleFox](https://github.com/BlackHoleFox) -- [@madsmtm](https://github.com/madsmtm) +[@badboy](https://github.com/badboy) +[@BlackHoleFox](https://github.com/BlackHoleFox) +[@madsmtm](https://github.com/madsmtm) ## Requirements diff --git a/src/doc/rustc/src/platform-support/apple-ios.md b/src/doc/rustc/src/platform-support/apple-ios.md index 7f5dc361c49d7..64325554ab60b 100644 --- a/src/doc/rustc/src/platform-support/apple-ios.md +++ b/src/doc/rustc/src/platform-support/apple-ios.md @@ -15,9 +15,9 @@ Apple iOS / iPadOS targets. ## Target maintainers -- [@badboy](https://github.com/badboy) -- [@deg4uss3r](https://github.com/deg4uss3r) -- [@madsmtm](https://github.com/madsmtm) +[@badboy](https://github.com/badboy) +[@deg4uss3r](https://github.com/deg4uss3r) +[@madsmtm](https://github.com/madsmtm) ## Requirements diff --git a/src/doc/rustc/src/platform-support/apple-tvos.md b/src/doc/rustc/src/platform-support/apple-tvos.md index fc46db20074f4..193d64666121e 100644 --- a/src/doc/rustc/src/platform-support/apple-tvos.md +++ b/src/doc/rustc/src/platform-support/apple-tvos.md @@ -10,8 +10,8 @@ Apple tvOS targets. ## Target maintainers -- [@thomcc](https://github.com/thomcc) -- [@madsmtm](https://github.com/madsmtm) +[@thomcc](https://github.com/thomcc) +[@madsmtm](https://github.com/madsmtm) ## Requirements diff --git a/src/doc/rustc/src/platform-support/apple-visionos.md b/src/doc/rustc/src/platform-support/apple-visionos.md index 7cf9549227d9a..ed96912da7a48 100644 --- a/src/doc/rustc/src/platform-support/apple-visionos.md +++ b/src/doc/rustc/src/platform-support/apple-visionos.md @@ -9,8 +9,8 @@ Apple visionOS / xrOS targets. ## Target maintainers -- [@agg23](https://github.com/agg23) -- [@madsmtm](https://github.com/madsmtm) +[@agg23](https://github.com/agg23) +[@madsmtm](https://github.com/madsmtm) ## Requirements diff --git a/src/doc/rustc/src/platform-support/apple-watchos.md b/src/doc/rustc/src/platform-support/apple-watchos.md index 7b12d9ebfd4b7..6ac09d0d1e538 100644 --- a/src/doc/rustc/src/platform-support/apple-watchos.md +++ b/src/doc/rustc/src/platform-support/apple-watchos.md @@ -12,10 +12,10 @@ Apple watchOS targets. ## Target maintainers -- [@deg4uss3r](https://github.com/deg4uss3r) -- [@vladimir-ea](https://github.com/vladimir-ea) -- [@leohowell](https://github.com/leohowell) -- [@madsmtm](https://github.com/madsmtm) +[@deg4uss3r](https://github.com/deg4uss3r) +[@vladimir-ea](https://github.com/vladimir-ea) +[@leohowell](https://github.com/leohowell) +[@madsmtm](https://github.com/madsmtm) ## Requirements diff --git a/src/doc/rustc/src/platform-support/arm64e-apple-darwin.md b/src/doc/rustc/src/platform-support/arm64e-apple-darwin.md index 3200b7ae1b6ef..2043b34210531 100644 --- a/src/doc/rustc/src/platform-support/arm64e-apple-darwin.md +++ b/src/doc/rustc/src/platform-support/arm64e-apple-darwin.md @@ -6,7 +6,7 @@ ARM64e macOS (11.0+, Big Sur+) ## Target maintainers -- Artyom Tetyukhin ([@arttet](https://github.com/arttet)) +[@arttet](https://github.com/arttet) ## Requirements diff --git a/src/doc/rustc/src/platform-support/arm64e-apple-ios.md b/src/doc/rustc/src/platform-support/arm64e-apple-ios.md index aa99276a68fd1..a2b09e0772822 100644 --- a/src/doc/rustc/src/platform-support/arm64e-apple-ios.md +++ b/src/doc/rustc/src/platform-support/arm64e-apple-ios.md @@ -6,7 +6,7 @@ ARM64e iOS (14.0+) ## Target maintainers -- Artyom Tetyukhin ([@arttet](https://github.com/arttet)) +[@arttet](https://github.com/arttet) ## Requirements diff --git a/src/doc/rustc/src/platform-support/arm64e-apple-tvos.md b/src/doc/rustc/src/platform-support/arm64e-apple-tvos.md index 332ea750f208f..36588c5a96430 100644 --- a/src/doc/rustc/src/platform-support/arm64e-apple-tvos.md +++ b/src/doc/rustc/src/platform-support/arm64e-apple-tvos.md @@ -6,7 +6,7 @@ ARM64e tvOS (10.0+) ## Target maintainers -- Artyom Tetyukhin ([@arttet](https://github.com/arttet)) +[@arttet](https://github.com/arttet) ## Requirements diff --git a/src/doc/rustc/src/platform-support/arm64ec-pc-windows-msvc.md b/src/doc/rustc/src/platform-support/arm64ec-pc-windows-msvc.md index 67903ae640146..d02043b2ae9e8 100644 --- a/src/doc/rustc/src/platform-support/arm64ec-pc-windows-msvc.md +++ b/src/doc/rustc/src/platform-support/arm64ec-pc-windows-msvc.md @@ -7,7 +7,7 @@ applications on AArch64 Windows 11. See +[@Patryk27](https://github.com/Patryk27) ## Requirements diff --git a/src/doc/rustc/src/platform-support/csky-unknown-linux-gnuabiv2.md b/src/doc/rustc/src/platform-support/csky-unknown-linux-gnuabiv2.md index f749b37aa7a8d..e69d606ccd2fe 100644 --- a/src/doc/rustc/src/platform-support/csky-unknown-linux-gnuabiv2.md +++ b/src/doc/rustc/src/platform-support/csky-unknown-linux-gnuabiv2.md @@ -22,7 +22,7 @@ other links: ## Target maintainers -* [@Dirreke](https://github.com/Dirreke) +[@Dirreke](https://github.com/Dirreke) ## Requirements diff --git a/src/doc/rustc/src/platform-support/esp-idf.md b/src/doc/rustc/src/platform-support/esp-idf.md index 91d7d66627d09..baf42ab29a66a 100644 --- a/src/doc/rustc/src/platform-support/esp-idf.md +++ b/src/doc/rustc/src/platform-support/esp-idf.md @@ -6,9 +6,9 @@ Targets for the [ESP-IDF](https://github.com/espressif/esp-idf) development fram ## Target maintainers -- Ivan Markov [@ivmarkov](https://github.com/ivmarkov) -- Scott Mabin [@MabezDev](https://github.com/MabezDev) -- Sergio Gasquez [@SergioGasquez](https://github.com/SergioGasquez) +[@ivmarkov](https://github.com/ivmarkov) +[@MabezDev](https://github.com/MabezDev) +[@SergioGasquez](https://github.com/SergioGasquez) ## Requirements diff --git a/src/doc/rustc/src/platform-support/freebsd.md b/src/doc/rustc/src/platform-support/freebsd.md index 9d34d3649208a..9d7218b258ec4 100644 --- a/src/doc/rustc/src/platform-support/freebsd.md +++ b/src/doc/rustc/src/platform-support/freebsd.md @@ -6,8 +6,8 @@ ## Target maintainers -- Alan Somers `asomers@FreeBSD.org`, https://github.com/asomers -- Mikael Urankar `mikael@FreeBSD.org`, https://github.com/MikaelUrankar +[@asomers](https://github.com/asomers) +[@MikaelUrankar](https://github.com/MikaelUrankar) ## Requirements diff --git a/src/doc/rustc/src/platform-support/fuchsia.md b/src/doc/rustc/src/platform-support/fuchsia.md index bed5b81adc5bd..e2befc5d9955b 100644 --- a/src/doc/rustc/src/platform-support/fuchsia.md +++ b/src/doc/rustc/src/platform-support/fuchsia.md @@ -7,9 +7,11 @@ updatable, and performant. ## Target maintainers -See [`fuchsia.toml`] in the `team` repository for current target maintainers. +[@erickt](https://github.com/erickt) +[@Nashenas88](https://github.com/Nashenas88) -[`fuchsia.toml`]: https://github.com/rust-lang/team/blob/master/teams/fuchsia.toml +The up-to-date list can be also found via the +[fuchsia marker team](https://github.com/rust-lang/team/blob/master/teams/fuchsia.toml). ## Table of contents diff --git a/src/doc/rustc/src/platform-support/hermit.md b/src/doc/rustc/src/platform-support/hermit.md index df7bc495fce84..069c253bd38a3 100644 --- a/src/doc/rustc/src/platform-support/hermit.md +++ b/src/doc/rustc/src/platform-support/hermit.md @@ -14,8 +14,8 @@ Target triplets available so far: ## Target maintainers -- Stefan Lankes ([@stlankes](https://github.com/stlankes)) -- Martin Kröning ([@mkroening](https://github.com/mkroening)) +[@stlankes](https://github.com/stlankes) +[@mkroening](https://github.com/mkroening) ## Requirements diff --git a/src/doc/rustc/src/platform-support/hexagon-unknown-linux-musl.md b/src/doc/rustc/src/platform-support/hexagon-unknown-linux-musl.md index cfd2b2bac9cc6..be6e17883f4eb 100644 --- a/src/doc/rustc/src/platform-support/hexagon-unknown-linux-musl.md +++ b/src/doc/rustc/src/platform-support/hexagon-unknown-linux-musl.md @@ -11,7 +11,7 @@ DSP architecture. ## Target maintainers -- [Brian Cain](https://github.com/androm3da), `bcain@quicinc.com` +[@androm3da](https://github.com/androm3da) ## Requirements The target is cross-compiled. This target supports `std`. By default, code diff --git a/src/doc/rustc/src/platform-support/hexagon-unknown-none-elf.md b/src/doc/rustc/src/platform-support/hexagon-unknown-none-elf.md index c7726eacaf4e3..b07b0bb08d60a 100644 --- a/src/doc/rustc/src/platform-support/hexagon-unknown-none-elf.md +++ b/src/doc/rustc/src/platform-support/hexagon-unknown-none-elf.md @@ -10,7 +10,7 @@ Rust for baremetal Hexagon DSPs. ## Target maintainers -- [Brian Cain](https://github.com/androm3da), `bcain@quicinc.com` +[@androm3da](https://github.com/androm3da) ## Requirements diff --git a/src/doc/rustc/src/platform-support/hurd.md b/src/doc/rustc/src/platform-support/hurd.md index 2521f79dc5e65..6ecde1db5111e 100644 --- a/src/doc/rustc/src/platform-support/hurd.md +++ b/src/doc/rustc/src/platform-support/hurd.md @@ -6,7 +6,7 @@ ## Target maintainers -- Samuel Thibault, `samuel.thibault@ens-lyon.org`, https://github.com/sthibaul/ +[@sthibaul](https://github.com/sthibaul) ## Requirements diff --git a/src/doc/rustc/src/platform-support/i686-apple-darwin.md b/src/doc/rustc/src/platform-support/i686-apple-darwin.md index abb64dcc986de..5f18a5e271acb 100644 --- a/src/doc/rustc/src/platform-support/i686-apple-darwin.md +++ b/src/doc/rustc/src/platform-support/i686-apple-darwin.md @@ -4,8 +4,8 @@ Apple macOS on 32-bit x86. ## Target maintainers -- [@thomcc](https://github.com/thomcc) -- [@madsmtm](https://github.com/madsmtm) +[@thomcc](https://github.com/thomcc) +[@madsmtm](https://github.com/madsmtm) ## Requirements diff --git a/src/doc/rustc/src/platform-support/illumos.md b/src/doc/rustc/src/platform-support/illumos.md index dd2ae90f6741f..c03238269d37a 100644 --- a/src/doc/rustc/src/platform-support/illumos.md +++ b/src/doc/rustc/src/platform-support/illumos.md @@ -7,8 +7,8 @@ including advanced system debugging, next generation filesystem, networking, and ## Target maintainers -- Joshua M. Clulow ([@jclulow](https://github.com/jclulow)) -- Patrick Mooney ([@pfmooney](https://github.com/pfmooney)) +[@jclulow](https://github.com/jclulow) +[@pfmooney](https://github.com/pfmooney) ## Requirements diff --git a/src/doc/rustc/src/platform-support/kmc-solid.md b/src/doc/rustc/src/platform-support/kmc-solid.md index 44f47927286d7..838662a3741ae 100644 --- a/src/doc/rustc/src/platform-support/kmc-solid.md +++ b/src/doc/rustc/src/platform-support/kmc-solid.md @@ -14,9 +14,9 @@ The target names follow this format: `$ARCH-kmc-solid_$KERNEL-$ABI`, where `$ARC | `armv7a-kmc-solid_asp3-eabi` | `arm` | `kmc` | `solid_asp3` | | `armv7a-kmc-solid_asp3-eabihf` | `arm` | `kmc` | `solid_asp3` | -## Designated Developers +## Target Maintainers -- [@kawadakk](https://github.com/kawadakk) +[@kawadakk](https://github.com/kawadakk) ## Requirements diff --git a/src/doc/rustc/src/platform-support/loongarch-linux.md b/src/doc/rustc/src/platform-support/loongarch-linux.md index 2c9f712ce829d..817d3a892303a 100644 --- a/src/doc/rustc/src/platform-support/loongarch-linux.md +++ b/src/doc/rustc/src/platform-support/loongarch-linux.md @@ -22,10 +22,10 @@ Reference material: ## Target maintainers -- [WANG Rui](https://github.com/heiher) `wangrui@loongson.cn` -- [ZHAI Xiang](https://github.com/xiangzhai) `zhaixiang@loongson.cn` -- [ZHAI Xiaojuan](https://github.com/zhaixiaojuan) `zhaixiaojuan@loongson.cn` -- [WANG Xuerui](https://github.com/xen0n) `git@xen0n.name` +[@heiher](https://github.com/heiher) +[@xiangzhai](https://github.com/xiangzhai) +[@zhaixiaojuan](https://github.com/zhaixiaojuan) +[@xen0n](https://github.com/xen0n) ## Requirements diff --git a/src/doc/rustc/src/platform-support/loongarch-none.md b/src/doc/rustc/src/platform-support/loongarch-none.md index 6c5d866983011..a2bd6e5734cd4 100644 --- a/src/doc/rustc/src/platform-support/loongarch-none.md +++ b/src/doc/rustc/src/platform-support/loongarch-none.md @@ -11,8 +11,8 @@ Freestanding/bare-metal LoongArch64 binaries in ELF format: firmware, kernels, e ## Target maintainers -- [WANG Rui](https://github.com/heiher) `wangrui@loongson.cn` -- [WANG Xuerui](https://github.com/xen0n) `git@xen0n.name` +[@heiher](https://github.com/heiher) +[@xen0n](https://github.com/xen0n) ## Requirements diff --git a/src/doc/rustc/src/platform-support/m68k-unknown-linux-gnu.md b/src/doc/rustc/src/platform-support/m68k-unknown-linux-gnu.md index b18a125f3b095..1efea86df92bc 100644 --- a/src/doc/rustc/src/platform-support/m68k-unknown-linux-gnu.md +++ b/src/doc/rustc/src/platform-support/m68k-unknown-linux-gnu.md @@ -4,10 +4,10 @@ Motorola 680x0 Linux -## Designated Developers +## Target Maintainers -* [@glaubitz](https://github.com/glaubitz) -* [@ricky26](https://github.com/ricky26) +[@glaubitz](https://github.com/glaubitz) +[@ricky26](https://github.com/ricky26) ## Requirements diff --git a/src/doc/rustc/src/platform-support/m68k-unknown-none-elf.md b/src/doc/rustc/src/platform-support/m68k-unknown-none-elf.md index 92780cb5a5ca5..e390ba0aee96b 100644 --- a/src/doc/rustc/src/platform-support/m68k-unknown-none-elf.md +++ b/src/doc/rustc/src/platform-support/m68k-unknown-none-elf.md @@ -4,9 +4,9 @@ Bare metal Motorola 680x0 -## Designated Developers +## Target Maintainers -* [@knickish](https://github.com/knickish) +[@knickish](https://github.com/knickish) ## Requirements diff --git a/src/doc/rustc/src/platform-support/mips-mti-none-elf.md b/src/doc/rustc/src/platform-support/mips-mti-none-elf.md index 731f0a8c42f18..c060ebf7c7e00 100644 --- a/src/doc/rustc/src/platform-support/mips-mti-none-elf.md +++ b/src/doc/rustc/src/platform-support/mips-mti-none-elf.md @@ -9,7 +9,7 @@ MIPS32r2 baremetal softfloat, Big Endian or Little Endian. ## Target maintainers -- YunQiang Su, `syq@debian.org`, https://github.com/wzssyqa +[@wzssyqa](https://github.com/wzssyqa) ## Background diff --git a/src/doc/rustc/src/platform-support/mips-release-6.md b/src/doc/rustc/src/platform-support/mips-release-6.md index b779477996d54..77f495751c15d 100644 --- a/src/doc/rustc/src/platform-support/mips-release-6.md +++ b/src/doc/rustc/src/platform-support/mips-release-6.md @@ -16,10 +16,10 @@ The target name follow this format: `--`, where ## Target Maintainers -- [Xuan Chen](https://github.com/chenx97) -- [Walter Ji](https://github.com/709924470) -- [Xinhui Yang](https://github.com/Cyanoxygen) -- [Lain Yang](https://github.com/Fearyncess) +[@chenx97](https://github.com/chenx97) +[@709924470](https://github.com/709924470) +[@Cyanoxygen](https://github.com/Cyanoxygen) +[@Fearyncess](https://github.com/Fearyncess) ## Requirements diff --git a/src/doc/rustc/src/platform-support/mips64-openwrt-linux-musl.md b/src/doc/rustc/src/platform-support/mips64-openwrt-linux-musl.md index 07470eef051d8..2ad33c9e20de6 100644 --- a/src/doc/rustc/src/platform-support/mips64-openwrt-linux-musl.md +++ b/src/doc/rustc/src/platform-support/mips64-openwrt-linux-musl.md @@ -2,7 +2,8 @@ **Tier: 3** ## Target maintainers -- Donald Hoskins `grommish@gmail.com`, https://github.com/Itus-Shield + +[@Itus-Shield](https://github.com/Itus-Shield) ## Requirements This target is cross-compiled. There is no support for `std`. There is no diff --git a/src/doc/rustc/src/platform-support/mipsel-sony-psx.md b/src/doc/rustc/src/platform-support/mipsel-sony-psx.md index 589100e8888b3..2343df227f5db 100644 --- a/src/doc/rustc/src/platform-support/mipsel-sony-psx.md +++ b/src/doc/rustc/src/platform-support/mipsel-sony-psx.md @@ -6,7 +6,7 @@ Sony PlayStation 1 (psx) ## Designated Developer -* [@ayrtonm](https://github.com/ayrtonm) +[@ayrtonm](https://github.com/ayrtonm) ## Requirements diff --git a/src/doc/rustc/src/platform-support/mipsel-unknown-linux-gnu.md b/src/doc/rustc/src/platform-support/mipsel-unknown-linux-gnu.md index b1ee8728c0207..eed0ce4437ac5 100644 --- a/src/doc/rustc/src/platform-support/mipsel-unknown-linux-gnu.md +++ b/src/doc/rustc/src/platform-support/mipsel-unknown-linux-gnu.md @@ -6,7 +6,7 @@ Little-endian 32 bit MIPS for Linux with `glibc. ## Target maintainers -- [@LukasWoodtli](https://github.com/LukasWoodtli) +[@LukasWoodtli](https://github.com/LukasWoodtli) ## Requirements diff --git a/src/doc/rustc/src/platform-support/netbsd.md b/src/doc/rustc/src/platform-support/netbsd.md index 5c2ce0ee9005e..9040ef637be3d 100644 --- a/src/doc/rustc/src/platform-support/netbsd.md +++ b/src/doc/rustc/src/platform-support/netbsd.md @@ -31,9 +31,12 @@ are built for NetBSD 9.x, although some exceptions exist (some are built for NetBSD 8.x but also work on newer OS versions). -## Designated Developers +## Target Maintainers + +[@he32](https://github.com/he32) + +Further contacts: -- [@he32](https://github.com/he32), `he@NetBSD.org` - [NetBSD/pkgsrc-wip's rust](https://github.com/NetBSD/pkgsrc-wip/blob/master/rust185/Makefile) maintainer (see MAINTAINER variable). This package is part of "pkgsrc work-in-progress" and is used for deployment and testing of new versions of rust - [NetBSD's pkgsrc lang/rust](https://github.com/NetBSD/pkgsrc/tree/trunk/lang/rust) for the "proper" package in pkgsrc. - [NetBSD's pkgsrc lang/rust-bin](https://github.com/NetBSD/pkgsrc/tree/trunk/lang/rust-bin) which re-uses the bootstrap kit as a binary distribution and therefore avoids the rather protracted native build time of rust itself @@ -46,7 +49,7 @@ bug reporting system. The `x86_64-unknown-netbsd` artifacts is being distributed by the rust project. -The other targets are built by the designated developers (see above), +The other targets are built by the target maintainers (see above), and the targets are initially cross-compiled, but many if not most of them are also built natively as part of testing. diff --git a/src/doc/rustc/src/platform-support/nto-qnx.md b/src/doc/rustc/src/platform-support/nto-qnx.md index e097d32277d32..9f8960899c169 100644 --- a/src/doc/rustc/src/platform-support/nto-qnx.md +++ b/src/doc/rustc/src/platform-support/nto-qnx.md @@ -13,10 +13,10 @@ and [QNX][qnx.com]. ## Target maintainers -- Florian Bartels, `Florian.Bartels@elektrobit.com`, https://github.com/flba-eb -- Tristan Roach, `TRoach@blackberry.com`, https://github.com/gh-tr -- Jonathan Pallant `Jonathan.Pallant@ferrous-systems.com`, https://github.com/jonathanpallant -- Jorge Aparicio `Jorge.Aparicio@ferrous-systems.com`, https://github.com/japaric +[@flba-eb](https://github.com/flba-eb) +[@gh-tr](https://github.com/gh-tr) +[@jonathanpallant](https://github.com/jonathanpallant) +[@japaric](https://github.com/japaric) ## Requirements diff --git a/src/doc/rustc/src/platform-support/nuttx.md b/src/doc/rustc/src/platform-support/nuttx.md index f76fe0887b5dd..df3f4e7b394ed 100644 --- a/src/doc/rustc/src/platform-support/nuttx.md +++ b/src/doc/rustc/src/platform-support/nuttx.md @@ -12,7 +12,7 @@ For brevity, many parts of the documentation will refer to Apache NuttX as simpl ## Target maintainers -- Qi Huang [@no1wudi](https://github.com/no1wudi) +[@no1wudi](https://github.com/no1wudi) ## Requirements diff --git a/src/doc/rustc/src/platform-support/nvptx64-nvidia-cuda.md b/src/doc/rustc/src/platform-support/nvptx64-nvidia-cuda.md index ab8641ff69ae2..106ec562bfc79 100644 --- a/src/doc/rustc/src/platform-support/nvptx64-nvidia-cuda.md +++ b/src/doc/rustc/src/platform-support/nvptx64-nvidia-cuda.md @@ -7,8 +7,8 @@ platform. ## Target maintainers -- Riccardo D'Ambrosio, https://github.com/RDambrosio016 -- Kjetil Kjeka, https://github.com/kjetilkjeka +[@RDambrosio016](https://github.com/RDambrosio016) +[@kjetilkjeka](https://github.com/kjetilkjeka) $DIR/srcloc.rs:15:15 - | -LL | asm!("invalid_instruction"); - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | invalid_instruction - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:19:13 - | -LL | invalid_instruction - | ^ - | -note: instantiated into assembly here - --> :2:13 - | -LL | invalid_instruction - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:24:13 - | -LL | invalid_instruction - | ^ - | -note: instantiated into assembly here - --> :2:13 - | -LL | invalid_instruction - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:30:13 - | -LL | invalid_instruction - | ^ - | -note: instantiated into assembly here - --> :3:13 - | -LL | invalid_instruction - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:37:13 - | -LL | invalid_instruction - | ^ - | -note: instantiated into assembly here - --> :3:13 - | -LL | invalid_instruction - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:42:14 - | -LL | asm!(concat!("invalid", "_", "instruction")); - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | invalid_instruction - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:46:14 - | -LL | "invalid_instruction", - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | invalid_instruction - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:52:14 - | -LL | "invalid_instruction", - | ^ - | -note: instantiated into assembly here - --> :2:1 - | -LL | invalid_instruction - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:59:14 - | -LL | "invalid_instruction", - | ^ - | -note: instantiated into assembly here - --> :3:1 - | -LL | invalid_instruction - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:66:13 - | -LL | concat!("invalid", "_", "instruction"), - | ^ - | -note: instantiated into assembly here - --> :2:1 - | -LL | invalid_instruction - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:73:13 - | -LL | concat!("invalid", "_", "instruction"), - | ^ - | -note: instantiated into assembly here - --> :2:1 - | -LL | invalid_instruction - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:80:14 - | -LL | "invalid_instruction1", - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | invalid_instruction1 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:81:14 - | -LL | "invalid_instruction2", - | ^ - | -note: instantiated into assembly here - --> :2:1 - | -LL | invalid_instruction2 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:87:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | invalid_instruction1 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:87:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :2:1 - | -LL | invalid_instruction2 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:96:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | invalid_instruction1 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:96:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :2:1 - | -LL | invalid_instruction2 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:100:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :3:1 - | -LL | invalid_instruction3 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:100:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :4:1 - | -LL | invalid_instruction4 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:111:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | invalid_instruction1 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:111:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :2:1 - | -LL | invalid_instruction2 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:115:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :4:1 - | -LL | invalid_instruction3 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:115:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :5:1 - | -LL | invalid_instruction4 - | ^ - -error: unrecognized instruction mnemonic - --> $DIR/srcloc.rs:128:14 - | -LL | "invalid_instruction" - | ^ - | -note: instantiated into assembly here - --> :4:1 - | -LL | invalid_instruction - | ^ - -error: aborting due to 24 previous errors - diff --git a/tests/ui/asm/aarch64/srcloc.rs b/tests/ui/asm/aarch64/srcloc.rs index 9b92dfef056d0..c635fa6ba700a 100644 --- a/tests/ui/asm/aarch64/srcloc.rs +++ b/tests/ui/asm/aarch64/srcloc.rs @@ -1,10 +1,7 @@ -//@ revisions: old new //@ only-aarch64 //@ build-fail //@ needs-asm-support //@ compile-flags: -Ccodegen-units=1 -//@[old] ignore-llvm-version: 19 - 99 -//@[new] min-llvm-version: 19 use std::arch::asm; diff --git a/tests/ui/asm/aarch64/srcloc.new.stderr b/tests/ui/asm/aarch64/srcloc.stderr similarity index 100% rename from tests/ui/asm/aarch64/srcloc.new.stderr rename to tests/ui/asm/aarch64/srcloc.stderr diff --git a/tests/ui/asm/inline-syntax.arm.stderr b/tests/ui/asm/inline-syntax.arm.stderr index 4003a10f37452..5b4eb3cc1409c 100644 --- a/tests/ui/asm/inline-syntax.arm.stderr +++ b/tests/ui/asm/inline-syntax.arm.stderr @@ -15,7 +15,7 @@ LL | .intel_syntax noprefix | ^ error: unknown directive - --> $DIR/inline-syntax.rs:26:15 + --> $DIR/inline-syntax.rs:21:15 | LL | asm!(".intel_syntax noprefix", "nop"); | ^^^^^^^^^^^^^^^^^^^^^^ @@ -27,7 +27,7 @@ LL | .intel_syntax noprefix | ^ error: unknown directive - --> $DIR/inline-syntax.rs:30:15 + --> $DIR/inline-syntax.rs:24:15 | LL | asm!(".intel_syntax aaa noprefix", "nop"); | ^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -39,7 +39,7 @@ LL | .intel_syntax aaa noprefix | ^ error: unknown directive - --> $DIR/inline-syntax.rs:34:15 + --> $DIR/inline-syntax.rs:27:15 | LL | asm!(".att_syntax noprefix", "nop"); | ^^^^^^^^^^^^^^^^^^^^ @@ -51,7 +51,7 @@ LL | .att_syntax noprefix | ^ error: unknown directive - --> $DIR/inline-syntax.rs:38:15 + --> $DIR/inline-syntax.rs:30:15 | LL | asm!(".att_syntax bbb noprefix", "nop"); | ^^^^^^^^^^^^^^^^^^^^^^^^ @@ -63,7 +63,7 @@ LL | .att_syntax bbb noprefix | ^ error: unknown directive - --> $DIR/inline-syntax.rs:42:15 + --> $DIR/inline-syntax.rs:33:15 | LL | asm!(".intel_syntax noprefix; nop"); | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -75,7 +75,7 @@ LL | .intel_syntax noprefix; nop | ^ error: unknown directive - --> $DIR/inline-syntax.rs:49:13 + --> $DIR/inline-syntax.rs:39:13 | LL | .intel_syntax noprefix | ^^^^^^^^^^^^^^^^^^^^^^ diff --git a/tests/ui/asm/inline-syntax.arm_llvm_18.stderr b/tests/ui/asm/inline-syntax.arm_llvm_18.stderr deleted file mode 100644 index a03861c78a3e6..0000000000000 --- a/tests/ui/asm/inline-syntax.arm_llvm_18.stderr +++ /dev/null @@ -1,90 +0,0 @@ -error: unknown directive - | -note: instantiated into assembly here - --> :1:1 - | -LL | .intel_syntax noprefix - | ^ - -error: unknown directive - | -note: instantiated into assembly here - --> :1:1 - | -LL | .intel_syntax noprefix - | ^ - -error: unknown directive - --> $DIR/inline-syntax.rs:26:15 - | -LL | asm!(".intel_syntax noprefix", "nop"); - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | .intel_syntax noprefix - | ^ - -error: unknown directive - --> $DIR/inline-syntax.rs:30:15 - | -LL | asm!(".intel_syntax aaa noprefix", "nop"); - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | .intel_syntax aaa noprefix - | ^ - -error: unknown directive - --> $DIR/inline-syntax.rs:34:15 - | -LL | asm!(".att_syntax noprefix", "nop"); - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | .att_syntax noprefix - | ^ - -error: unknown directive - --> $DIR/inline-syntax.rs:38:15 - | -LL | asm!(".att_syntax bbb noprefix", "nop"); - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | .att_syntax bbb noprefix - | ^ - -error: unknown directive - --> $DIR/inline-syntax.rs:42:15 - | -LL | asm!(".intel_syntax noprefix; nop"); - | ^ - | -note: instantiated into assembly here - --> :1:2 - | -LL | .intel_syntax noprefix; nop - | ^ - -error: unknown directive - --> $DIR/inline-syntax.rs:49:13 - | -LL | .intel_syntax noprefix - | ^ - | -note: instantiated into assembly here - --> :2:13 - | -LL | .intel_syntax noprefix - | ^ - -error: aborting due to 8 previous errors - diff --git a/tests/ui/asm/inline-syntax.rs b/tests/ui/asm/inline-syntax.rs index 78f30d50d8c0a..5f2f4e357f9ce 100644 --- a/tests/ui/asm/inline-syntax.rs +++ b/tests/ui/asm/inline-syntax.rs @@ -1,17 +1,12 @@ //@ add-core-stubs -//@ revisions: x86_64 arm_llvm_18 arm +//@ revisions: x86_64 arm //@[x86_64] compile-flags: --target x86_64-unknown-linux-gnu //@[x86_64] check-pass //@[x86_64] needs-llvm-components: x86 -//@[arm_llvm_18] compile-flags: --target armv7-unknown-linux-gnueabihf -//@[arm_llvm_18] build-fail -//@[arm_llvm_18] needs-llvm-components: arm -//@[arm_llvm_18] ignore-llvm-version: 19 - 99 // LLVM 19+ has full support for 64-bit cookies. //@[arm] compile-flags: --target armv7-unknown-linux-gnueabihf //@[arm] build-fail //@[arm] needs-llvm-components: arm -//@[arm] min-llvm-version: 19 //@ needs-asm-support #![feature(no_core)] @@ -26,23 +21,18 @@ pub fn main() { asm!(".intel_syntax noprefix", "nop"); //[x86_64]~^ WARN avoid using `.intel_syntax` //[arm]~^^ ERROR unknown directive - //[arm_llvm_18]~^^^ ERROR unknown directive asm!(".intel_syntax aaa noprefix", "nop"); //[x86_64]~^ WARN avoid using `.intel_syntax` //[arm]~^^ ERROR unknown directive - //[arm_llvm_18]~^^^ ERROR unknown directive asm!(".att_syntax noprefix", "nop"); //[x86_64]~^ WARN avoid using `.att_syntax` //[arm]~^^ ERROR unknown directive - //[arm_llvm_18]~^^^ ERROR unknown directive asm!(".att_syntax bbb noprefix", "nop"); //[x86_64]~^ WARN avoid using `.att_syntax` //[arm]~^^ ERROR unknown directive - //[arm_llvm_18]~^^^ ERROR unknown directive asm!(".intel_syntax noprefix; nop"); //[x86_64]~^ WARN avoid using `.intel_syntax` //[arm]~^^ ERROR unknown directive - //[arm_llvm_18]~^^^ ERROR unknown directive asm!( r" @@ -51,7 +41,6 @@ pub fn main() { ); //[x86_64]~^^^ WARN avoid using `.intel_syntax` //[arm]~^^^^ ERROR unknown directive - //[arm_llvm_18]~^^^^^ ERROR unknown directive } } @@ -59,7 +48,5 @@ global_asm!(".intel_syntax noprefix", "nop"); //[x86_64]~^ WARN avoid using `.intel_syntax` // Global assembly errors don't have line numbers, so no error on ARM. -//[arm_llvm_18]~? ERROR unknown directive -//[arm_llvm_18]~? ERROR unknown directive //[arm]~? ERROR unknown directive //[arm]~? ERROR unknown directive diff --git a/tests/ui/asm/inline-syntax.x86_64.stderr b/tests/ui/asm/inline-syntax.x86_64.stderr index 369f7b66ae45a..2d8091c204411 100644 --- a/tests/ui/asm/inline-syntax.x86_64.stderr +++ b/tests/ui/asm/inline-syntax.x86_64.stderr @@ -1,5 +1,5 @@ warning: avoid using `.intel_syntax`, Intel syntax is the default - --> $DIR/inline-syntax.rs:58:14 + --> $DIR/inline-syntax.rs:47:14 | LL | global_asm!(".intel_syntax noprefix", "nop"); | ^^^^^^^^^^^^^^^^^^^^^^ @@ -7,37 +7,37 @@ LL | global_asm!(".intel_syntax noprefix", "nop"); = note: `#[warn(bad_asm_style)]` on by default warning: avoid using `.intel_syntax`, Intel syntax is the default - --> $DIR/inline-syntax.rs:26:15 + --> $DIR/inline-syntax.rs:21:15 | LL | asm!(".intel_syntax noprefix", "nop"); | ^^^^^^^^^^^^^^^^^^^^^^ warning: avoid using `.intel_syntax`, Intel syntax is the default - --> $DIR/inline-syntax.rs:30:15 + --> $DIR/inline-syntax.rs:24:15 | LL | asm!(".intel_syntax aaa noprefix", "nop"); | ^^^^^^^^^^^^^^^^^^^^^^^^^^ warning: avoid using `.att_syntax`, prefer using `options(att_syntax)` instead - --> $DIR/inline-syntax.rs:34:15 + --> $DIR/inline-syntax.rs:27:15 | LL | asm!(".att_syntax noprefix", "nop"); | ^^^^^^^^^^^^^^^^^^^^ warning: avoid using `.att_syntax`, prefer using `options(att_syntax)` instead - --> $DIR/inline-syntax.rs:38:15 + --> $DIR/inline-syntax.rs:30:15 | LL | asm!(".att_syntax bbb noprefix", "nop"); | ^^^^^^^^^^^^^^^^^^^^^^^^ warning: avoid using `.intel_syntax`, Intel syntax is the default - --> $DIR/inline-syntax.rs:42:15 + --> $DIR/inline-syntax.rs:33:15 | LL | asm!(".intel_syntax noprefix; nop"); | ^^^^^^^^^^^^^^^^^^^^^^ warning: avoid using `.intel_syntax`, Intel syntax is the default - --> $DIR/inline-syntax.rs:49:13 + --> $DIR/inline-syntax.rs:39:13 | LL | .intel_syntax noprefix | ^^^^^^^^^^^^^^^^^^^^^^ diff --git a/tests/ui/asm/riscv/riscv32e-registers.riscv32e.stderr b/tests/ui/asm/riscv/riscv32e-registers.riscv32e.stderr index 07c1bf211839b..5d527cd70b81a 100644 --- a/tests/ui/asm/riscv/riscv32e-registers.riscv32e.stderr +++ b/tests/ui/asm/riscv/riscv32e-registers.riscv32e.stderr @@ -1,5 +1,5 @@ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:54:11 + --> $DIR/riscv32e-registers.rs:42:11 | LL | asm!("li x16, 0"); | ^^^^^^^^^ @@ -11,7 +11,7 @@ LL | li x16, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:57:11 + --> $DIR/riscv32e-registers.rs:45:11 | LL | asm!("li x17, 0"); | ^^^^^^^^^ @@ -23,7 +23,7 @@ LL | li x17, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:60:11 + --> $DIR/riscv32e-registers.rs:48:11 | LL | asm!("li x18, 0"); | ^^^^^^^^^ @@ -35,7 +35,7 @@ LL | li x18, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:63:11 + --> $DIR/riscv32e-registers.rs:51:11 | LL | asm!("li x19, 0"); | ^^^^^^^^^ @@ -47,7 +47,7 @@ LL | li x19, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:66:11 + --> $DIR/riscv32e-registers.rs:54:11 | LL | asm!("li x20, 0"); | ^^^^^^^^^ @@ -59,7 +59,7 @@ LL | li x20, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:69:11 + --> $DIR/riscv32e-registers.rs:57:11 | LL | asm!("li x21, 0"); | ^^^^^^^^^ @@ -71,7 +71,7 @@ LL | li x21, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:72:11 + --> $DIR/riscv32e-registers.rs:60:11 | LL | asm!("li x22, 0"); | ^^^^^^^^^ @@ -83,7 +83,7 @@ LL | li x22, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:75:11 + --> $DIR/riscv32e-registers.rs:63:11 | LL | asm!("li x23, 0"); | ^^^^^^^^^ @@ -95,7 +95,7 @@ LL | li x23, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:78:11 + --> $DIR/riscv32e-registers.rs:66:11 | LL | asm!("li x24, 0"); | ^^^^^^^^^ @@ -107,7 +107,7 @@ LL | li x24, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:81:11 + --> $DIR/riscv32e-registers.rs:69:11 | LL | asm!("li x25, 0"); | ^^^^^^^^^ @@ -119,7 +119,7 @@ LL | li x25, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:84:11 + --> $DIR/riscv32e-registers.rs:72:11 | LL | asm!("li x26, 0"); | ^^^^^^^^^ @@ -131,7 +131,7 @@ LL | li x26, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:87:11 + --> $DIR/riscv32e-registers.rs:75:11 | LL | asm!("li x27, 0"); | ^^^^^^^^^ @@ -143,7 +143,7 @@ LL | li x27, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:90:11 + --> $DIR/riscv32e-registers.rs:78:11 | LL | asm!("li x28, 0"); | ^^^^^^^^^ @@ -155,7 +155,7 @@ LL | li x28, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:93:11 + --> $DIR/riscv32e-registers.rs:81:11 | LL | asm!("li x29, 0"); | ^^^^^^^^^ @@ -167,7 +167,7 @@ LL | li x29, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:96:11 + --> $DIR/riscv32e-registers.rs:84:11 | LL | asm!("li x30, 0"); | ^^^^^^^^^ @@ -179,7 +179,7 @@ LL | li x30, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:99:11 + --> $DIR/riscv32e-registers.rs:87:11 | LL | asm!("li x31, 0"); | ^^^^^^^^^ diff --git a/tests/ui/asm/riscv/riscv32e-registers.riscv32e_llvm_18.stderr b/tests/ui/asm/riscv/riscv32e-registers.riscv32e_llvm_18.stderr deleted file mode 100644 index 59009b8c3525c..0000000000000 --- a/tests/ui/asm/riscv/riscv32e-registers.riscv32e_llvm_18.stderr +++ /dev/null @@ -1,194 +0,0 @@ -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:54:11 - | -LL | asm!("li x16, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x16, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:57:11 - | -LL | asm!("li x17, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x17, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:60:11 - | -LL | asm!("li x18, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x18, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:63:11 - | -LL | asm!("li x19, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x19, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:66:11 - | -LL | asm!("li x20, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x20, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:69:11 - | -LL | asm!("li x21, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x21, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:72:11 - | -LL | asm!("li x22, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x22, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:75:11 - | -LL | asm!("li x23, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x23, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:78:11 - | -LL | asm!("li x24, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x24, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:81:11 - | -LL | asm!("li x25, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x25, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:84:11 - | -LL | asm!("li x26, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x26, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:87:11 - | -LL | asm!("li x27, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x27, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:90:11 - | -LL | asm!("li x28, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x28, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:93:11 - | -LL | asm!("li x29, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x29, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:96:11 - | -LL | asm!("li x30, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x30, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:99:11 - | -LL | asm!("li x31, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x31, 0 - | ^ - -error: aborting due to 16 previous errors - diff --git a/tests/ui/asm/riscv/riscv32e-registers.riscv32em.stderr b/tests/ui/asm/riscv/riscv32e-registers.riscv32em.stderr index 07c1bf211839b..5d527cd70b81a 100644 --- a/tests/ui/asm/riscv/riscv32e-registers.riscv32em.stderr +++ b/tests/ui/asm/riscv/riscv32e-registers.riscv32em.stderr @@ -1,5 +1,5 @@ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:54:11 + --> $DIR/riscv32e-registers.rs:42:11 | LL | asm!("li x16, 0"); | ^^^^^^^^^ @@ -11,7 +11,7 @@ LL | li x16, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:57:11 + --> $DIR/riscv32e-registers.rs:45:11 | LL | asm!("li x17, 0"); | ^^^^^^^^^ @@ -23,7 +23,7 @@ LL | li x17, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:60:11 + --> $DIR/riscv32e-registers.rs:48:11 | LL | asm!("li x18, 0"); | ^^^^^^^^^ @@ -35,7 +35,7 @@ LL | li x18, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:63:11 + --> $DIR/riscv32e-registers.rs:51:11 | LL | asm!("li x19, 0"); | ^^^^^^^^^ @@ -47,7 +47,7 @@ LL | li x19, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:66:11 + --> $DIR/riscv32e-registers.rs:54:11 | LL | asm!("li x20, 0"); | ^^^^^^^^^ @@ -59,7 +59,7 @@ LL | li x20, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:69:11 + --> $DIR/riscv32e-registers.rs:57:11 | LL | asm!("li x21, 0"); | ^^^^^^^^^ @@ -71,7 +71,7 @@ LL | li x21, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:72:11 + --> $DIR/riscv32e-registers.rs:60:11 | LL | asm!("li x22, 0"); | ^^^^^^^^^ @@ -83,7 +83,7 @@ LL | li x22, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:75:11 + --> $DIR/riscv32e-registers.rs:63:11 | LL | asm!("li x23, 0"); | ^^^^^^^^^ @@ -95,7 +95,7 @@ LL | li x23, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:78:11 + --> $DIR/riscv32e-registers.rs:66:11 | LL | asm!("li x24, 0"); | ^^^^^^^^^ @@ -107,7 +107,7 @@ LL | li x24, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:81:11 + --> $DIR/riscv32e-registers.rs:69:11 | LL | asm!("li x25, 0"); | ^^^^^^^^^ @@ -119,7 +119,7 @@ LL | li x25, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:84:11 + --> $DIR/riscv32e-registers.rs:72:11 | LL | asm!("li x26, 0"); | ^^^^^^^^^ @@ -131,7 +131,7 @@ LL | li x26, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:87:11 + --> $DIR/riscv32e-registers.rs:75:11 | LL | asm!("li x27, 0"); | ^^^^^^^^^ @@ -143,7 +143,7 @@ LL | li x27, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:90:11 + --> $DIR/riscv32e-registers.rs:78:11 | LL | asm!("li x28, 0"); | ^^^^^^^^^ @@ -155,7 +155,7 @@ LL | li x28, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:93:11 + --> $DIR/riscv32e-registers.rs:81:11 | LL | asm!("li x29, 0"); | ^^^^^^^^^ @@ -167,7 +167,7 @@ LL | li x29, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:96:11 + --> $DIR/riscv32e-registers.rs:84:11 | LL | asm!("li x30, 0"); | ^^^^^^^^^ @@ -179,7 +179,7 @@ LL | li x30, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:99:11 + --> $DIR/riscv32e-registers.rs:87:11 | LL | asm!("li x31, 0"); | ^^^^^^^^^ diff --git a/tests/ui/asm/riscv/riscv32e-registers.riscv32em_llvm_18.stderr b/tests/ui/asm/riscv/riscv32e-registers.riscv32em_llvm_18.stderr deleted file mode 100644 index 59009b8c3525c..0000000000000 --- a/tests/ui/asm/riscv/riscv32e-registers.riscv32em_llvm_18.stderr +++ /dev/null @@ -1,194 +0,0 @@ -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:54:11 - | -LL | asm!("li x16, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x16, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:57:11 - | -LL | asm!("li x17, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x17, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:60:11 - | -LL | asm!("li x18, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x18, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:63:11 - | -LL | asm!("li x19, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x19, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:66:11 - | -LL | asm!("li x20, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x20, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:69:11 - | -LL | asm!("li x21, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x21, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:72:11 - | -LL | asm!("li x22, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x22, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:75:11 - | -LL | asm!("li x23, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x23, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:78:11 - | -LL | asm!("li x24, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x24, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:81:11 - | -LL | asm!("li x25, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x25, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:84:11 - | -LL | asm!("li x26, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x26, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:87:11 - | -LL | asm!("li x27, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x27, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:90:11 - | -LL | asm!("li x28, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x28, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:93:11 - | -LL | asm!("li x29, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x29, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:96:11 - | -LL | asm!("li x30, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x30, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:99:11 - | -LL | asm!("li x31, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x31, 0 - | ^ - -error: aborting due to 16 previous errors - diff --git a/tests/ui/asm/riscv/riscv32e-registers.riscv32emc.stderr b/tests/ui/asm/riscv/riscv32e-registers.riscv32emc.stderr index 07c1bf211839b..5d527cd70b81a 100644 --- a/tests/ui/asm/riscv/riscv32e-registers.riscv32emc.stderr +++ b/tests/ui/asm/riscv/riscv32e-registers.riscv32emc.stderr @@ -1,5 +1,5 @@ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:54:11 + --> $DIR/riscv32e-registers.rs:42:11 | LL | asm!("li x16, 0"); | ^^^^^^^^^ @@ -11,7 +11,7 @@ LL | li x16, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:57:11 + --> $DIR/riscv32e-registers.rs:45:11 | LL | asm!("li x17, 0"); | ^^^^^^^^^ @@ -23,7 +23,7 @@ LL | li x17, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:60:11 + --> $DIR/riscv32e-registers.rs:48:11 | LL | asm!("li x18, 0"); | ^^^^^^^^^ @@ -35,7 +35,7 @@ LL | li x18, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:63:11 + --> $DIR/riscv32e-registers.rs:51:11 | LL | asm!("li x19, 0"); | ^^^^^^^^^ @@ -47,7 +47,7 @@ LL | li x19, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:66:11 + --> $DIR/riscv32e-registers.rs:54:11 | LL | asm!("li x20, 0"); | ^^^^^^^^^ @@ -59,7 +59,7 @@ LL | li x20, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:69:11 + --> $DIR/riscv32e-registers.rs:57:11 | LL | asm!("li x21, 0"); | ^^^^^^^^^ @@ -71,7 +71,7 @@ LL | li x21, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:72:11 + --> $DIR/riscv32e-registers.rs:60:11 | LL | asm!("li x22, 0"); | ^^^^^^^^^ @@ -83,7 +83,7 @@ LL | li x22, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:75:11 + --> $DIR/riscv32e-registers.rs:63:11 | LL | asm!("li x23, 0"); | ^^^^^^^^^ @@ -95,7 +95,7 @@ LL | li x23, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:78:11 + --> $DIR/riscv32e-registers.rs:66:11 | LL | asm!("li x24, 0"); | ^^^^^^^^^ @@ -107,7 +107,7 @@ LL | li x24, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:81:11 + --> $DIR/riscv32e-registers.rs:69:11 | LL | asm!("li x25, 0"); | ^^^^^^^^^ @@ -119,7 +119,7 @@ LL | li x25, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:84:11 + --> $DIR/riscv32e-registers.rs:72:11 | LL | asm!("li x26, 0"); | ^^^^^^^^^ @@ -131,7 +131,7 @@ LL | li x26, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:87:11 + --> $DIR/riscv32e-registers.rs:75:11 | LL | asm!("li x27, 0"); | ^^^^^^^^^ @@ -143,7 +143,7 @@ LL | li x27, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:90:11 + --> $DIR/riscv32e-registers.rs:78:11 | LL | asm!("li x28, 0"); | ^^^^^^^^^ @@ -155,7 +155,7 @@ LL | li x28, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:93:11 + --> $DIR/riscv32e-registers.rs:81:11 | LL | asm!("li x29, 0"); | ^^^^^^^^^ @@ -167,7 +167,7 @@ LL | li x29, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:96:11 + --> $DIR/riscv32e-registers.rs:84:11 | LL | asm!("li x30, 0"); | ^^^^^^^^^ @@ -179,7 +179,7 @@ LL | li x30, 0 | ^ error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:99:11 + --> $DIR/riscv32e-registers.rs:87:11 | LL | asm!("li x31, 0"); | ^^^^^^^^^ diff --git a/tests/ui/asm/riscv/riscv32e-registers.riscv32emc_llvm_18.stderr b/tests/ui/asm/riscv/riscv32e-registers.riscv32emc_llvm_18.stderr deleted file mode 100644 index 59009b8c3525c..0000000000000 --- a/tests/ui/asm/riscv/riscv32e-registers.riscv32emc_llvm_18.stderr +++ /dev/null @@ -1,194 +0,0 @@ -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:54:11 - | -LL | asm!("li x16, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x16, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:57:11 - | -LL | asm!("li x17, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x17, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:60:11 - | -LL | asm!("li x18, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x18, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:63:11 - | -LL | asm!("li x19, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x19, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:66:11 - | -LL | asm!("li x20, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x20, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:69:11 - | -LL | asm!("li x21, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x21, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:72:11 - | -LL | asm!("li x22, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x22, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:75:11 - | -LL | asm!("li x23, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x23, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:78:11 - | -LL | asm!("li x24, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x24, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:81:11 - | -LL | asm!("li x25, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x25, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:84:11 - | -LL | asm!("li x26, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x26, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:87:11 - | -LL | asm!("li x27, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x27, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:90:11 - | -LL | asm!("li x28, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x28, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:93:11 - | -LL | asm!("li x29, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x29, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:96:11 - | -LL | asm!("li x30, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x30, 0 - | ^ - -error: invalid operand for instruction - --> $DIR/riscv32e-registers.rs:99:11 - | -LL | asm!("li x31, 0"); - | ^ - | -note: instantiated into assembly here - --> :1:5 - | -LL | li x31, 0 - | ^ - -error: aborting due to 16 previous errors - diff --git a/tests/ui/asm/riscv/riscv32e-registers.rs b/tests/ui/asm/riscv/riscv32e-registers.rs index 99cbdf5ead3f8..96bfe2af06448 100644 --- a/tests/ui/asm/riscv/riscv32e-registers.rs +++ b/tests/ui/asm/riscv/riscv32e-registers.rs @@ -2,27 +2,15 @@ // //@ add-core-stubs //@ build-fail -//@ revisions: riscv32e riscv32em riscv32emc riscv32e_llvm_18 riscv32em_llvm_18 riscv32emc_llvm_18 +//@ revisions: riscv32e riscv32em riscv32emc // //@ compile-flags: --crate-type=rlib //@ [riscv32e] needs-llvm-components: riscv //@ [riscv32e] compile-flags: --target=riscv32e-unknown-none-elf -//@ [riscv32e] min-llvm-version: 19 //@ [riscv32em] needs-llvm-components: riscv //@ [riscv32em] compile-flags: --target=riscv32em-unknown-none-elf -//@ [riscv32em] min-llvm-version: 19 //@ [riscv32emc] needs-llvm-components: riscv //@ [riscv32emc] compile-flags: --target=riscv32emc-unknown-none-elf -//@ [riscv32emc] min-llvm-version: 19 -//@ [riscv32e_llvm_18] needs-llvm-components: riscv -//@ [riscv32e_llvm_18] compile-flags: --target=riscv32e-unknown-none-elf -//@ [riscv32e_llvm_18] ignore-llvm-version: 19 - 99 -//@ [riscv32em_llvm_18] needs-llvm-components: riscv -//@ [riscv32em_llvm_18] compile-flags: --target=riscv32em-unknown-none-elf -//@ [riscv32em_llvm_18] ignore-llvm-version: 19 - 99 -//@ [riscv32emc_llvm_18] needs-llvm-components: riscv -//@ [riscv32emc_llvm_18] compile-flags: --target=riscv32emc-unknown-none-elf -//@ [riscv32emc_llvm_18] ignore-llvm-version: 19 - 99 // Unlike bad-reg.rs, this tests if the assembler can reject invalid registers // usage in assembly code. diff --git a/tests/ui/asm/x86_64/srcloc.old.stderr b/tests/ui/asm/x86_64/srcloc.old.stderr deleted file mode 100644 index edb9ee46812f8..0000000000000 --- a/tests/ui/asm/x86_64/srcloc.old.stderr +++ /dev/null @@ -1,302 +0,0 @@ -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:14:15 - | -LL | asm!("invalid_instruction"); - | ^ - | -note: instantiated into assembly here - --> :2:2 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:18:13 - | -LL | invalid_instruction - | ^ - | -note: instantiated into assembly here - --> :3:13 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:23:13 - | -LL | invalid_instruction - | ^ - | -note: instantiated into assembly here - --> :3:13 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:29:13 - | -LL | invalid_instruction - | ^ - | -note: instantiated into assembly here - --> :4:13 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:36:13 - | -LL | invalid_instruction - | ^ - | -note: instantiated into assembly here - --> :4:13 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:41:14 - | -LL | asm!(concat!("invalid", "_", "instruction")); - | ^ - | -note: instantiated into assembly here - --> :2:2 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -warning: scale factor without index register is ignored - --> $DIR/srcloc.rs:44:15 - | -LL | asm!("movaps %xmm3, (%esi, 2)", options(att_syntax)); - | ^ - | -note: instantiated into assembly here - --> :1:23 - | -LL | movaps %xmm3, (%esi, 2) - | ^ - -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:48:14 - | -LL | "invalid_instruction", - | ^ - | -note: instantiated into assembly here - --> :2:2 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:54:14 - | -LL | "invalid_instruction", - | ^ - | -note: instantiated into assembly here - --> :3:1 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:61:14 - | -LL | "invalid_instruction", - | ^ - | -note: instantiated into assembly here - --> :4:1 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:68:13 - | -LL | concat!("invalid", "_", "instruction"), - | ^ - | -note: instantiated into assembly here - --> :3:1 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:75:13 - | -LL | concat!("invalid", "_", "instruction"), - | ^ - | -note: instantiated into assembly here - --> :3:1 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction1' - --> $DIR/srcloc.rs:82:14 - | -LL | "invalid_instruction1", - | ^ - | -note: instantiated into assembly here - --> :2:2 - | -LL | invalid_instruction1 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction2' - --> $DIR/srcloc.rs:83:14 - | -LL | "invalid_instruction2", - | ^ - | -note: instantiated into assembly here - --> :3:1 - | -LL | invalid_instruction2 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction1' - --> $DIR/srcloc.rs:89:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :2:2 - | -LL | invalid_instruction1 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction2' - --> $DIR/srcloc.rs:89:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :3:1 - | -LL | invalid_instruction2 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction1' - --> $DIR/srcloc.rs:98:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :2:2 - | -LL | invalid_instruction1 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction2' - --> $DIR/srcloc.rs:98:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :3:1 - | -LL | invalid_instruction2 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction3' - --> $DIR/srcloc.rs:102:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :4:1 - | -LL | invalid_instruction3 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction4' - --> $DIR/srcloc.rs:102:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :5:1 - | -LL | invalid_instruction4 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction1' - --> $DIR/srcloc.rs:113:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :2:2 - | -LL | invalid_instruction1 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction2' - --> $DIR/srcloc.rs:113:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :3:1 - | -LL | invalid_instruction2 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction3' - --> $DIR/srcloc.rs:117:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :5:1 - | -LL | invalid_instruction3 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction4' - --> $DIR/srcloc.rs:117:13 - | -LL | concat!( - | ^ - | -note: instantiated into assembly here - --> :6:1 - | -LL | invalid_instruction4 - | ^^^^^^^^^^^^^^^^^^^^ - -error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:130:14 - | -LL | "invalid_instruction" - | ^ - | -note: instantiated into assembly here - --> :5:1 - | -LL | invalid_instruction - | ^^^^^^^^^^^^^^^^^^^ - -error: aborting due to 24 previous errors; 1 warning emitted - diff --git a/tests/ui/asm/x86_64/srcloc.rs b/tests/ui/asm/x86_64/srcloc.rs index 40fc66cbc929c..2938bafe5e70c 100644 --- a/tests/ui/asm/x86_64/srcloc.rs +++ b/tests/ui/asm/x86_64/srcloc.rs @@ -1,9 +1,6 @@ -//@ revisions: old new //@ only-x86_64 //@ build-fail //@ compile-flags: -Ccodegen-units=1 -//@[old] ignore-llvm-version: 19 - 99 -//@[new] min-llvm-version: 19 use std::arch::asm; diff --git a/tests/ui/asm/x86_64/srcloc.new.stderr b/tests/ui/asm/x86_64/srcloc.stderr similarity index 92% rename from tests/ui/asm/x86_64/srcloc.new.stderr rename to tests/ui/asm/x86_64/srcloc.stderr index 7211f1ab69dc0..bb4e855163d77 100644 --- a/tests/ui/asm/x86_64/srcloc.new.stderr +++ b/tests/ui/asm/x86_64/srcloc.stderr @@ -1,5 +1,5 @@ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:14:15 + --> $DIR/srcloc.rs:11:15 | LL | asm!("invalid_instruction"); | ^^^^^^^^^^^^^^^^^^^ @@ -11,7 +11,7 @@ LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:18:13 + --> $DIR/srcloc.rs:15:13 | LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ @@ -23,7 +23,7 @@ LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:23:13 + --> $DIR/srcloc.rs:20:13 | LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ @@ -35,7 +35,7 @@ LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:29:13 + --> $DIR/srcloc.rs:26:13 | LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ @@ -47,7 +47,7 @@ LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:36:13 + --> $DIR/srcloc.rs:33:13 | LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ @@ -59,7 +59,7 @@ LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:41:14 + --> $DIR/srcloc.rs:38:14 | LL | asm!(concat!("invalid", "_", "instruction")); | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -71,7 +71,7 @@ LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ warning: scale factor without index register is ignored - --> $DIR/srcloc.rs:44:15 + --> $DIR/srcloc.rs:41:15 | LL | asm!("movaps %xmm3, (%esi, 2)", options(att_syntax)); | ^^^^^^^^^^^^^^^^^^^^^^^ @@ -83,7 +83,7 @@ LL | movaps %xmm3, (%esi, 2) | ^ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:48:14 + --> $DIR/srcloc.rs:45:14 | LL | "invalid_instruction", | ^^^^^^^^^^^^^^^^^^^ @@ -95,7 +95,7 @@ LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:54:14 + --> $DIR/srcloc.rs:51:14 | LL | "invalid_instruction", | ^^^^^^^^^^^^^^^^^^^ @@ -107,7 +107,7 @@ LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:61:14 + --> $DIR/srcloc.rs:58:14 | LL | "invalid_instruction", | ^^^^^^^^^^^^^^^^^^^ @@ -119,7 +119,7 @@ LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:68:13 + --> $DIR/srcloc.rs:65:13 | LL | concat!("invalid", "_", "instruction"), | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -131,7 +131,7 @@ LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:75:13 + --> $DIR/srcloc.rs:72:13 | LL | concat!("invalid", "_", "instruction"), | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -143,7 +143,7 @@ LL | invalid_instruction | ^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction1' - --> $DIR/srcloc.rs:82:14 + --> $DIR/srcloc.rs:79:14 | LL | "invalid_instruction1", | ^^^^^^^^^^^^^^^^^^^^ @@ -155,7 +155,7 @@ LL | invalid_instruction1 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction2' - --> $DIR/srcloc.rs:83:14 + --> $DIR/srcloc.rs:80:14 | LL | "invalid_instruction2", | ^^^^^^^^^^^^^^^^^^^^ @@ -167,7 +167,7 @@ LL | invalid_instruction2 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction1' - --> $DIR/srcloc.rs:89:13 + --> $DIR/srcloc.rs:86:13 | LL | / concat!( LL | | "invalid", "_", "instruction1", "\n", @@ -182,7 +182,7 @@ LL | invalid_instruction1 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction2' - --> $DIR/srcloc.rs:89:13 + --> $DIR/srcloc.rs:86:13 | LL | / concat!( LL | | "invalid", "_", "instruction1", "\n", @@ -197,7 +197,7 @@ LL | invalid_instruction2 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction1' - --> $DIR/srcloc.rs:98:13 + --> $DIR/srcloc.rs:95:13 | LL | / concat!( LL | | "invalid", "_", "instruction1", "\n", @@ -212,7 +212,7 @@ LL | invalid_instruction1 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction2' - --> $DIR/srcloc.rs:98:13 + --> $DIR/srcloc.rs:95:13 | LL | / concat!( LL | | "invalid", "_", "instruction1", "\n", @@ -227,7 +227,7 @@ LL | invalid_instruction2 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction3' - --> $DIR/srcloc.rs:102:13 + --> $DIR/srcloc.rs:99:13 | LL | / concat!( LL | | "invalid", "_", "instruction3", "\n", @@ -242,7 +242,7 @@ LL | invalid_instruction3 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction4' - --> $DIR/srcloc.rs:102:13 + --> $DIR/srcloc.rs:99:13 | LL | / concat!( LL | | "invalid", "_", "instruction3", "\n", @@ -257,7 +257,7 @@ LL | invalid_instruction4 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction1' - --> $DIR/srcloc.rs:113:13 + --> $DIR/srcloc.rs:110:13 | LL | / concat!( LL | | "invalid", "_", "instruction1", "\n", @@ -272,7 +272,7 @@ LL | invalid_instruction1 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction2' - --> $DIR/srcloc.rs:113:13 + --> $DIR/srcloc.rs:110:13 | LL | / concat!( LL | | "invalid", "_", "instruction1", "\n", @@ -287,7 +287,7 @@ LL | invalid_instruction2 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction3' - --> $DIR/srcloc.rs:117:13 + --> $DIR/srcloc.rs:114:13 | LL | / concat!( LL | | "invalid", "_", "instruction3", "\n", @@ -302,7 +302,7 @@ LL | invalid_instruction3 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction4' - --> $DIR/srcloc.rs:117:13 + --> $DIR/srcloc.rs:114:13 | LL | / concat!( LL | | "invalid", "_", "instruction3", "\n", @@ -317,7 +317,7 @@ LL | invalid_instruction4 | ^^^^^^^^^^^^^^^^^^^^ error: invalid instruction mnemonic 'invalid_instruction' - --> $DIR/srcloc.rs:130:14 + --> $DIR/srcloc.rs:127:14 | LL | "invalid_instruction" | ^^^^^^^^^^^^^^^^^^^ diff --git a/tests/ui/instrument-coverage/mcdc-condition-limit.rs b/tests/ui/instrument-coverage/mcdc-condition-limit.rs index 118ae482fc6ce..74707ba2e670d 100644 --- a/tests/ui/instrument-coverage/mcdc-condition-limit.rs +++ b/tests/ui/instrument-coverage/mcdc-condition-limit.rs @@ -1,5 +1,4 @@ //@ edition: 2021 -//@ min-llvm-version: 19 //@ revisions: good //@ check-pass //@ compile-flags: -Cinstrument-coverage -Zcoverage-options=mcdc -Zno-profiler-runtime