From cf12e290fd5e356cef3c9d95643ea4dd4b093dfd Mon Sep 17 00:00:00 2001 From: Adrian Friedli Date: Tue, 29 Apr 2025 10:20:25 +0200 Subject: [PATCH] enable msa feature for mips in codegen tests --- tests/codegen/const-vector.rs | 2 ++ tests/codegen/repr/transparent.rs | 3 ++- tests/codegen/simd/extract-insert-dyn.rs | 10 +++++++++- 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/tests/codegen/const-vector.rs b/tests/codegen/const-vector.rs index 1d4edc39b1c88..289b67371ce43 100644 --- a/tests/codegen/const-vector.rs +++ b/tests/codegen/const-vector.rs @@ -9,6 +9,7 @@ #![feature(rustc_attrs)] #![feature(simd_ffi)] #![feature(arm_target_feature)] +#![feature(mips_target_feature)] #![allow(non_camel_case_types)] // Setting up structs that can be used as const vectors @@ -45,6 +46,7 @@ extern "unadjusted" { #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))] #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))] #[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))] +#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))] pub fn do_call() { unsafe { // CHECK: call void @test_i8x2(<2 x i8> diff --git a/tests/codegen/repr/transparent.rs b/tests/codegen/repr/transparent.rs index 5475bfb6b65ef..29b627462a4d9 100644 --- a/tests/codegen/repr/transparent.rs +++ b/tests/codegen/repr/transparent.rs @@ -9,7 +9,7 @@ // For LoongArch: see codegen/loongarch-abi #![crate_type = "lib"] -#![feature(repr_simd, transparent_unions, arm_target_feature)] +#![feature(repr_simd, transparent_unions, arm_target_feature, mips_target_feature)] use std::marker::PhantomData; @@ -142,6 +142,7 @@ pub struct Vector(f32x4); #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))] #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))] #[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))] +#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))] pub extern "C" fn test_Vector(_: Vector) -> Vector { loop {} } diff --git a/tests/codegen/simd/extract-insert-dyn.rs b/tests/codegen/simd/extract-insert-dyn.rs index 2c64f5d3c0939..7d032c6bb3ef3 100644 --- a/tests/codegen/simd/extract-insert-dyn.rs +++ b/tests/codegen/simd/extract-insert-dyn.rs @@ -1,6 +1,6 @@ //@compile-flags: -C opt-level=3 -C no-prepopulate-passes -#![feature(core_intrinsics, repr_simd, arm_target_feature)] +#![feature(core_intrinsics, repr_simd, arm_target_feature, mips_target_feature)] #![no_std] #![crate_type = "lib"] #![allow(non_camel_case_types)] @@ -24,6 +24,7 @@ pub struct i8x16([i8; 16]); #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))] #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))] #[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))] +#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))] unsafe extern "C" fn dyn_simd_extract(x: i8x16, idx: u32) -> i8 { simd_extract_dyn(x, idx) } @@ -34,6 +35,7 @@ unsafe extern "C" fn dyn_simd_extract(x: i8x16, idx: u32) -> i8 { #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))] #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))] #[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))] +#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))] unsafe extern "C" fn literal_dyn_simd_extract(x: i8x16) -> i8 { simd_extract_dyn(x, 7) } @@ -44,6 +46,7 @@ unsafe extern "C" fn literal_dyn_simd_extract(x: i8x16) -> i8 { #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))] #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))] #[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))] +#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))] unsafe extern "C" fn const_dyn_simd_extract(x: i8x16) -> i8 { simd_extract_dyn(x, const { 3 + 4 }) } @@ -54,6 +57,7 @@ unsafe extern "C" fn const_dyn_simd_extract(x: i8x16) -> i8 { #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))] #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))] #[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))] +#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))] unsafe extern "C" fn const_simd_extract(x: i8x16) -> i8 { simd_extract(x, const { 3 + 4 }) } @@ -64,6 +68,7 @@ unsafe extern "C" fn const_simd_extract(x: i8x16) -> i8 { #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))] #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))] #[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))] +#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))] unsafe extern "C" fn dyn_simd_insert(x: i8x16, e: i8, idx: u32) -> i8x16 { simd_insert_dyn(x, idx, e) } @@ -74,6 +79,7 @@ unsafe extern "C" fn dyn_simd_insert(x: i8x16, e: i8, idx: u32) -> i8x16 { #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))] #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))] #[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))] +#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))] unsafe extern "C" fn literal_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 { simd_insert_dyn(x, 7, e) } @@ -84,6 +90,7 @@ unsafe extern "C" fn literal_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 { #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))] #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))] #[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))] +#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))] unsafe extern "C" fn const_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 { simd_insert_dyn(x, const { 3 + 4 }, e) } @@ -94,6 +101,7 @@ unsafe extern "C" fn const_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 { #[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))] #[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))] #[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))] +#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))] unsafe extern "C" fn const_simd_insert(x: i8x16, e: i8) -> i8x16 { simd_insert(x, const { 3 + 4 }, e) }