diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino.dtsi b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino.dtsi index 186fc67615fa4e..4588af44d9d525 100644 --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino.dtsi +++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-fastrhino.dtsi @@ -46,16 +46,6 @@ vin-supply = <&vcc12v_dcin>; }; - vcc5v0_usb: vcc5v0-usb { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "vcc5v0_usb"; - vin-supply = <&vcc12v_dcin>; - }; - vcc5v0_usb_otg: vcc5v0-usb-otg { compatible = "regulator-fixed"; enable-active-high; @@ -65,7 +55,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-name = "vcc5v0_usb_otg"; - vin-supply = <&vcc5v0_usb>; + vin-supply = <&vcc5v0_sys>; }; vcc3v3_pcie: vcc3v3-pcie { @@ -75,10 +65,10 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc3v3_pcie"; - vin-supply = <&vcc12v_dcin>; + vin-supply = <&vcc5v0_sys>; }; - gpio-keys { + keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&reset_button_pin>; @@ -112,10 +102,6 @@ status = "okay"; }; -&combphy2 { - status = "okay"; -}; - &cpu0 { cpu-supply = <&vdd_cpu>; }; @@ -132,7 +118,6 @@ cpu-supply = <&vdd_cpu>; }; -#ifdef DTS_NO_LEGACY &display_subsystem { status = "disabled"; }; @@ -141,7 +126,6 @@ mali-supply = <&vdd_gpu>; status = "okay"; }; -#endif &i2c0 { status = "okay"; @@ -459,8 +443,8 @@ &pmu_io_domains { pmuio1-supply = <&vcc3v3_pmu>; pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio3-supply = <&vccio_sd>; + vccio1-supply = <&vcc_3v3>; + vccio3-supply = <&vcc_3v3>; vccio4-supply = <&vcc_1v8>; vccio5-supply = <&vcc_3v3>; vccio6-supply = <&vcc_1v8>; @@ -501,6 +485,7 @@ }; &usb2phy0_host { + phy-supply = <&vcc5v0_sys>; status = "okay"; }; @@ -509,7 +494,6 @@ status = "okay"; }; -#ifdef DTS_NO_LEGACY &vop { assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; @@ -519,4 +503,3 @@ &vop_mmu { status = "okay"; }; -#endif diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi index d7b42199716855..77c336a8f4c0be 100644 --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi +++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi @@ -22,7 +22,6 @@ stdout-path = "serial2:1500000n8"; }; -#ifdef DTS_NO_LEGACY hdmi-con { compatible = "hdmi-connector"; type = "a"; @@ -33,7 +32,6 @@ }; }; }; -#endif keys { compatible = "gpio-keys"; @@ -180,7 +178,6 @@ cpu-supply = <&vdd_cpu>; }; -#ifdef DTS_NO_LEGACY &gpu { mali-supply = <&vdd_gpu>; status = "okay"; @@ -207,7 +204,6 @@ &hdmi_sound { status = "okay"; }; -#endif &i2c0 { status = "okay"; @@ -451,11 +447,9 @@ status = "okay"; }; -#ifdef DTS_NO_LEGACY &i2s0_8ch { status = "okay"; }; -#endif &i2s1_8ch { rockchip,trcm-sync-tx-only; @@ -589,7 +583,7 @@ disable-wp; pinctrl-names = "default"; pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr104; + sd-uhs-sdr50; vmmc-supply = <&vcc3v3_sd>; vqmmc-supply = <&vccio_sd>; status = "okay"; @@ -648,7 +642,6 @@ status = "okay"; }; -#ifdef DTS_NO_LEGACY &vop { assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; @@ -665,4 +658,3 @@ remote-endpoint = <&hdmi_in_vp0>; }; }; -#endif diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts index 1541e747b14708..c5bb0080c29503 100644 --- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts @@ -8,7 +8,7 @@ #include "rk3568.dtsi" / { - model = "Radxa ROCK3 Model A"; + model = "Radxa ROCK 3A"; compatible = "radxa,rock3a", "rockchip,rk3568"; aliases { @@ -21,7 +21,6 @@ stdout-path = "serial2:1500000n8"; }; -#ifdef DTS_NO_LEGACY hdmi-con { compatible = "hdmi-connector"; type = "a"; @@ -32,7 +31,6 @@ }; }; }; -#endif leds { compatible = "gpio-leds"; @@ -62,14 +60,14 @@ }; }; - vcc12v_dcin: vcc12v-dcin { + vcc12v_dcin: vcc12v-dcin-regulator { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; regulator-always-on; regulator-boot-on; }; - vcc3v3_sys: vcc3v3-sys { + vcc3v3_sys: vcc3v3-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc3v3_sys"; regulator-always-on; @@ -79,7 +77,7 @@ vin-supply = <&vcc12v_dcin>; }; - vcc5v0_sys: vcc5v0-sys { + vcc5v0_sys: vcc5v0-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; regulator-always-on; @@ -89,7 +87,7 @@ vin-supply = <&vcc12v_dcin>; }; - vcc5v0_usb: vcc5v0-usb { + vcc5v0_usb: vcc5v0-usb-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_usb"; regulator-always-on; @@ -99,7 +97,7 @@ vin-supply = <&vcc12v_dcin>; }; - vcc5v0_usb_host: vcc5v0-usb-host { + vcc5v0_usb_host: vcc5v0-usb-host-regulator { compatible = "regulator-fixed"; enable-active-high; gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; @@ -111,7 +109,7 @@ vin-supply = <&vcc5v0_usb>; }; - vcc5v0_usb_hub: vcc5v0-usb-hub { + vcc5v0_usb_hub: vcc5v0-usb-hub-regulator { compatible = "regulator-fixed"; enable-active-high; gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; @@ -122,7 +120,7 @@ vin-supply = <&vcc5v0_usb>; }; - vcc5v0_usb_otg: vcc5v0-usb-otg { + vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { compatible = "regulator-fixed"; enable-active-high; gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; @@ -134,7 +132,7 @@ vin-supply = <&vcc5v0_usb>; }; - pcie30_avdd0v9: pcie30-avdd0v9 { + pcie30_avdd0v9: pcie30-avdd0v9-regulator { compatible = "regulator-fixed"; regulator-name = "pcie30_avdd0v9"; regulator-always-on; @@ -144,7 +142,7 @@ vin-supply = <&vcc3v3_sys>; }; - pcie30_avdd1v8: pcie30-avdd1v8 { + pcie30_avdd1v8: pcie30-avdd1v8-regulator { compatible = "regulator-fixed"; regulator-name = "pcie30_avdd1v8"; regulator-always-on; @@ -155,7 +153,7 @@ }; /* pi6c pcie clock generator */ - vcc3v3_pi6c_03: vcc3v3-pi6c-03 { + vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator { compatible = "regulator-fixed"; regulator-name = "vcc3v3_pi6c_03"; regulator-always-on; @@ -165,7 +163,7 @@ vin-supply = <&vcc5v0_sys>; }; - vcc3v3_pcie: vcc3v3-pcie { + vcc3v3_pcie: vcc3v3-pcie-regulator { compatible = "regulator-fixed"; enable-active-high; gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; @@ -177,7 +175,7 @@ vin-supply = <&vcc5v0_sys>; }; - vcc_cam: vcc-cam { + vcc_cam: vcc-cam-regulator { compatible = "regulator-fixed"; enable-active-high; gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; @@ -193,7 +191,7 @@ }; }; - vcc_mipi: vcc-mipi { + vcc_mipi: vcc-mipi-regulator { compatible = "regulator-fixed"; enable-active-high; gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; @@ -261,7 +259,6 @@ status = "okay"; }; -#ifdef DTS_NO_LEGACY &gpu { mali-supply = <&vdd_gpu>; status = "okay"; @@ -270,6 +267,8 @@ &hdmi { avdd-0v9-supply = <&vdda0v9_image>; avdd-1v8-supply = <&vcca1v8_image>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm1_cec>; status = "okay"; }; @@ -288,7 +287,6 @@ &hdmi_sound { status = "okay"; }; -#endif &i2c0 { status = "okay"; @@ -324,8 +322,6 @@ pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>; rockchip,system-power-controller; #sound-dai-cells = <0>; - wakeup-source; - vcc1-supply = <&vcc3v3_sys>; vcc2-supply = <&vcc3v3_sys>; vcc3-supply = <&vcc3v3_sys>; @@ -335,6 +331,7 @@ vcc7-supply = <&vcc3v3_sys>; vcc8-supply = <&vcc3v3_sys>; vcc9-supply = <&vcc3v3_sys>; + wakeup-source; regulators { vdd_logic: DCDC_REG1 { @@ -528,6 +525,18 @@ }; }; +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3m1_xfer>; + status = "disabled"; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m1_xfer>; + status = "disabled"; +}; + &i2c5 { status = "okay"; @@ -544,13 +553,13 @@ }; }; -#ifdef DTS_NO_LEGACY &i2s0_8ch { status = "okay"; }; -#endif &i2s1_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>; rockchip,trcm-sync-tx-only; status = "okay"; }; @@ -686,6 +695,20 @@ status = "okay"; }; +&sfc { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <104000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + }; +}; + &tsadc { rockchip,hw-tshut-mode = <1>; rockchip,hw-tshut-polarity = <0>; @@ -749,7 +772,6 @@ status = "okay"; }; -#ifdef DTS_NO_LEGACY &vop { assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; @@ -766,4 +788,3 @@ remote-endpoint = <&hdmi_in_vp0>; }; }; -#endif