From 781adbcbb3343e4ca00c5f751276ec52eac125af Mon Sep 17 00:00:00 2001 From: Hanno Becker Date: Thu, 14 Dec 2023 05:27:07 +0000 Subject: [PATCH] Initial commit for github page --- docs/_config.yaml | 5 +++++ docs/index.md | 27 +++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 docs/_config.yaml create mode 100644 docs/index.md diff --git a/docs/_config.yaml b/docs/_config.yaml new file mode 100644 index 00000000..c6be4ab6 --- /dev/null +++ b/docs/_config.yaml @@ -0,0 +1,5 @@ +title: SLOTHY +description: Assembly superoptimization via constraint solving +show_downloads: true +google_analytics: +theme: jekyll-theme-minimal diff --git a/docs/index.md b/docs/index.md new file mode 100644 index 00000000..2d7d04a3 --- /dev/null +++ b/docs/index.md @@ -0,0 +1,27 @@ +--- +layout: default +--- + +`SLOTHY` -- **S**uper **L**azy **O**ptimization of **T**ricky **H**andwritten assembl**Y** -- is a fixed-instruction +assembly superoptimizer based on constraint solving. It takes handwritten assembly as input and simultaneously +super-optimizes: +- Instruction scheduling +- Register allocation +- Software pipelining + +`SLOTHY` enables a development workflow where developers write 'clean' assembly by hand, emphasizing the logic of the +computation, while `SLOTHY` automates microarchitecture-specific micro-optimizations. Since `SLOTHY` does not change +instructions, and scheduling/allocation optimizations are tightly controlled through configurable and extensible +constraints, the developer keeps close control over the final assembly, while being freed from the most tedious and +readability- and verifiability-impeding micro-optimizations. + +#### Architecture/Microarchitecture support + +`SLOTHY` is generic in the target architecture and microarchitecture. So far, it supports Cortex-M55 and Cortex-M85 +implementing Armv8.1-M + Helium, and Cortex-A55 and Cortex-A72 implementing +Armv8-A + Neon. Moreover, there is an experimental model for Cortex-X/Neoverse-V cores. + +#### Paper + +SLOTHY is described in detail in the CHES 2024 paper [Fast and Clean: Auditable +high-performance assembly via constraint solving](https://eprint.iacr.org/2022/1303.pdf).