From 9554f703c491210d252962fa9aa01d1e10100b07 Mon Sep 17 00:00:00 2001 From: Kenneth Cheung Date: Thu, 12 Jan 2023 06:34:30 -0800 Subject: [PATCH] Added Configuration.md description for System Ports --- src/sonic-yang-models/doc/Configuration.md | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/src/sonic-yang-models/doc/Configuration.md b/src/sonic-yang-models/doc/Configuration.md index 1c25f66a61c2..9f9d69851111 100644 --- a/src/sonic-yang-models/doc/Configuration.md +++ b/src/sonic-yang-models/doc/Configuration.md @@ -50,6 +50,7 @@ Table of Contents * [Syslog Rate Limit](#syslog-rate-limit) * [Sflow](#sflow) * [Restapi](#restapi) + * [System Port](#system-port) * [Tacplus Server](#tacplus-server) * [TC to Priority group map](#tc-to-priority-group-map) * [TC to Queue map](#tc-to-queue-map) @@ -1521,6 +1522,49 @@ Container side configuration: } ``` +### System Port +Every port on the system requires a global representation, known as a System Port, +and is listed in this table. + +``` +{ +"SYSTEM_PORT": { + "host227-4|asic0|Ethernet0": { + "core_index": "1", + "core_port_index": "1", + "num_voq": "8", + "speed": "100000", + "switch_id": "0", + "system_port_id": "1" + }, + "host227-4|asic0|Ethernet4": { + "core_index": "1", + "core_port_index": "2", + "num_voq": "8", + "speed": "100000", + "switch_id": "0", + "system_port_id": "2" + }, + "host227-5|asic0|Ethernet0": { + "core_index": "1", + "core_port_index": "1", + "num_voq": "8", + "speed": "100000", + "switch_id": "4", + "system_port_id": "80" + }, + "host227-5|asic0|Ethernet4": { + "core_index": "1", + "core_port_index": "2", + "num_voq": "8", + "speed": "100000", + "switch_id": "4", + "system_port_id": "81" + } + } +} +``` + ### Tacplus Server ```