diff --git a/STM32F1/cores/maple/boards_private.h b/STM32F1/cores/maple/boards_private.h
index 49867ca77..5cfdd236f 100644
--- a/STM32F1/cores/maple/boards_private.h
+++ b/STM32F1/cores/maple/boards_private.h
@@ -42,7 +42,7 @@
 
 /* Makes the PIN_MAP rows more human-readable. */
 #define PMAP_ROW(gpio_dev, gpio_bit, timer_dev, timer_ch, adc_dev, adc_ch) \
-    { gpio_dev, timer_dev, adc_dev, gpio_bit, timer_ch, adc_ch }
+    { gpio_dev_t, timer_dev, adc_dev, gpio_bit, timer_ch, adc_ch }
 
 namespace wirish {
     namespace priv {
diff --git a/STM32F1/cores/maple/libmaple/adc.h b/STM32F1/cores/maple/libmaple/adc.h
index 71d6c2e17..fff07a661 100644
--- a/STM32F1/cores/maple/libmaple/adc.h
+++ b/STM32F1/cores/maple/libmaple/adc.h
@@ -280,7 +280,7 @@ extern void adc_set_prescaler(adc_prescaler pre);
  */
 extern void adc_foreach(void (*fn)(adc_dev*));
 
-struct gpio_dev;
+struct gpio_dev_t;
 /**
  * @brief Configure a GPIO pin for ADC conversion.
  * @param dev ADC device to use for conversion (currently ignored on
@@ -289,7 +289,7 @@ struct gpio_dev;
  * @param bit Bit on gdev to configure for ADC conversion.
  */
 extern void adc_config_gpio(struct adc_dev *dev,
-                            struct gpio_dev *gdev,
+                            struct gpio_dev_t *gdev,
                             uint8 bit);
 
 /**
diff --git a/STM32F1/cores/maple/libmaple/adc_f1.c b/STM32F1/cores/maple/libmaple/adc_f1.c
index a8ea30b52..0bd953125 100644
--- a/STM32F1/cores/maple/libmaple/adc_f1.c
+++ b/STM32F1/cores/maple/libmaple/adc_f1.c
@@ -203,7 +203,7 @@ void adc_foreach(void (*fn)(adc_dev*)) {
 #endif
 }
 
-void adc_config_gpio(adc_dev *ignored __attribute__((unused)), gpio_dev *gdev, uint8 bit) {
+void adc_config_gpio(adc_dev *ignored __attribute__((unused)), gpio_dev_t *gdev, uint8 bit) {
     gpio_set_mode(gdev, bit, GPIO_INPUT_ANALOG);
 }
 
diff --git a/STM32F1/cores/maple/libmaple/gpio.c b/STM32F1/cores/maple/libmaple/gpio.c
index 895c4e80e..39be9b03a 100644
--- a/STM32F1/cores/maple/libmaple/gpio.c
+++ b/STM32F1/cores/maple/libmaple/gpio.c
@@ -37,21 +37,21 @@
  */
 
 /** GPIO port A device. */
-const gpio_dev gpioa = {
+const gpio_dev_t gpioa = {
     .regs      = GPIOA_BASE,
     .clk_id    = RCC_GPIOA,
     .exti_port = EXTI_PA,
 };
 
 /** GPIO port B device. */
-const gpio_dev gpiob = {
+const gpio_dev_t gpiob = {
     .regs      = GPIOB_BASE,
     .clk_id    = RCC_GPIOB,
     .exti_port = EXTI_PB,
 };
 
 /** GPIO port C device. */
-const gpio_dev gpioc = {
+const gpio_dev_t gpioc = {
     .regs      = GPIOC_BASE,
     .clk_id    = RCC_GPIOC,
     .exti_port = EXTI_PC,
@@ -59,7 +59,7 @@ const gpio_dev gpioc = {
 
 #if STM32_NR_GPIO_PORTS > 3
 /** GPIO port D device. */
-const gpio_dev gpiod = {
+const gpio_dev_t gpiod = {
     .regs      = GPIOD_BASE,
     .clk_id    = RCC_GPIOD,
     .exti_port = EXTI_PD,
@@ -67,28 +67,28 @@ const gpio_dev gpiod = {
 #endif
 #if STM32_NR_GPIO_PORTS > 4
 /** GPIO port E device. */
-const gpio_dev gpioe = {
+const gpio_dev_t gpioe = {
     .regs      = GPIOE_BASE,
     .clk_id    = RCC_GPIOE,
     .exti_port = EXTI_PE,
 };
 
 /** GPIO port F device. */
-const gpio_dev gpiof = {
+const gpio_dev_t gpiof = {
     .regs      = GPIOF_BASE,
     .clk_id    = RCC_GPIOF,
     .exti_port = EXTI_PF,
 };
 
 /** GPIO port G device. */
-const gpio_dev gpiog = {
+const gpio_dev_t gpiog = {
     .regs      = GPIOG_BASE,
     .clk_id    = RCC_GPIOG,
     .exti_port = EXTI_PG,
 };
 #endif
 
-const gpio_dev* const gpio_devs[] = {
+const gpio_dev_t* const gpio_devs[] = {
 	GPIOA,
 	GPIOB,
 	GPIOC,
@@ -128,7 +128,7 @@ void gpio_init_all(void) {
  * @param mode General purpose or alternate function mode to set the pin to.
  * @see gpio_pin_mode
  */
-void gpio_set_mode(const gpio_dev *dev, uint8 bit, gpio_pin_mode mode) {
+void gpio_set_mode(const gpio_dev_t *dev, uint8 bit, gpio_pin_mode mode) {
     gpio_reg_map *regs = dev->regs;
     __IO uint32 *cr = &regs->CRL + (bit >> 3);
     uint32 shift = (bit & 0x7) * 4;
@@ -145,7 +145,7 @@ void gpio_set_mode(const gpio_dev *dev, uint8 bit, gpio_pin_mode mode) {
     }
 }
 //-----------------------------------------------------------------------------
-gpio_pin_mode gpio_get_mode(const gpio_dev *dev, uint8 pin) {
+gpio_pin_mode gpio_get_mode(const gpio_dev_t *dev, uint8 pin) {
     gpio_reg_map *regs = dev->regs;
     __IO uint32 *cr = &regs->CRL + (pin >> 3);
     uint32 shift = (pin & 0x7) * 4;
diff --git a/STM32F1/cores/maple/libmaple/gpio.h b/STM32F1/cores/maple/libmaple/gpio.h
index f1fa477c4..8a05ff816 100644
--- a/STM32F1/cores/maple/libmaple/gpio.h
+++ b/STM32F1/cores/maple/libmaple/gpio.h
@@ -52,7 +52,7 @@ extern "C"{
  */
 
 /** GPIO device type */
-typedef struct gpio_dev {
+typedef struct gpio_dev_t {
     gpio_reg_map *regs;         /**< Register map */
     rcc_clk_id    clk_id;       /**< RCC clock information */
     /**
@@ -60,28 +60,28 @@ typedef struct gpio_dev {
      * Instead of dev->exti_port, use gpio_exti_port(dev).
      */
     exti_cfg      exti_port;
-} gpio_dev;
+} gpio_dev_t;
 
-extern const gpio_dev gpioa;
+extern const gpio_dev_t gpioa;
 #define GPIOA (&gpioa)
-extern const gpio_dev gpiob;
+extern const gpio_dev_t gpiob;
 #define GPIOB (&gpiob)
-extern const gpio_dev gpioc;
+extern const gpio_dev_t gpioc;
 #define GPIOC (&gpioc)
 #if STM32_NR_GPIO_PORTS > 3
-extern const gpio_dev gpiod;
+extern const gpio_dev_t gpiod;
 #define GPIOD (&gpiod)
 #endif
 #if STM32_NR_GPIO_PORTS > 4
-extern const gpio_dev gpioe;
+extern const gpio_dev_t gpioe;
 #define GPIOE (&gpioe)
-extern const gpio_dev gpiof;
+extern const gpio_dev_t gpiof;
 #define GPIOF (&gpiof)
-extern const gpio_dev gpiog;
+extern const gpio_dev_t gpiog;
 #define GPIOG (&gpiog)
 #endif
 
-extern const gpio_dev * const gpio_devs[3];
+extern const gpio_dev_t * const gpio_devs[3];
 
 /*
  * Portable routines
@@ -89,15 +89,15 @@ extern const gpio_dev * const gpio_devs[3];
 static inline void enableDebugPorts() { afio_cfg_debug_ports(AFIO_DEBUG_SW_ONLY); }
 static inline void disableDebugPorts() { afio_cfg_debug_ports(AFIO_DEBUG_NONE); }
 
-inline void gpio_init(const gpio_dev *dev) {
+inline void gpio_init(const gpio_dev_t *dev) {
     rcc_clk_enable(dev->clk_id);
     rcc_reset_dev(dev->clk_id);
 }
 
 void gpio_init_all(void);
 /* TODO flags argument version? */
-void gpio_set_mode(const gpio_dev *dev, uint8 bit, gpio_pin_mode mode);
-gpio_pin_mode gpio_get_mode(const gpio_dev *dev, uint8 bit);
+void gpio_set_mode(const gpio_dev_t *dev, uint8 bit, gpio_pin_mode mode);
+gpio_pin_mode gpio_get_mode(const gpio_dev_t *dev, uint8 bit);
 
 static inline void gpio_set_pin_mode(uint8 pin, gpio_pin_mode mode) {
 	gpio_set_mode(gpio_devs[pin/16], pin%16, mode);
@@ -106,7 +106,7 @@ static inline void gpio_set_pin_mode(uint8 pin, gpio_pin_mode mode) {
  * @brief Get a GPIO port's corresponding EXTI port configuration.
  * @param dev GPIO port whose exti_cfg to return.
  */
-static inline exti_cfg gpio_exti_port(gpio_dev *dev) {
+static inline exti_cfg gpio_exti_port(gpio_dev_t *dev) {
     return (exti_cfg)(EXTI_PA + (dev->clk_id - RCC_GPIOA));
 }
 
@@ -119,7 +119,7 @@ static inline exti_cfg gpio_exti_port(gpio_dev *dev) {
  * @param pin Pin on to set or reset
  * @param val If true, set the pin.  If false, reset the pin.
  */
-static inline void gpio_write_bit(const gpio_dev *dev, uint8 bit, uint8 val) {
+static inline void gpio_write_bit(const gpio_dev_t *dev, uint8 bit, uint8 val) {
     val = !val;          /* "set" bits are lower than "reset" bits  */
     dev->regs->BSRR = (1U << bit) << (16 * val);
 }
@@ -137,7 +137,7 @@ static inline void gpio_write_pin(uint8 pin, uint8 val) {
  * @param pin Pin on dev to test.
  * @return True if the pin is set, false otherwise.
  */
-static inline uint32 gpio_read_bit(const gpio_dev *dev, uint8 pin) {
+static inline uint32 gpio_read_bit(const gpio_dev_t *dev, uint8 pin) {
     return dev->regs->IDR & (1U << pin);
 }
 
@@ -150,7 +150,7 @@ static inline uint32 gpio_read_pin(uint8 pin) {
  * @param dev GPIO device.
  * @param pin Pin on dev to toggle.
  */
-static inline void gpio_toggle_bit(const gpio_dev *dev, uint8 bit) {
+static inline void gpio_toggle_bit(const gpio_dev_t *dev, uint8 bit) {
     dev->regs->ODR = dev->regs->ODR ^ (1U << bit);
 }
 
diff --git a/STM32F1/cores/maple/libmaple/i2c.c b/STM32F1/cores/maple/libmaple/i2c.c
index b3c85279f..7ba6779c9 100644
--- a/STM32F1/cores/maple/libmaple/i2c.c
+++ b/STM32F1/cores/maple/libmaple/i2c.c
@@ -66,7 +66,7 @@
  * @param addr Slave address
  * @param rw Read/write bit
  */
-static inline void i2c_send_slave_addr(i2c_dev *dev, uint32 addr, uint32 rw) {
+static inline void i2c_send_slave_addr(i2c_dev_t *dev, uint32 addr, uint32 rw) {
     dev->regs->DR = (addr << 1) | rw;
 }
 
@@ -128,7 +128,7 @@ enum {
  *
  * @param dev I2C device
  */
-void i2c_bus_reset(const i2c_dev *dev) {
+void i2c_bus_reset(const i2c_dev_t *dev) {
     /* Release both lines */
     i2c_master_release_bus(dev);        // Note: This configures the pins as GPIO instead of AF
 
@@ -182,7 +182,7 @@ void i2c_bus_reset(const i2c_dev *dev) {
  * this reset logic will also clear other STM32 controllers
  * on the bus that are also in this stuck-state.
  */
-static void i2c_clear_busy_flag_erratum(const i2c_dev *dev) {
+static void i2c_clear_busy_flag_erratum(const i2c_dev_t *dev) {
     // 1. Clear PE bit.
     dev->regs->CR1 &= ~I2C_CR1_PE;
 
@@ -237,7 +237,7 @@ static void i2c_clear_busy_flag_erratum(const i2c_dev *dev) {
  *        default values.
  * @param dev Device to initialize.
  */
-void i2c_init(i2c_dev *dev) {
+void i2c_init(i2c_dev_t *dev) {
     rcc_clk_enable(dev->clk_id);    // The device's clock should enabled before we reset it
     rcc_reset_dev(dev->clk_id);
     _i2c_irq_priority_fixup(dev);
@@ -264,7 +264,7 @@ void i2c_init(i2c_dev *dev) {
  *              I2C_SLAVE_GENERAL_CALL: SLA+W broadcast to all general call
  *                                      listeners on bus. Addr 0x00
  */
-void i2c_master_enable(i2c_dev *dev, uint32 flags, uint32 freq) {
+void i2c_master_enable(i2c_dev_t *dev, uint32 flags, uint32 freq) {
     /* Remap I2C if needed */
     _i2c_handle_remap(dev, flags);
 
@@ -340,7 +340,7 @@ void i2c_master_enable(i2c_dev *dev, uint32 flags, uint32 freq) {
  *              I2C_SLAVE_GENERAL_CALL: SLA+W broadcast to all general call
  *                                      listeners on bus. Addr 0x00
  */
-void i2c_slave_enable(i2c_dev *dev, uint32 flags, uint32 freq)
+void i2c_slave_enable(i2c_dev_t *dev, uint32 flags, uint32 freq)
 {
     i2c_master_enable(dev, flags | I2C_SLAVE_MODE, freq);
 }
@@ -349,8 +349,8 @@ void i2c_slave_enable(i2c_dev *dev, uint32 flags, uint32 freq)
 /**
  * @brief Process an i2c transaction.
  *
- * Transactions are composed of one or more i2c_msg's, and may be read
- * or write tranfers.  Multiple i2c_msg's will generate a repeated
+ * Transactions are composed of one or more i2c_msg_t's, and may be read
+ * or write tranfers.  Multiple i2c_msg_t's will generate a repeated
  * start in between messages.
  *
  * @param dev I2C device
@@ -362,8 +362,8 @@ void i2c_slave_enable(i2c_dev *dev, uint32 flags, uint32 freq)
  *         I2C_ERROR_PROTOCOL if there was a protocol error,
  *         I2C_ERROR_TIMEOUT if the transfer timed out.
  */
-int8 i2c_master_xfer(i2c_dev *dev,
-                      i2c_msg *msgs,
+int8 i2c_master_xfer(i2c_dev_t *dev,
+                      i2c_msg_t *msgs,
                       uint16 num,
                       uint32 timeout) {
     int32 rc;
@@ -441,10 +441,10 @@ int8 i2c_master_xfer(i2c_dev *dev,
  * @param timeout Timeout, in milliseconds
  * @return 0 if target state is reached, a negative value on error.
  */
-int8 wait_for_state_change(i2c_dev *dev,
-                            i2c_state state,
+int8 wait_for_state_change(i2c_dev_t *dev,
+                            i2c_state_t state,
                             uint32 timeout) {
-    volatile i2c_state devState;
+    volatile i2c_state_t devState;
     volatile uint32 devTimestamp;
 
     while (1) {
@@ -483,7 +483,7 @@ int8 wait_for_state_change(i2c_dev *dev,
  * IRQ handler for I2C master and slave.
  * Handles transmission/reception.
  */
-void _i2c_irq_handler(i2c_dev *dev) {
+void _i2c_irq_handler(i2c_dev_t *dev) {
     // See Note in ST Specs:
     //  Reading I2C_SR2 after reading I2C_SR1 clears the ADDR flag, even if the ADDR flag was
     //  set after reading I2C_SR1. Consequently, I2C_SR2 must be read only when ADDR is found
@@ -497,7 +497,7 @@ void _i2c_irq_handler(i2c_dev *dev) {
 
     if (!(dev->config_flags & I2C_SLAVE_MODE)) {    // Handle Master Mode Here:
         int8_t bDone = 0;                       // Set to true when we're done with this transfer unit
-        i2c_msg *curMsg = dev->msg;
+        i2c_msg_t *curMsg = dev->msg;
         if (curMsg != NULL) {
             int todo = curMsg->length;      // Bytes to transfer
             if (curMsg->flags & I2C_MSG_READ) {         // read transaction:
@@ -769,7 +769,7 @@ void _i2c_irq_handler(i2c_dev *dev) {
  * Interrupt handler for I2C error conditions. Aborts any pending I2C
  * transactions.
  */
-void _i2c_irq_error_handler(i2c_dev *dev) {
+void _i2c_irq_error_handler(i2c_dev_t *dev) {
     __IO uint32_t sr1 = dev->regs->SR1;
     __IO uint32_t sr2 = dev->regs->SR2;
 
@@ -821,7 +821,7 @@ void _i2c_irq_error_handler(i2c_dev *dev) {
 /*
  * CCR/TRISE configuration helper
  */
-void i2c_set_ccr_trise(i2c_dev *dev, uint32 flags, uint32 freq) {
+void i2c_set_ccr_trise(i2c_dev_t *dev, uint32 flags, uint32 freq) {
     uint32 ccr     = 0;
     uint32 trise   = 0;
     uint32 clk_mhz = _i2c_bus_clk(dev);
@@ -865,7 +865,7 @@ void i2c_set_ccr_trise(i2c_dev *dev, uint32 flags, uint32 freq) {
  * @param msg The dev_msg to pass to the slave init code
  * @param func The function pointer to call
  */
-void i2c_slave_attach_recv_handler(i2c_dev *dev, i2c_msg *msg, i2c_slave_recv_callback_func func) {
+void i2c_slave_attach_recv_handler(i2c_dev_t *dev, i2c_msg_t *msg, i2c_slave_recv_callback_func_t func) {
     dev->i2c_slave_recv_callback = func;
     dev->i2c_slave_recv_msg = msg;
     msg->xferred = 0;
@@ -879,7 +879,7 @@ void i2c_slave_attach_recv_handler(i2c_dev *dev, i2c_msg *msg, i2c_slave_recv_ca
  * @param msg The dev_msg to pass to the slave init code
  * @param func The function pointer to call
  */
-void i2c_slave_attach_transmit_handler(i2c_dev *dev, i2c_msg *msg, i2c_slave_xmit_callback_func func) {
+void i2c_slave_attach_transmit_handler(i2c_dev_t *dev, i2c_msg_t *msg, i2c_slave_xmit_callback_func_t func) {
     dev->i2c_slave_xmit_callback = func;
     dev->i2c_slave_xmit_msg = msg;
     msg->xferred = 0;
diff --git a/STM32F1/cores/maple/libmaple/i2c.h b/STM32F1/cores/maple/libmaple/i2c.h
index ebc4c713f..1cb38bb1e 100644
--- a/STM32F1/cores/maple/libmaple/i2c.h
+++ b/STM32F1/cores/maple/libmaple/i2c.h
@@ -33,14 +33,14 @@
  *  Master Usage notes:
  *
  * - Enable an I2C device with i2c_master_enable().
- * - Initialize an array of struct i2c_msg to suit the bus
+ * - Initialize an array of struct i2c_msg_t to suit the bus
  *   transactions (reads/writes) you wish to perform.
  * - Call i2c_master_xfer() to do the work.
  *
  * Slave Usage notes:
  * - Enable I2C slave by calling i2c_slave_enable().
  *   Check flags for usage. Enabling master also enabled slave.
- * - initialise the i2c_msg struct and the data buffer
+ * - initialise the i2c_msg_t struct and the data buffer
  * - initialise the callback functions
  *
  * I2C slave support added 2012 by Barry Carter. barry.carter@gmail.com, headfuzz.co.uk
@@ -61,7 +61,7 @@ extern "C" {
 /*
  * Series header must provide:
  *
- * - uint32 _i2c_bus_clk(i2c_dev*): Clock frequency of dev's bus, in
+ * - int32_t _i2c_bus_clk(i2c_dev_t*): Clock frequency of dev's bus, in
  *   MHz. (This is for internal use only).
  *
  * - (optional) _I2C_HAVE_IRQ_FIXUP: Leave undefined, or define to 1.
@@ -71,7 +71,7 @@ extern "C" {
  *   the series header must also declare and implement a routine with
  *   this signature (it may also be provided as a macro):
  *
- *       void _i2c_irq_priority_fixup(i2c_dev*)
+ *       void _i2c_irq_priority_fixup(i2c_dev_t*)
  *
  *   This will be called by i2c_enable_irq() before actually enabling
  *   I2C interrupts.
@@ -88,23 +88,23 @@ extern "C" {
 #include <libmaple/gpio.h>
 
 /** I2C register map type */
-typedef struct i2c_reg_map {
-    __IO uint32 CR1;            /**< Control register 1 */
-    __IO uint32 CR2;            /**< Control register 2 */
-    __IO uint32 OAR1;           /**< Own address register 1 */
-    __IO uint32 OAR2;           /**< Own address register 2 */
-    __IO uint32 DR;             /**< Data register */
-    __IO uint32 SR1;            /**< Status register 1 */
-    __IO uint32 SR2;            /**< Status register 2 */
-    __IO uint32 CCR;            /**< Clock control register */
-    __IO uint32 TRISE;          /**< TRISE (rise time) register */
-} i2c_reg_map;
+typedef struct i2c_reg_map_t {
+    __IO uint32_t CR1;            /**< Control register 1 */
+    __IO uint32_t CR2;            /**< Control register 2 */
+    __IO uint32_t OAR1;           /**< Own address register 1 */
+    __IO uint32_t OAR2;           /**< Own address register 2 */
+    __IO uint32_t DR;             /**< Data register */
+    __IO uint32_t SR1;            /**< Status register 1 */
+    __IO uint32_t SR2;            /**< Status register 2 */
+    __IO uint32_t CCR;            /**< Clock control register */
+    __IO uint32_t TRISE;          /**< TRISE (rise time) register */
+} i2c_reg_map_t;
 
 /**
  * @brief I2C message type
  */
-typedef struct i2c_msg {
-    uint16 addr;                /**< Address */
+typedef struct i2c_msg_t {
+    uint16_t addr;                /**< Address */
 
 #define I2C_MSG_READ            0x1
 #define I2C_MSG_10BIT_ADDR      0x2
@@ -114,12 +114,12 @@ typedef struct i2c_msg {
      * Bitwise OR of:
      * - I2C_MSG_READ (write is default)
      * - I2C_MSG_10BIT_ADDR (7-bit is default) */
-    uint16 flags;
+    uint16_t flags;
 
-    uint16 length;              /**< Message length */
-    uint16 xferred;             /**< Messages transferred */
-    uint8 *data;                /**< Data */
-} i2c_msg;
+    uint16_t length;              /**< Message length */
+    uint16_t xferred;             /**< Messages transferred */
+    uint8_t *data;                /**< Data */
+} i2c_msg_t;
 
 /*
  * Register bit definitions
@@ -220,19 +220,19 @@ typedef struct i2c_msg {
 #define I2C_SLAVE_GENERAL_CALL  0x80          // Enable the general call on address 0x00
 #define I2C_PUP_RESET           0x100         // Power-Up Reset
 
-void i2c_master_enable(i2c_dev *dev, uint32 flags, uint32 freq);
-void i2c_slave_enable(i2c_dev *dev, uint32 flags, uint32 freq);
+void i2c_master_enable(i2c_dev_t *dev, uint32_t flags, uint32_t freq);
+void i2c_slave_enable(i2c_dev_t *dev, uint32_t flags, uint32_t freq);
 
 #define I2C_ERROR_PROTOCOL      (-1)
 #define I2C_ERROR_TIMEOUT       (-2)
-int8 i2c_master_xfer(i2c_dev *dev, i2c_msg *msgs, uint16 num, uint32 timeout);
-int8 wait_for_state_change(i2c_dev *dev, i2c_state state, uint32 timeout);
+int8_t i2c_master_xfer(i2c_dev_t *dev, i2c_msg_t *msgs, uint16_t num, uint32_t timeout);
+int8_t wait_for_state_change(i2c_dev_t *dev, i2c_state_t state, uint32_t timeout);
 
-void i2c_bus_reset(const i2c_dev *dev);
+void i2c_bus_reset(const i2c_dev_t *dev);
 
 /* Auxiliary procedure for enabling an I2C peripheral; `flags' as for
  * i2c_master_enable(). */
-void i2c_set_ccr_trise(i2c_dev *dev, uint32 flags, uint32 freq);
+void i2c_set_ccr_trise(i2c_dev_t *dev, uint32_t flags, uint32_t freq);
 
 
 /* IRQ enable/disable */
@@ -254,7 +254,7 @@ void i2c_set_ccr_trise(i2c_dev *dev, uint32 flags, uint32 freq);
  *             I2C_IRQ_EVENT (event interrupt), and
  *             I2C_IRQ_BUFFER (buffer interrupt).
  */
-static inline void i2c_enable_irq(i2c_dev *dev, uint32 irqs) {
+static inline void i2c_enable_irq(i2c_dev_t *dev, uint32_t irqs) {
     dev->regs->CR2 |= irqs;
 }
 
@@ -266,7 +266,7 @@ static inline void i2c_enable_irq(i2c_dev *dev, uint32 irqs) {
  *             I2C_IRQ_EVENT (event interrupt), and
  *             I2C_IRQ_BUFFER (buffer interrupt).
  */
-static inline void i2c_disable_irq(i2c_dev *dev, uint32 irqs) {
+static inline void i2c_disable_irq(i2c_dev_t *dev, uint32_t irqs) {
     dev->regs->CR2 &= ~irqs;
 }
 
@@ -278,7 +278,7 @@ static inline void i2c_disable_irq(i2c_dev *dev, uint32 irqs) {
  *
  * @param dev Device to disable.
  */
-static inline void i2c_disable(i2c_dev *dev) {
+static inline void i2c_disable(i2c_dev_t *dev) {
     i2c_disable_irq(dev, I2C_IRQ_BUFFER | I2C_IRQ_EVENT | I2C_IRQ_ERROR);   // Make sure IRQs are disabled in case we are switching master<->slave modes
     dev->regs->CR1 &= ~I2C_CR1_PE;
     dev->state = I2C_STATE_DISABLED;
@@ -295,7 +295,7 @@ static inline void i2c_disable(i2c_dev *dev) {
  * @param dev I2C Device
  * @see i2c_release_gpios()
  */
-extern void i2c_config_gpios(const i2c_dev *dev);
+extern void i2c_config_gpios(const i2c_dev_t *dev);
 
 /**
  * @brief Release GPIOs controlling an I2C bus
@@ -307,11 +307,11 @@ extern void i2c_config_gpios(const i2c_dev *dev);
  * @param dev I2C device
  * @see i2c_config_gpios()
  */
-extern void i2c_master_release_bus(const i2c_dev *dev);
+extern void i2c_master_release_bus(const i2c_dev_t *dev);
 
 /* Miscellaneous low-level routines */
 
-void i2c_init(i2c_dev *dev);
+void i2c_init(i2c_dev_t *dev);
 
 /**
  * @brief Set input clock frequency, in MHz
@@ -321,13 +321,13 @@ void i2c_init(i2c_dev *dev);
  *             rcc_dev_clk(dev) == RCC_APB1, freq must be at most
  *             PCLK1, in MHz). There is an additional limit of 36 MHz.
  */
-static inline void i2c_set_input_clk(i2c_dev *dev, uint32 freq) {
+static inline void i2c_set_input_clk(i2c_dev_t *dev, uint32_t freq) {
 // TODO : I2C_MAX_FREQ_MHZ should be in the series header, as it's different on STM32F4 and others!
 #define I2C_MAX_FREQ_MHZ 36     // Limit on STM32F1 is 36 MHz (See ST Spec, which says: Higher than 0b100100 not allowed)
     if (freq < 2) freq = 2;
     if (freq > _i2c_bus_clk(dev)) freq = _i2c_bus_clk(dev);
     if (freq > I2C_MAX_FREQ_MHZ) freq = I2C_MAX_FREQ_MHZ;
-    uint32 cr2 = dev->regs->CR2;
+    int32_t cr2 = dev->regs->CR2;
     cr2 &= ~I2C_CR2_FREQ;
     cr2 |= freq;
     dev->regs->CR2 = freq;
@@ -343,7 +343,7 @@ static inline void i2c_set_input_clk(i2c_dev *dev, uint32 freq) {
  * @param val Value to use for clock control register (in
  *            Fast/Standard mode)
  */
-static inline void i2c_set_clk_control(i2c_dev *dev, uint32 val) {
+static inline void i2c_set_clk_control(i2c_dev_t *dev, uint32_t val) {
     dev->regs->CCR = val;
 }
 
@@ -353,7 +353,7 @@ static inline void i2c_set_clk_control(i2c_dev *dev, uint32 val) {
  * @param trise Maximum rise time in fast/standard mode (see chip
  *              reference manual for the relevant formulas).
  */
-static inline void i2c_set_trise(i2c_dev *dev, uint32 trise) {
+static inline void i2c_set_trise(i2c_dev_t *dev, uint32_t trise) {
     dev->regs->TRISE = trise;
 }
 
@@ -364,19 +364,19 @@ static inline void i2c_set_trise(i2c_dev *dev, uint32 trise) {
 
 /* callback functions */
 /* Callback handler for data received over the bus */
-void i2c_slave_attach_recv_handler(i2c_dev *dev, i2c_msg *msg, i2c_slave_recv_callback_func func);
+void i2c_slave_attach_recv_handler(i2c_dev_t *dev, i2c_msg_t *msg, i2c_slave_recv_callback_func_t func);
 
 /* Callback handler for data being requested over the bus
  * The callback function must call i2c_write to get the data over the bus
  */
-void i2c_slave_attach_transmit_handler(i2c_dev *dev, i2c_msg *msg, i2c_slave_xmit_callback_func func);
+void i2c_slave_attach_transmit_handler(i2c_dev_t *dev, i2c_msg_t *msg, i2c_slave_xmit_callback_func_t func);
 
 /**
  * @brief Set the primary I2c slave address
  * @param dev I2C device
  * @param address the 7 or 10 bit i2c address
   */
-static inline void i2c_slave_set_own_address(i2c_dev *dev, uint16 address)
+static inline void i2c_slave_set_own_address(i2c_dev_t *dev, uint16_t address)
 {
     // TODO : Add support for 10-bit addresses
     dev->regs->OAR1 = (address << 1) | 0x4000;     // According to ST Docs: Note: Bit 14 should always be kept at 1 by software!
@@ -387,7 +387,7 @@ static inline void i2c_slave_set_own_address(i2c_dev *dev, uint16 address)
  * @param dev I2C device
  * @param address the 7 or 10 bit i2c address
   */
-static inline void i2c_slave_set_own_address2(i2c_dev *dev, uint16 address)
+static inline void i2c_slave_set_own_address2(i2c_dev_t *dev, uint16_t address)
 {
     // TODO : Add support for 10-bit addresses
     dev->regs->OAR2 = (address << 1) | I2C_OAR2_ENDUAL;
diff --git a/STM32F1/cores/maple/libmaple/i2c_common.h b/STM32F1/cores/maple/libmaple/i2c_common.h
index bf7060309..aadcd2eeb 100644
--- a/STM32F1/cores/maple/libmaple/i2c_common.h
+++ b/STM32F1/cores/maple/libmaple/i2c_common.h
@@ -48,52 +48,52 @@
 #include <libmaple/nvic.h>
 #include <libmaple/rcc.h>
 
-struct gpio_dev;
-struct i2c_reg_map;
-struct i2c_msg;
+struct gpio_dev_t;
+struct i2c_reg_map_t;
+struct i2c_msg_t;
 
 /** I2C device states */
-typedef enum i2c_state {
+typedef enum i2c_state_t {
     I2C_STATE_DISABLED          = 0, /**< Disabled */
     I2C_STATE_IDLE              = 1, /**< Idle */
     I2C_STATE_XFER_DONE         = 2, /**< Done with transfer */
     I2C_STATE_BUSY              = 3, /**< Busy */
     I2C_STATE_ERROR             = -1 /**< Error occurred */
-} i2c_state;
+} i2c_state_t;
 
-typedef void (*i2c_slave_recv_callback_func)(struct i2c_msg *);
-typedef void (*i2c_slave_xmit_callback_func)(struct i2c_msg *);
+typedef void (*i2c_slave_recv_callback_func_t)(struct i2c_msg_t *);
+typedef void (*i2c_slave_xmit_callback_func_t)(struct i2c_msg_t *);
 
 /**
  * @brief I2C device type.
  */
-typedef struct i2c_dev {
-    struct i2c_reg_map *regs;   /**< Register map */
-    struct i2c_msg *msg;        /**< Messages */
-    uint32 error_flags;         /**< Error flags, set on I2C error condition */
-    volatile uint32 timestamp;  /**< For internal use */
+typedef struct i2c_dev_t {
+    struct i2c_reg_map_t *regs;   /**< Register map */
+    struct i2c_msg_t *msg;        /**< Messages */
+    uint32_t error_flags;         /**< Error flags, set on I2C error condition */
+    volatile uint32_t timestamp;  /**< For internal use */
 
-    uint16 msgs_left;           /**< Messages left */
-    uint8 sda_pin;              /**< SDA pin */
-    uint8 scl_pin;              /**< SCL pin */
+    uint16_t msgs_left;           /**< Messages left */
+    uint8_t sda_pin;              /**< SDA pin */
+    uint8_t scl_pin;              /**< SCL pin */
     rcc_clk_id clk_id;          /**< RCC clock information */
     nvic_irq_num ev_nvic_line;  /**< Event IRQ number */
     nvic_irq_num er_nvic_line;  /**< Error IRQ number */
-    volatile i2c_state state;   /**< Device state */
+    volatile i2c_state_t state;   /**< Device state */
 
     // --------------------
 
-    uint32 config_flags;        /**< Configuration flags */
+    uint32_t config_flags;        /**< Configuration flags */
 
     /*
      * Slave implementation. Callback functions in this struct allow
      * for a separate callback function for each I2C unit available onboard
      */
-    i2c_slave_xmit_callback_func i2c_slave_xmit_callback;
-    i2c_slave_recv_callback_func i2c_slave_recv_callback;
+    i2c_slave_xmit_callback_func_t i2c_slave_xmit_callback;
+    i2c_slave_recv_callback_func_t i2c_slave_recv_callback;
 
-    struct i2c_msg *i2c_slave_xmit_msg;    /* the message that the i2c slave will use for transmitting */
-    struct i2c_msg *i2c_slave_recv_msg;    /* the message that the i2c slave will use for receiving */
-} i2c_dev;
+    struct i2c_msg_t *i2c_slave_xmit_msg;    /* the message that the i2c slave will use for transmitting */
+    struct i2c_msg_t *i2c_slave_recv_msg;    /* the message that the i2c slave will use for receiving */
+} i2c_dev_t;
 
 #endif
diff --git a/STM32F1/cores/maple/libmaple/i2c_f1.c b/STM32F1/cores/maple/libmaple/i2c_f1.c
index fd214963b..6b566dcea 100644
--- a/STM32F1/cores/maple/libmaple/i2c_f1.c
+++ b/STM32F1/cores/maple/libmaple/i2c_f1.c
@@ -37,26 +37,26 @@
  * Devices
  */
 
-static i2c_dev i2c1 = I2C_DEV_OLD(1, PB7, PB6);
-static i2c_dev i2c2 = I2C_DEV_OLD(2, PB11, PB10);
+static i2c_dev_t i2c1 = I2C_DEV_OLD(1, PB7, PB6);
+static i2c_dev_t i2c2 = I2C_DEV_OLD(2, PB11, PB10);
 
 /** STM32F1 I2C device 1 */
-i2c_dev* const I2C1 = &i2c1;
+i2c_dev_t* const I2C1 = &i2c1;
 /** STM32F1 I2C device 2 */
-i2c_dev* const I2C2 = &i2c2;
+i2c_dev_t* const I2C2 = &i2c2;
 
 /*
  * Routines
  */
 
-static int i2c1_wants_remap(const i2c_dev *dev) {
+static int i2c1_wants_remap(const i2c_dev_t *dev) {
     /* Check if we've got I2C1 configured for SDA/SCL remap on PB9/PB8 */
     return (dev->clk_id == RCC_I2C1) &&
         (dev->sda_pin == PB9) &&
         (dev->scl_pin == PB8);
 }
 
-void i2c_config_gpios(const i2c_dev *dev) {
+void i2c_config_gpios(const i2c_dev_t *dev) {
     if (i2c1_wants_remap(dev)) {
         afio_remap(AFIO_REMAP_I2C1);
     }
@@ -64,7 +64,7 @@ void i2c_config_gpios(const i2c_dev *dev) {
     gpio_set_pin_mode(dev->scl_pin, GPIO_AF_OUTPUT_OD);
 }
 
-void i2c_master_release_bus(const i2c_dev *dev) {
+void i2c_master_release_bus(const i2c_dev_t *dev) {
     gpio_write_pin(dev->scl_pin, 1);
     gpio_write_pin(dev->sda_pin, 1);
     gpio_set_pin_mode(dev->scl_pin, GPIO_OUTPUT_OD);
@@ -96,7 +96,7 @@ __weak void __irq_i2c2_er(void) {
  */
 
 #if defined(_I2C_HAVE_IRQ_FIXUP) && (_I2C_HAVE_IRQ_FIXUP)
-void _i2c_irq_priority_fixup(i2c_dev *dev) {
+void _i2c_irq_priority_fixup(i2c_dev_t *dev) {
     /*
      * Important STM32 Errata:
      *
diff --git a/STM32F1/cores/maple/libmaple/i2c_private.h b/STM32F1/cores/maple/libmaple/i2c_private.h
index 0e8e3d001..a7cab6a1b 100644
--- a/STM32F1/cores/maple/libmaple/i2c_private.h
+++ b/STM32F1/cores/maple/libmaple/i2c_private.h
@@ -71,8 +71,8 @@
         .i2c_slave_recv_msg = NULL,                                 \
     }
 
-void _i2c_irq_handler(i2c_dev *dev);
-void _i2c_irq_error_handler(i2c_dev *dev);
+void _i2c_irq_handler(i2c_dev_t *dev);
+void _i2c_irq_error_handler(i2c_dev_t *dev);
 
 
 #endif  /* _LIBMAPLE_I2C_PRIVATE_H_ */
diff --git a/STM32F1/cores/maple/libmaple/series/gpio.h b/STM32F1/cores/maple/libmaple/series/gpio.h
index b76390a00..2ad853cf4 100644
--- a/STM32F1/cores/maple/libmaple/series/gpio.h
+++ b/STM32F1/cores/maple/libmaple/series/gpio.h
@@ -402,7 +402,7 @@ inline void afio_cfg_debug_ports(afio_debug_cfg config) {
  *
  * In previous versions of libmaple, exti_attach_interrupt() took an
  * afio_exti_port argument; afio_exti_port was also a member of struct
- * gpio_dev. This isn't portable, so we now use exti_cfg
+ * gpio_dev_t. This isn't portable, so we now use exti_cfg
  * instead. This typedef (and the macros AFIO_EXTI_PA, ...,
  * AFIO_EXTI_PG) exist to preserve backwards compatibility.
  */
diff --git a/STM32F1/cores/maple/libmaple/series/i2c.h b/STM32F1/cores/maple/libmaple/series/i2c.h
index ece3b094c..57bce40bf 100644
--- a/STM32F1/cores/maple/libmaple/series/i2c.h
+++ b/STM32F1/cores/maple/libmaple/series/i2c.h
@@ -41,32 +41,32 @@
  * Register maps
  */
 
-struct i2c_reg_map;
+struct i2c_reg_map_t;
 
 /** STM32F1 I2C1 register map base pointer */
-#define I2C1_BASE               ((struct i2c_reg_map*)0x40005400)
+#define I2C1_BASE               ((struct i2c_reg_map_t*)0x40005400)
 /** STM32F1 I2C2 register map base pointer */
-#define I2C2_BASE               ((struct i2c_reg_map*)0x40005800)
+#define I2C2_BASE               ((struct i2c_reg_map_t*)0x40005800)
 
 /*
  * Devices
  */
 
-extern i2c_dev* const I2C1;
-extern i2c_dev* const I2C2;
+extern i2c_dev_t* const I2C1;
+extern i2c_dev_t* const I2C2;
 
 /*
  * For internal use
  */
 
-static inline uint32 _i2c_bus_clk(i2c_dev *dev __attribute__((unused))) {
+static inline uint32_t _i2c_bus_clk(i2c_dev_t *dev __attribute__((unused))) {
     /* Both I2C peripherals are on APB1 */
     return STM32_PCLK1 / (1000 * 1000);
 }
 
 #ifndef _I2C_HAVE_IRQ_FIXUP     // Allow disabling of the fixup via external define
 #define _I2C_HAVE_IRQ_FIXUP 1
-void _i2c_irq_priority_fixup(i2c_dev *dev);
+void _i2c_irq_priority_fixup(i2c_dev_t *dev);
 #endif
 
 /*
@@ -76,7 +76,7 @@ void _i2c_irq_priority_fixup(i2c_dev *dev);
 /* Flag to use alternate pin mapping in i2c_master_enable(). */
 #define _I2C_HAVE_DEPRECATED_I2C_REMAP 1
 #define I2C_REMAP 0x4
-static inline void _i2c_handle_remap(i2c_dev *dev, uint32 flags) {
+static inline void _i2c_handle_remap(i2c_dev_t *dev, uint32 flags) {
     if ((dev == I2C1) && (flags & I2C_REMAP)) {
         afio_remap(AFIO_REMAP_I2C1);
         I2C1->sda_pin = 9;
diff --git a/STM32F1/cores/maple/libmaple/series/spi.h b/STM32F1/cores/maple/libmaple/series/spi.h
index 0b65c615c..5c9317365 100644
--- a/STM32F1/cores/maple/libmaple/series/spi.h
+++ b/STM32F1/cores/maple/libmaple/series/spi.h
@@ -97,7 +97,7 @@ typedef struct spi_pins {
  * Routines
  */
 
-struct gpio_dev;
+struct gpio_dev_t;
 extern void spi_config_gpios(uint8 as_master, const spi_pins * pins);
 extern void spi_release_gpios(uint8 as_master, const spi_pins * pins);
 
diff --git a/STM32F1/cores/maple/libmaple/spi.h b/STM32F1/cores/maple/libmaple/spi.h
index de82ae043..8022c19e0 100644
--- a/STM32F1/cores/maple/libmaple/spi.h
+++ b/STM32F1/cores/maple/libmaple/spi.h
@@ -185,7 +185,7 @@ extern "C" {
 
 void spi_init(spi_dev *dev);
 
-struct gpio_dev;
+struct gpio_dev_t;
 
 /**
  * @brief SPI mode configuration.
diff --git a/STM32F1/cores/maple/libmaple/usart.h b/STM32F1/cores/maple/libmaple/usart.h
index 918b5c005..0bd122934 100644
--- a/STM32F1/cores/maple/libmaple/usart.h
+++ b/STM32F1/cores/maple/libmaple/usart.h
@@ -468,9 +468,9 @@ void usart_init(const usart_dev_t *dev);
 /**
  * @brief Configure GPIOs for use as USART TX/RX.
  * @param udev USART device to use
- * @param rx_dev RX pin gpio_dev
+ * @param rx_dev RX pin gpio_dev_t
  * @param rx     RX pin bit on rx_dev
- * @param tx_dev TX pin gpio_dev
+ * @param tx_dev TX pin gpio_dev_t
  * @param tx     TX pin bit on tx_dev
  * @param flags  Currently ignored
  */
diff --git a/STM32F1/libraries/A_STM32_Examples/examples/Maple/InteractiveTest/InteractiveTest.ino b/STM32F1/libraries/A_STM32_Examples/examples/Maple/InteractiveTest/InteractiveTest.ino
index 26925e16a..a180e4356 100644
--- a/STM32F1/libraries/A_STM32_Examples/examples/Maple/InteractiveTest/InteractiveTest.ino
+++ b/STM32F1/libraries/A_STM32_Examples/examples/Maple/InteractiveTest/InteractiveTest.ino
@@ -640,7 +640,7 @@ void measure_adc_noise(uint8 pin) {
 }
 
 void fast_gpio(int maple_pin) {
-    gpio_dev *dev = PIN_MAP[maple_pin].gpio_device;
+    gpio_dev_t *dev = PIN_MAP[maple_pin].gpio_device;
     uint32 bit = PIN_MAP[maple_pin].gpio_bit;
 
     gpio_write_bit(dev, bit, 1);
diff --git a/STM32F1/libraries/USBComposite/usb_mass.h b/STM32F1/libraries/USBComposite/usb_mass.h
index faa979fa4..1a3f6ef2a 100644
--- a/STM32F1/libraries/USBComposite/usb_mass.h
+++ b/STM32F1/libraries/USBComposite/usb_mass.h
@@ -94,8 +94,8 @@ extern "C" {
     usb_descriptor_endpoint DataOutEndpoint;
   } __packed usb_descriptor_config;
 
-  void usb_mass_enable(gpio_dev *disc_dev, uint8 disc_bit);
-  void usb_mass_disable(gpio_dev *disc_dev, uint8 disc_bit);
+  void usb_mass_enable(gpio_dev_t *disc_dev, uint8 disc_bit);
+  void usb_mass_disable(gpio_dev_t *disc_dev, uint8 disc_bit);
   void usb_mass_loop();
 
   void usb_mass_bot_set_csw(uint8_t cswStatus, uint8_t sendPermission);
diff --git a/STM32F1/libraries/Wire/SoftWire.h b/STM32F1/libraries/Wire/SoftWire.h
index 14e693e47..c731c62ac 100644
--- a/STM32F1/libraries/Wire/SoftWire.h
+++ b/STM32F1/libraries/Wire/SoftWire.h
@@ -127,9 +127,9 @@ class SoftWire : public WireBase {
     uint8 process(uint8);
     uint8 process();
  private:
-	const gpio_dev 	*sdaDevice;
+	const gpio_dev_t 	*sdaDevice;
 	uint8 	sdaBit;
-	const gpio_dev 	*sclDevice;
+	const gpio_dev_t 	*sclDevice;
 	uint8 	sclBit;	
  public:
     /*
diff --git a/STM32F1/libraries/Wire/Wire.h b/STM32F1/libraries/Wire/Wire.h
index a2890c196..27b35cfe3 100644
--- a/STM32F1/libraries/Wire/Wire.h
+++ b/STM32F1/libraries/Wire/Wire.h
@@ -45,7 +45,7 @@
 
 class TwoWire : public WireBase {
 private:
-    i2c_dev* sel_hard;
+    i2c_dev_t* sel_hard;
     uint8    dev_flags;
 	uint32	frequency; //new variable to store i2c frequency
 protected:
diff --git a/STM32F1/libraries/Wire/utility/WireBase.h b/STM32F1/libraries/Wire/utility/WireBase.h
index 764f76bbb..559f19064 100644
--- a/STM32F1/libraries/Wire/utility/WireBase.h
+++ b/STM32F1/libraries/Wire/utility/WireBase.h
@@ -55,7 +55,7 @@
 
 class WireBase { // Abstraction is awesome!
 protected:
-    i2c_msg itc_msg;
+    i2c_msg_t itc_msg;
     uint8 rx_buf[BUFFER_LENGTH];      /* receive buffer */
     uint8 rx_buf_idx;               /* first unread idx in rx_buf */
     uint8 rx_buf_len;               /* number of bytes read */
diff --git a/STM32F1/libraries/WireSlave/examples/i2c_libmaple_slave_reader/i2c_libmaple_slave_reader.ino b/STM32F1/libraries/WireSlave/examples/i2c_libmaple_slave_reader/i2c_libmaple_slave_reader.ino
index d99cd2272..bf399b2f6 100644
--- a/STM32F1/libraries/WireSlave/examples/i2c_libmaple_slave_reader/i2c_libmaple_slave_reader.ino
+++ b/STM32F1/libraries/WireSlave/examples/i2c_libmaple_slave_reader/i2c_libmaple_slave_reader.ino
@@ -19,15 +19,15 @@
 #include <Wire_slave.h>
 #include <Arduino.h>
 
-i2c_msg txMsg = {};
-uint8 txBuffer[255];
+i2c_msg_t txMsg = {0,0,0,0,NULL};
+uint8_t txBuffer[255];
 
-i2c_msg rxMsg = {};
-uint8 rxBuffer[255];
+i2c_msg_t rxMsg = {0,0,0,0,NULL};
+uint8_t rxBuffer[255];
 
 volatile uint32_t lastMessageTime;
 
-void funcrx(i2c_msg *msg __attribute__((unused))){
+void funcrx(i2c_msg_t *msg __attribute__((unused))){
   // This function is called when data is received:
   //  msg->addr will be our slave address being accessed
   //  msg->data will point to our receive buffer
@@ -50,7 +50,7 @@ void funcrx(i2c_msg *msg __attribute__((unused))){
   lastMessageTime = millis();
 }
 
-void functx(i2c_msg *msg){
+void functx(i2c_msg_t *msg){
   //
   // We will get this callback for each outgoing packet. Fill in the msg buffer
   // with the data to transmit and set the length to the size of the message.
diff --git a/STM32F1/libraries/WireSlave/src/Wire_slave.cpp b/STM32F1/libraries/WireSlave/src/Wire_slave.cpp
index bf3ce3f31..2310f18e1 100644
--- a/STM32F1/libraries/WireSlave/src/Wire_slave.cpp
+++ b/STM32F1/libraries/WireSlave/src/Wire_slave.cpp
@@ -36,7 +36,7 @@ static constexpr uint16_t MASTER_ADDRESS = 0x01;			// Use 0x01 since it's an inv
 
 // Constructors ////////////////////////////////////////////////////////////////
 
-TwoWire::TwoWire(i2c_dev* i2cDevice, uint32_t flags, uint32_t frequencyHz)
+TwoWire::TwoWire(i2c_dev_t* i2cDevice, uint32_t flags, uint32_t frequencyHz)
 	:	sel_hard(i2cDevice),
 		rxBuffer(nullptr),
 		rxBufferAllocated(0),
@@ -50,8 +50,8 @@ TwoWire::TwoWire(i2c_dev* i2cDevice, uint32_t flags, uint32_t frequencyHz)
 		haveReset(false),
 		useGeneralCall((flags & I2C_SLAVE_GENERAL_CALL) ? true : false),
 		dev_flags(flags),
-		itc_msg({}),
-		itc_slave_msg({}),
+		itc_msg({0,0,0,0,nullptr}),
+		itc_slave_msg({0,0,0,0,nullptr}),
 		frequency((flags & I2C_FAST_MODE) ? 400000 : frequencyHz),
 		user_onRequest(nullptr),
 		user_onReceive(nullptr)
@@ -195,6 +195,7 @@ uint8 TwoWire::process(bool stop)
 // to bulk send
 uint8 TwoWire::requestFrom(uint16_t address, uint8_t num_bytes, uint32_t iaddress, uint8_t isize, bool sendStop)
 {
+	(void)iaddress; (void)isize; // unused
 	if (!isMaster()) return 0;
 
 	allocateRxBuffer(num_bytes);
@@ -400,7 +401,7 @@ void TwoWire::flush(void)
 }
 
 // behind the scenes function that is called when data is received
-void __attribute__((always_inline)) TwoWire::onReceiveService(i2c_msg* msg)
+void __attribute__((always_inline)) TwoWire::onReceiveService(i2c_msg_t* msg)
 {
 	// don't bother if user hasn't registered a callback
 	if (!user_onReceive) {
@@ -423,7 +424,7 @@ void __attribute__((always_inline)) TwoWire::onReceiveService(i2c_msg* msg)
 }
 
 // behind the scenes function that is called when data is requested
-void __attribute__((always_inline)) TwoWire::onRequestService(i2c_msg* msg)
+void __attribute__((always_inline)) TwoWire::onRequestService(i2c_msg_t* msg)
 {
 	// don't bother if user hasn't registered a callback
 	if (!user_onRequest) return;
@@ -435,7 +436,7 @@ void __attribute__((always_inline)) TwoWire::onRequestService(i2c_msg* msg)
 	// alert user program
 	user_onRequest();
 
-	// update i2c_msg
+	// update i2c_msg_t
 	msg->data = txBuffer;				// This assignment is necessary as the writes in user function may change the pointer
 	msg->length = txBufferLength;
 
@@ -500,22 +501,22 @@ TwoWire& Wire1 = TwoWire::getInstance1();
 
 // onRequestServiceX and onReceiveServiceX can't be inline since they
 // are exclusively called via a function pointer
-void TwoWire::onRequestService1(i2c_msg* msg)
+void TwoWire::onRequestService1(i2c_msg_t* msg)
 {
 	Wire.onRequestService(msg);
 }
 
-void TwoWire::onReceiveService1(i2c_msg* msg)
+void TwoWire::onReceiveService1(i2c_msg_t* msg)
 {
 	Wire.onReceiveService(msg);
 }
 
 #if WIRE_INTERFACES_COUNT > 1
-void TwoWire::onRequestService2(i2c_msg* msg)
+void TwoWire::onRequestService2(i2c_msg_t* msg)
 {
 	Wire1.onRequestService(msg);
 }
-void TwoWire::onReceiveService2(i2c_msg* msg)
+void TwoWire::onReceiveService2(i2c_msg_t* msg)
 {
 	Wire1.onReceiveService(msg);
 }
diff --git a/STM32F1/libraries/WireSlave/src/Wire_slave.h b/STM32F1/libraries/WireSlave/src/Wire_slave.h
index 31feefd2f..377c95623 100644
--- a/STM32F1/libraries/WireSlave/src/Wire_slave.h
+++ b/STM32F1/libraries/WireSlave/src/Wire_slave.h
@@ -54,7 +54,7 @@ typedef enum EndTranmissionCodes {
 class TwoWire: public Stream
 {
 private:
-	i2c_dev* sel_hard;			// Pointer to the I2C device for this interface
+	i2c_dev_t* sel_hard;			// Pointer to the I2C device for this interface
 
 	uint8_t *rxBuffer;			// Receive Buffer -- lazily allocated
 	size_t rxBufferAllocated;	// Receive Buffer bytes allocated
@@ -71,8 +71,8 @@ class TwoWire: public Stream
 	bool useGeneralCall;		// Flag indicating if I2C General Call slave address will be processed by slave
 
 	uint32_t dev_flags;			// Flags used for enabling master or slave
-	i2c_msg itc_msg;			// Master Tx/Rx Message and Slave Tx Message
-	i2c_msg itc_slave_msg;		// Slave Rx Message (since it's completely asynchronous)
+	i2c_msg_t itc_msg;			// Master Tx/Rx Message and Slave Tx Message
+	i2c_msg_t itc_slave_msg;		// Slave Rx Message (since it's completely asynchronous)
 
 	uint32_t frequency;			// Frequency to use for I2C Master (defaults to 100000)
 
@@ -86,17 +86,17 @@ class TwoWire: public Stream
 
 	uint8 process(bool stop = true);	// wrapper for i2c_master_xfer
 
-	inline void __attribute__((always_inline)) onReceiveService(i2c_msg* msg);
-	inline void __attribute__((always_inline)) onRequestService(i2c_msg* msg);
+	inline void __attribute__((always_inline)) onReceiveService(i2c_msg_t* msg);
+	inline void __attribute__((always_inline)) onRequestService(i2c_msg_t* msg);
 
-	static void onRequestService1(i2c_msg*);
-	static void onReceiveService1(i2c_msg*);
+	static void onRequestService1(i2c_msg_t*);
+	static void onReceiveService1(i2c_msg_t*);
 #if WIRE_INTERFACES_COUNT > 1
-	static void onRequestService2(i2c_msg*);
-	static void onReceiveService2(i2c_msg*);
+	static void onRequestService2(i2c_msg_t*);
+	static void onReceiveService2(i2c_msg_t*);
 #endif
 
-	TwoWire(i2c_dev* i2cDevice, uint32_t flags = I2C_SLAVE_GENERAL_CALL, uint32_t frequencyHz = 100000);
+	TwoWire(i2c_dev_t* i2cDevice, uint32_t flags = I2C_SLAVE_GENERAL_CALL, uint32_t frequencyHz = 100000);
 	TwoWire() = delete;
 	TwoWire(const TwoWire&) = delete;
 	TwoWire& operator=(const TwoWire&) = delete;
@@ -137,7 +137,7 @@ class TwoWire: public Stream
 	uint8_t requestFrom(uint16_t slaveAddress, uint8_t num_bytes, uint32_t iaddress, uint8_t isize, bool sendStop);		// Master Request From Slave
 
 	virtual size_t write(uint8_t data) override;	// Write functions for either Master transmission or Slave onRequest handler
-	virtual size_t write(const void *data, uint32_t quantity) override;	// Note: this is the signature of the base Print::write function
+	virtual size_t write(const void *data, uint32_t quantity);	// Note: this is the signature of the base Print::write function
 
 	virtual int available(void) override;		// Bytes available in the receive buffer from either Master Request From or Slave onReceive handler
 	virtual int read(void) override;			// Read byte from receive buffer from either Master Request From or Slave onReceive handler
diff --git a/STM32F1/libraries/WireSlave/src/libmaple/i2c_slave.h b/STM32F1/libraries/WireSlave/src/libmaple/i2c_slave.h
index 8eecaf54a..4c5e87557 100644
--- a/STM32F1/libraries/WireSlave/src/libmaple/i2c_slave.h
+++ b/STM32F1/libraries/WireSlave/src/libmaple/i2c_slave.h
@@ -33,14 +33,14 @@
  *  Master Usage notes:
  *
  * - Enable an I2C device with i2c_master_enable().
- * - Initialize an array of struct i2c_msg to suit the bus
+ * - Initialize an array of struct i2c_msg_t to suit the bus
  *   transactions (reads/writes) you wish to perform.
  * - Call i2c_master_xfer() to do the work.
  *
  * Slave Usage notes:
  * - Enable I2C slave by calling i2c_slave_enable().
  *   Check flags for usage. Enabling master also enabled slave.
- * - initialise the i2c_msg struct and the data buffer
+ * - initialise the i2c_msg_t struct and the data buffer
  * - initialise the callback functions
  *
  * I2C slave support added 2012 by Barry Carter. barry.carter@gmail.com, headfuzz.co.uk
@@ -56,7 +56,7 @@ extern "C" {
 /*
  * Series header must provide:
  *
- * - uint32 _i2c_bus_clk(i2c_dev*): Clock frequency of dev's bus, in
+ * - uint32_t _i2c_bus_clk(i2c_dev_t*): Clock frequency of dev's bus, in
  *   MHz. (This is for internal use only).
  *
  * - (optional) _I2C_HAVE_IRQ_FIXUP: Leave undefined, or define to 1.
@@ -65,7 +65,7 @@ extern "C" {
  *   the series header must also declare and implement a routine with
  *   this signature (it may also be provided as a macro):
  *
- *       void _i2c_irq_priority_fixup(i2c_dev*)
+ *       void _i2c_irq_priority_fixup(i2c_dev_t*)
  *
  *   This will be called by i2c_enable_irq() before actually enabling
  *   I2C interrupts.
@@ -82,23 +82,23 @@ extern "C" {
 #include <libmaple/gpio.h>
 
 /** I2C register map type */
-typedef struct i2c_reg_map {
-    __IO uint32 CR1;            /**< Control register 1 */
-    __IO uint32 CR2;            /**< Control register 2 */
-    __IO uint32 OAR1;           /**< Own address register 1 */
-    __IO uint32 OAR2;           /**< Own address register 2 */
-    __IO uint32 DR;             /**< Data register */
-    __IO uint32 SR1;            /**< Status register 1 */
-    __IO uint32 SR2;            /**< Status register 2 */
-    __IO uint32 CCR;            /**< Clock control register */
-    __IO uint32 TRISE;          /**< TRISE (rise time) register */
-} i2c_reg_map;
+typedef struct i2c_reg_map_t {
+    __IO uint32_t CR1;            /**< Control register 1 */
+    __IO uint32_t CR2;            /**< Control register 2 */
+    __IO uint32_t OAR1;           /**< Own address register 1 */
+    __IO uint32_t OAR2;           /**< Own address register 2 */
+    __IO uint32_t DR;             /**< Data register */
+    __IO uint32_t SR1;            /**< Status register 1 */
+    __IO uint32_t SR2;            /**< Status register 2 */
+    __IO uint32_t CCR;            /**< Clock control register */
+    __IO uint32_t TRISE;          /**< TRISE (rise time) register */
+} i2c_reg_map_t;
 
 /**
  * @brief I2C message type
  */
-typedef struct i2c_msg {
-    uint16 addr;                /**< Address */
+typedef struct i2c_msg_t {
+    uint16_t  addr;                /**< Address */
 
 #define I2C_MSG_READ            0x1
 #define I2C_MSG_10BIT_ADDR      0x2
@@ -106,12 +106,12 @@ typedef struct i2c_msg {
      * Bitwise OR of:
      * - I2C_MSG_READ (write is default)
      * - I2C_MSG_10BIT_ADDR (7-bit is default) */
-    uint16 flags;
+    uint16_t  flags;
 
-    uint16 length;              /**< Message length */
-    uint16 xferred;             /**< Messages transferred */
-    uint8 *data;                /**< Data */
-} i2c_msg;
+    uint16_t  length;              /**< Message length */
+    uint16_t  xferred;             /**< Messages transferred */
+    uint8_t *data;                /**< Data */
+} i2c_msg_t;
 
 /*
  * Register bit definitions
@@ -210,14 +210,14 @@ typedef struct i2c_msg {
 #define I2C_SLAVE_USE_TX_BUFFER 0x20          // Use a buffered message when doing a slave transmit
 #define I2C_SLAVE_DUAL_ADDRESS  0x40          // Enable the dual slave address scheme
 #define I2C_SLAVE_GENERAL_CALL  0x80          // Enable the general call on address 0x00
-void i2c_master_enable(i2c_dev *dev, uint32 flags);
-void i2c_slave_enable(i2c_dev *dev, uint32 flags);
+void i2c_master_enable(i2c_dev_t *dev, uint32_t flags);
+void i2c_slave_enable(i2c_dev_t *dev, uint32_t flags);
 
 #define I2C_ERROR_PROTOCOL      (-1)
 #define I2C_ERROR_TIMEOUT       (-2)
-int32 i2c_master_xfer(i2c_dev *dev, i2c_msg *msgs, uint16 num, uint32 timeout);
+int32 i2c_master_xfer(i2c_dev_t *dev, i2c_msg_t *msgs, uint16_t  num, uint32_t timeout);
 
-void i2c_bus_reset(const i2c_dev *dev);
+void i2c_bus_reset(const i2c_dev_t *dev);
 
 /**
  * @brief Disable an I2C device
@@ -227,7 +227,7 @@ void i2c_bus_reset(const i2c_dev *dev);
  *
  * @param dev Device to disable.
  */
-static inline void i2c_disable(i2c_dev *dev) {
+static inline void i2c_disable(i2c_dev_t *dev) {
     dev->regs->CR1 &= ~I2C_CR1_PE;
     dev->state = I2C_STATE_DISABLED;
 }
@@ -238,8 +238,8 @@ static inline void i2c_disable(i2c_dev *dev) {
  * @brief Generate a start condition on the bus.
  * @param dev I2C device
  */
-static inline void i2c_start_condition(i2c_dev *dev) {
-    uint32 cr1;
+static inline void i2c_start_condition(i2c_dev_t *dev) {
+    uint32_t cr1;
     while ((cr1 = dev->regs->CR1) & (I2C_CR1_START |
                                      I2C_CR1_STOP  |
                                      I2C_CR1_PEC)) {
@@ -252,8 +252,8 @@ static inline void i2c_start_condition(i2c_dev *dev) {
  * @brief Generate a stop condition on the bus
  * @param dev I2C device
  */
-static inline void i2c_stop_condition(i2c_dev *dev) {
-    uint32 cr1;
+static inline void i2c_stop_condition(i2c_dev_t *dev) {
+    uint32_t cr1;
     while ((cr1 = dev->regs->CR1) & (I2C_CR1_START |
                                      I2C_CR1_STOP  |
                                      I2C_CR1_PEC)) {
@@ -287,7 +287,7 @@ static inline void i2c_stop_condition(i2c_dev *dev) {
  *             I2C_IRQ_EVENT (event interrupt), and
  *             I2C_IRQ_BUFFER (buffer interrupt).
  */
-static inline void i2c_enable_irq(i2c_dev *dev, uint32 irqs) {
+static inline void i2c_enable_irq(i2c_dev_t *dev, uint32_t irqs) {
     _i2c_irq_priority_fixup(dev);
     dev->regs->CR2 |= irqs;
 }
@@ -300,7 +300,7 @@ static inline void i2c_enable_irq(i2c_dev *dev, uint32 irqs) {
  *             I2C_IRQ_EVENT (event interrupt), and
  *             I2C_IRQ_BUFFER (buffer interrupt).
  */
-static inline void i2c_disable_irq(i2c_dev *dev, uint32 irqs) {
+static inline void i2c_disable_irq(i2c_dev_t *dev, uint32_t irqs) {
     dev->regs->CR2 &= ~irqs;
 }
 
@@ -310,7 +310,7 @@ static inline void i2c_disable_irq(i2c_dev *dev, uint32 irqs) {
  * @brief Enable I2C acknowledgment
  * @param dev I2C device
  */
-static inline void i2c_enable_ack(i2c_dev *dev) {
+static inline void i2c_enable_ack(i2c_dev_t *dev) {
     dev->regs->CR1 |= I2C_CR1_ACK;
 }
 
@@ -318,7 +318,7 @@ static inline void i2c_enable_ack(i2c_dev *dev) {
  * @brief Disable I2C acknowledgment
  * @param dev I2C device
  */
-static inline void i2c_disable_ack(i2c_dev *dev) {
+static inline void i2c_disable_ack(i2c_dev_t *dev) {
     dev->regs->CR1 &= ~I2C_CR1_ACK;
 }
 
@@ -333,7 +333,7 @@ static inline void i2c_disable_ack(i2c_dev *dev) {
  * @param dev I2C Device
  * @see i2c_release_gpios()
  */
-extern void i2c_config_gpios(const i2c_dev *dev);
+extern void i2c_config_gpios(const i2c_dev_t *dev);
 
 /**
  * @brief Release GPIOs controlling an I2C bus
@@ -345,17 +345,17 @@ extern void i2c_config_gpios(const i2c_dev *dev);
  * @param dev I2C device
  * @see i2c_config_gpios()
  */
-extern void i2c_master_release_bus(const i2c_dev *dev);
+extern void i2c_master_release_bus(const i2c_dev_t *dev);
 
 /* Miscellaneous low-level routines */
 
-void i2c_init(i2c_dev *dev);
+void i2c_init(i2c_dev_t *dev);
 
 /**
  * @brief Turn on an I2C peripheral
  * @param dev Device to enable
  */
-static inline void i2c_peripheral_enable(i2c_dev *dev) {
+static inline void i2c_peripheral_enable(i2c_dev_t *dev) {
     dev->regs->CR1 |= I2C_CR1_PE;
 }
 
@@ -363,7 +363,7 @@ static inline void i2c_peripheral_enable(i2c_dev *dev) {
  * @brief Turn off an I2C peripheral
  * @param dev Device to turn off
  */
-static inline void i2c_peripheral_disable(i2c_dev *dev) {
+static inline void i2c_peripheral_disable(i2c_dev_t *dev) {
     dev->regs->CR1 &= ~I2C_CR1_PE;
 }
 
@@ -372,7 +372,7 @@ static inline void i2c_peripheral_disable(i2c_dev *dev) {
  * @param dev I2C device
  * @param byte Byte to write
  */
-static inline void i2c_write(i2c_dev *dev, uint8 byte) {
+static inline void i2c_write(i2c_dev_t *dev, uint8 byte) {
     dev->regs->DR = byte;
 }
 
@@ -384,10 +384,10 @@ static inline void i2c_write(i2c_dev *dev, uint8 byte) {
  *             rcc_dev_clk(dev) == RCC_APB1, freq must be at most
  *             PCLK1, in MHz). There is an additional limit of 46 MHz.
  */
-static inline void i2c_set_input_clk(i2c_dev *dev, uint32 freq) {
+static inline void i2c_set_input_clk(i2c_dev_t *dev, uint32_t freq) {
 #define I2C_MAX_FREQ_MHZ 46
     ASSERT(2 <= freq && freq <= _i2c_bus_clk(dev) && freq <= I2C_MAX_FREQ_MHZ);
-    uint32 cr2 = dev->regs->CR2;
+    uint32_t cr2 = dev->regs->CR2;
     cr2 &= ~I2C_CR2_FREQ;
     cr2 |= freq;
     dev->regs->CR2 = freq;
@@ -403,8 +403,8 @@ static inline void i2c_set_input_clk(i2c_dev *dev, uint32 freq) {
  * @param val Value to use for clock control register (in
  *            Fast/Standard mode)
  */
-static inline void i2c_set_clk_control(i2c_dev *dev, uint32 val) {
-    uint32 ccr = dev->regs->CCR;
+static inline void i2c_set_clk_control(i2c_dev_t *dev, uint32_t val) {
+    uint32_t ccr = dev->regs->CCR;
     ccr &= ~I2C_CCR_CCR;
     ccr |= val;
     dev->regs->CCR = ccr;
@@ -416,7 +416,7 @@ static inline void i2c_set_clk_control(i2c_dev *dev, uint32 val) {
  * @param trise Maximum rise time in fast/standard mode (see chip
  *              reference manual for the relevant formulas).
  */
-static inline void i2c_set_trise(i2c_dev *dev, uint32 trise) {
+static inline void i2c_set_trise(i2c_dev_t *dev, uint32_t trise) {
     dev->regs->TRISE = trise;
 }
 
@@ -428,7 +428,7 @@ static inline void i2c_set_trise(i2c_dev *dev, uint32 trise) {
  * @brief Enable Dual addressing mode to allow peripheral to have 2 addresses
  * @param dev I2C device
   */
-static inline void i2c_slave_dual_address_enable(i2c_dev *dev) {
+static inline void i2c_slave_dual_address_enable(i2c_dev_t *dev) {
     dev->regs->OAR2 |= I2C_OAR2_ENDUAL;
 }
 
@@ -436,25 +436,25 @@ static inline void i2c_slave_dual_address_enable(i2c_dev *dev) {
  * @brief Enable General Call to allow the  unit to respond on addr 0x00
  * @param dev I2C device
   */
-static inline void i2c_slave_general_call_enable(i2c_dev *dev) {
+static inline void i2c_slave_general_call_enable(i2c_dev_t *dev) {
     dev->regs->CR1 |= I2C_CR1_ENGC;
 }
 
 /* callback functions */
 /* Callback handler for data received over the bus */
-void i2c_slave_attach_recv_handler(i2c_dev *dev, i2c_msg *msg, i2c_slave_recv_callback_func func);
+void i2c_slave_attach_recv_handler(i2c_dev_t *dev, i2c_msg_t *msg, i2c_slave_recv_callback_func_t func);
 
 /* Callback handler for data being requested over the bus
  * The callback function must call i2c_write to get the data over the bus
  */
-void i2c_slave_attach_transmit_handler(i2c_dev *dev, i2c_msg *msg, i2c_slave_transmit_callback_func func);
+void i2c_slave_attach_transmit_handler(i2c_dev_t *dev, i2c_msg_t *msg, i2c_slave_transmit_callback_func func);
 
 /**
  * @brief Set the primary I2c slave address
  * @param dev I2C device
  * @param address the 8 or 10 bit i2c address
   */
-static inline void i2c_slave_set_own_address(i2c_dev *dev, uint16 address) {
+static inline void i2c_slave_set_own_address(i2c_dev_t *dev, uint16_t  address) {
     dev->regs->OAR1 = address <<1;
 }
 
@@ -463,7 +463,7 @@ static inline void i2c_slave_set_own_address(i2c_dev *dev, uint16 address) {
  * @param dev I2C device
  * @param address the 8 or 10 bit i2c address
   */
-static inline void i2c_slave_set_own_address2(i2c_dev *dev, uint16 address) {
+static inline void i2c_slave_set_own_address2(i2c_dev_t *dev, uint16_t  address) {
 dev->regs->OAR2 = (address <<1 ) | I2C_OAR2_ENDUAL;
 }
 
diff --git a/STM32F1/variants/generic_stm32f103r/board.cpp b/STM32F1/variants/generic_stm32f103r/board.cpp
index 6fe63b0a8..24815ec3c 100644
--- a/STM32F1/variants/generic_stm32f103r/board.cpp
+++ b/STM32F1/variants/generic_stm32f103r/board.cpp
@@ -72,7 +72,7 @@ void boardInit(void) {
 
 extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
 /*
-    gpio_dev *gpio_device;      GPIO device 
+    gpio_dev_t *gpio_device;      GPIO device 
     timer_dev *timer_device;    Pin's timer device, if any.
     const adc_dev *adc_device;  ADC device, if any. 
     uint8 gpio_bit;             Pin's GPIO port bit. 
diff --git a/STM32F1/variants/generic_stm32f103v/board.cpp b/STM32F1/variants/generic_stm32f103v/board.cpp
index ec2e68b15..72c4c18aa 100644
--- a/STM32F1/variants/generic_stm32f103v/board.cpp
+++ b/STM32F1/variants/generic_stm32f103v/board.cpp
@@ -71,7 +71,7 @@ void boardInit(void) {
 
 extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
 /*
-    gpio_dev *gpio_device;      GPIO device 
+    gpio_dev_t *gpio_device;      GPIO device 
     timer_dev *timer_device;    Pin's timer device, if any.
     const adc_dev *adc_device;  ADC device, if any. 
     uint8 gpio_bit;             Pin's GPIO port bit. 
diff --git a/STM32F1/variants/generic_stm32f103z/board.cpp b/STM32F1/variants/generic_stm32f103z/board.cpp
index a6cceebd9..e9630e5d5 100644
--- a/STM32F1/variants/generic_stm32f103z/board.cpp
+++ b/STM32F1/variants/generic_stm32f103z/board.cpp
@@ -71,7 +71,7 @@ void boardInit(void) {
 
 extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
 /*
-    gpio_dev *gpio_device;      GPIO device 
+    gpio_dev_t *gpio_device;      GPIO device 
     timer_dev *timer_device;    Pin's timer device, if any.
     const adc_dev *adc_device;  ADC device, if any. 
     uint8 gpio_bit;             Pin's GPIO port bit. 
diff --git a/STM32F1/variants/maple_ret6/board.cpp b/STM32F1/variants/maple_ret6/board.cpp
index 2b4e2e49d..7d3f5d0e2 100644
--- a/STM32F1/variants/maple_ret6/board.cpp
+++ b/STM32F1/variants/maple_ret6/board.cpp
@@ -71,7 +71,7 @@ void boardInit(void) {
 
 extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
 /*
-    gpio_dev *gpio_device;      GPIO device 
+    gpio_dev_t *gpio_device;      GPIO device 
     timer_dev *timer_device;    Pin's timer device, if any.
     const adc_dev *adc_device;  ADC device, if any. 
     uint8 gpio_bit;             Pin's GPIO port bit.