diff --git a/Cargo.toml b/Cargo.toml index a9ed7c28..c9d40797 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -17,10 +17,11 @@ default-target = "x86_64-unknown-linux-gnu" [dependencies] cortex-m = "0.6.0" -nb = "0.1.2" +nb = "1" cortex-m-rt = "0.6.8" stm32f1 = "0.11.0" embedded-dma = "0.1.2" +embedded-hal = "=1.0.0-alpha.4" [dependencies.void] default-features = false @@ -30,9 +31,6 @@ version = "1.0.2" default-features = false version = "0.2.2" -[dependencies.embedded-hal] -version = "0.2.3" -features = ["unproven"] [dependencies.stm32-usbd] version = "0.5.0" diff --git a/examples/adc.rs b/examples/adc.rs index 3979d543..84fe153d 100644 --- a/examples/adc.rs +++ b/examples/adc.rs @@ -40,12 +40,12 @@ fn main() -> ! { let mut ch1 = gpiob.pb1.into_analog(&mut gpiob.crl); loop { - let data: u16 = adc1.read(&mut ch0).unwrap(); + let data: u16 = adc1.try_read(&mut ch0).unwrap(); hprintln!("adc1: {}", data).unwrap(); #[cfg(feature = "stm32f103")] { - let data1: u16 = adc2.read(&mut ch1).unwrap(); + let data1: u16 = adc2.try_read(&mut ch1).unwrap(); hprintln!("adc2: {}", data1).unwrap(); } } diff --git a/examples/blinky.rs b/examples/blinky.rs index 9fae270c..73c63c0a 100644 --- a/examples/blinky.rs +++ b/examples/blinky.rs @@ -14,7 +14,7 @@ use panic_halt as _; use nb::block; use cortex_m_rt::entry; -use embedded_hal::digital::v2::OutputPin; +use embedded_hal::digital::OutputPin; use stm32f1xx_hal::{pac, prelude::*, timer::Timer}; #[entry] @@ -44,9 +44,9 @@ fn main() -> ! { // Wait for the timer to trigger an update and change the state of the LED loop { - block!(timer.wait()).unwrap(); - led.set_high().unwrap(); - block!(timer.wait()).unwrap(); - led.set_low().unwrap(); + block!(timer.try_wait()).unwrap(); + led.try_set_high().unwrap(); + block!(timer.try_wait()).unwrap(); + led.try_set_low().unwrap(); } } diff --git a/examples/blinky_generic.rs b/examples/blinky_generic.rs index 5809d4be..b94578c3 100644 --- a/examples/blinky_generic.rs +++ b/examples/blinky_generic.rs @@ -9,7 +9,7 @@ use panic_halt as _; use nb::block; use cortex_m_rt::entry; -use embedded_hal::digital::v2::OutputPin; +use embedded_hal::digital::OutputPin; use stm32f1xx_hal::{pac, prelude::*, timer::Timer}; #[entry] @@ -37,13 +37,13 @@ fn main() -> ! { // Wait for the timer to trigger an update and change the state of the LED loop { - block!(timer.wait()).unwrap(); + block!(timer.try_wait()).unwrap(); for led in leds.iter_mut() { - led.set_high().unwrap(); + led.try_set_high().unwrap(); } - block!(timer.wait()).unwrap(); + block!(timer.try_wait()).unwrap(); for led in leds.iter_mut() { - led.set_low().unwrap(); + led.try_set_low().unwrap(); } } } diff --git a/examples/blinky_rtc.rs b/examples/blinky_rtc.rs index 0cfd52d3..f58607a9 100644 --- a/examples/blinky_rtc.rs +++ b/examples/blinky_rtc.rs @@ -15,7 +15,7 @@ use panic_halt as _; use stm32f1xx_hal::{pac, prelude::*, rtc::Rtc}; use cortex_m_rt::entry; -use embedded_hal::digital::v2::OutputPin; +use embedded_hal::digital::OutputPin; use nb::block; #[entry] @@ -43,10 +43,10 @@ fn main() -> ! { rtc.set_alarm(5); block!(rtc.wait_alarm()).unwrap(); if led_on { - led.set_low().unwrap(); + led.try_set_low().unwrap(); led_on = false; } else { - led.set_high().unwrap(); + led.try_set_high().unwrap(); led_on = true; } } diff --git a/examples/blinky_rtcalarm_irq.rs b/examples/blinky_rtcalarm_irq.rs index 8a684459..dee8603b 100644 --- a/examples/blinky_rtcalarm_irq.rs +++ b/examples/blinky_rtcalarm_irq.rs @@ -24,7 +24,7 @@ use crate::hal::{ use core::cell::RefCell; use cortex_m::{asm::wfi, interrupt::Mutex}; use cortex_m_rt::entry; -use embedded_hal::digital::v2::OutputPin; +use embedded_hal::digital::OutputPin; // A type definition for the GPIO pin to be used for our LED type LEDPIN = gpioc::PC13>; @@ -68,7 +68,7 @@ fn RTCALARM() { exti.pr.write(|w| w.pr17().set_bit()); rtc.set_alarm(rtc.current_time() + TOGGLE_INTERVAL_SECONDS); - let _ = led.toggle(); + let _ = led.try_toggle(); } #[cfg(not(feature = "stm32f101"))] @@ -82,7 +82,7 @@ fn main() -> ! { // Set up the GPIO pin let mut gpioc = dp.GPIOC.split(&mut rcc.apb2); let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh); - let _ = led.set_high(); // Turn off + let _ = led.try_set_high(); // Turn off cortex_m::interrupt::free(|cs| *G_LED.borrow(cs).borrow_mut() = Some(led)); diff --git a/examples/blinky_timer_irq.rs b/examples/blinky_timer_irq.rs index cc9bf57c..d6649c76 100644 --- a/examples/blinky_timer_irq.rs +++ b/examples/blinky_timer_irq.rs @@ -24,7 +24,7 @@ use crate::hal::{ use core::cell::RefCell; use cortex_m::{asm::wfi, interrupt::Mutex}; use cortex_m_rt::entry; -use embedded_hal::digital::v2::OutputPin; +use embedded_hal::digital::OutputPin; // NOTE You can uncomment 'hprintln' here and in the code below for a bit more // verbosity at runtime, at the cost of throwing off the timing of the blink @@ -62,8 +62,8 @@ fn TIM2() { }) }); - let _ = led.toggle(); - let _ = tim.wait(); + let _ = led.try_toggle(); + let _ = tim.try_wait(); } #[entry] @@ -81,7 +81,7 @@ fn main() -> ! { // Configure PC13 pin to blink LED let mut gpioc = dp.GPIOC.split(&mut rcc.apb2); let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh); - let _ = led.set_high(); // Turn off + let _ = led.try_set_high(); // Turn off // Move the pin into our global storage cortex_m::interrupt::free(|cs| *G_LED.borrow(cs).borrow_mut() = Some(led)); diff --git a/examples/delay.rs b/examples/delay.rs index e95a50b8..5fe290b1 100644 --- a/examples/delay.rs +++ b/examples/delay.rs @@ -7,7 +7,7 @@ use panic_halt as _; use cortex_m_rt::entry; -use embedded_hal::digital::v2::OutputPin; +use embedded_hal::digital::OutputPin; use stm32f1xx_hal::{delay::Delay, pac, prelude::*}; #[entry] @@ -34,9 +34,9 @@ fn main() -> ! { let mut delay = Delay::new(cp.SYST, clocks); loop { - led.set_high().unwrap(); - delay.delay_ms(1_000_u16); - led.set_low().unwrap(); - delay.delay_ms(1_000_u16); + led.try_set_high().unwrap(); + delay.try_delay_ms(1_000_u16).unwrap(); + led.try_set_low().unwrap(); + delay.try_delay_ms(1_000_u16).unwrap(); } } diff --git a/examples/dynamic_gpio.rs b/examples/dynamic_gpio.rs index 10e76fdf..e263f4dd 100644 --- a/examples/dynamic_gpio.rs +++ b/examples/dynamic_gpio.rs @@ -8,7 +8,7 @@ use nb::block; use cortex_m_rt::entry; use cortex_m_semihosting::hprintln; -use embedded_hal::digital::v2::{InputPin, OutputPin}; +use embedded_hal::digital::{InputPin, OutputPin}; use stm32f1xx_hal::{pac, prelude::*, timer::Timer}; #[entry] @@ -37,13 +37,13 @@ fn main() -> ! { // Wait for the timer to trigger an update and change the state of the LED loop { pin.make_floating_input(&mut gpioc.crh); - block!(timer.wait()).unwrap(); - hprintln!("{}", pin.is_high().unwrap()).unwrap(); + block!(timer.try_wait()).unwrap(); + hprintln!("{}", pin.try_is_high().unwrap()).unwrap(); pin.make_push_pull_output(&mut gpioc.crh); - pin.set_high().unwrap(); - block!(timer.wait()).unwrap(); - pin.set_low().unwrap(); - block!(timer.wait()).unwrap(); + pin.try_set_high().unwrap(); + block!(timer.try_wait()).unwrap(); + pin.try_set_low().unwrap(); + block!(timer.try_wait()).unwrap(); } } diff --git a/examples/exti.rs b/examples/exti.rs index c96dce8a..8c5f8d85 100644 --- a/examples/exti.rs +++ b/examples/exti.rs @@ -29,7 +29,7 @@ fn EXTI9_5() { let int_pin = unsafe { &mut *INT_PIN.as_mut_ptr() }; if int_pin.check_interrupt() { - led.toggle().unwrap(); + led.try_toggle().unwrap(); // if we don't clear this bit, the ISR would trigger indefinitely int_pin.clear_interrupt_pending_bit(); diff --git a/examples/led.rs b/examples/led.rs index 2b11679e..0f971574 100644 --- a/examples/led.rs +++ b/examples/led.rs @@ -16,7 +16,7 @@ use panic_halt as _; use cortex_m_rt::entry; -use embedded_hal::digital::v2::OutputPin; +use embedded_hal::digital::OutputPin; use stm32f1xx_hal::{pac, prelude::*}; #[entry] @@ -30,21 +30,21 @@ fn main() -> ! { gpioc .pc9 .into_push_pull_output(&mut gpioc.crh) - .set_high() + .try_set_high() .unwrap(); #[cfg(feature = "stm32f101")] gpioc .pc9 .into_push_pull_output(&mut gpioc.crh) - .set_high() + .try_set_high() .unwrap(); #[cfg(any(feature = "stm32f103", feature = "stm32f105", feature = "stm32f107"))] gpioc .pc13 .into_push_pull_output(&mut gpioc.crh) - .set_low() + .try_set_low() .unwrap(); loop {} diff --git a/examples/mfrc522.rs b/examples/mfrc522.rs.disabled similarity index 88% rename from examples/mfrc522.rs rename to examples/mfrc522.rs.disabled index 2edaad9a..fc72cd0e 100644 --- a/examples/mfrc522.rs +++ b/examples/mfrc522.rs.disabled @@ -7,7 +7,7 @@ use panic_itm as _; use cortex_m::iprintln; use cortex_m_rt::entry; -use embedded_hal::digital::{v1_compat::OldOutputPin, v2::OutputPin}; +use embedded_hal::digital::OutputPin; use mfrc522::Mfrc522; use stm32f1xx_hal::{pac, prelude::*, spi::Spi}; @@ -39,10 +39,10 @@ fn main() -> ! { ); let nss = gpioa.pa4.into_push_pull_output(&mut gpioa.crl); - let mut mfrc522 = Mfrc522::new(spi, OldOutputPin::from(nss)).unwrap(); + let mut mfrc522 = Mfrc522::new(spi, nss).unwrap(); let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh); - led.set_high().unwrap(); + led.try_set_high().unwrap(); loop { if let Ok(atqa) = mfrc522.reqa() { diff --git a/examples/multi_mode_gpio.rs b/examples/multi_mode_gpio.rs index 58bcd145..5800e273 100644 --- a/examples/multi_mode_gpio.rs +++ b/examples/multi_mode_gpio.rs @@ -8,7 +8,7 @@ use nb::block; use cortex_m_rt::entry; use cortex_m_semihosting::hprintln; -use embedded_hal::digital::v2::{InputPin, OutputPin}; +use embedded_hal::digital::{InputPin, OutputPin}; use stm32f1xx_hal::{gpio::State, pac, prelude::*, timer::Timer}; #[entry] @@ -36,18 +36,18 @@ fn main() -> ! { // Wait for the timer to trigger an update and change the state of the LED loop { - block!(timer.wait()).unwrap(); - hprintln!("{}", pin.is_high().unwrap()).unwrap(); + block!(timer.try_wait()).unwrap(); + hprintln!("{}", pin.try_is_high().unwrap()).unwrap(); pin.as_push_pull_output(&mut gpioc.crh, |out| { - out.set_high().unwrap(); - block!(timer.wait()).unwrap(); - out.set_low().unwrap(); - block!(timer.wait()).unwrap(); + out.try_set_high().unwrap(); + block!(timer.try_wait()).unwrap(); + out.try_set_low().unwrap(); + block!(timer.try_wait()).unwrap(); }); pin.as_push_pull_output_with_state(&mut gpioc.crh, State::High, |out| { - block!(timer.wait()).unwrap(); - out.set_low().unwrap(); - block!(timer.wait()).unwrap(); + block!(timer.try_wait()).unwrap(); + out.try_set_low().unwrap(); + block!(timer.try_wait()).unwrap(); }); } } diff --git a/examples/nojtag.rs b/examples/nojtag.rs index 2342411f..7b04d758 100644 --- a/examples/nojtag.rs +++ b/examples/nojtag.rs @@ -25,9 +25,9 @@ fn main() -> ! { let mut pb4 = pb4.into_push_pull_output(&mut gpiob.crl); loop { - pa15.toggle().unwrap(); - pb3.toggle().unwrap(); - pb4.toggle().unwrap(); + pa15.try_toggle().unwrap(); + pb3.try_toggle().unwrap(); + pb4.try_toggle().unwrap(); cortex_m::asm::delay(8_000_000); } } diff --git a/examples/pwm.rs b/examples/pwm.rs index 16090885..cdaeaf8f 100644 --- a/examples/pwm.rs +++ b/examples/pwm.rs @@ -57,39 +57,39 @@ fn main() -> ! { ); // Enable clock on each of the channels - pwm.enable(Channel::C1); - pwm.enable(Channel::C2); - pwm.enable(Channel::C3); + let _ = pwm.try_enable(Channel::C1); + let _ = pwm.try_enable(Channel::C2); + let _ = pwm.try_enable(Channel::C3); //// Operations affecting all defined channels on the Timer // Adjust period to 0.5 seconds - pwm.set_period(500.ms()); + pwm.try_set_period(500.ms()).unwrap(); asm::bkpt(); // Return to the original frequency - pwm.set_period(1.khz()); + pwm.try_set_period(1.khz()).unwrap(); asm::bkpt(); - let max = pwm.get_max_duty(); + let max = pwm.try_get_max_duty().unwrap(); //// Operations affecting single channels can be accessed through //// the Pwm object or via dereferencing to the pin. // Use the Pwm object to set C3 to full strength - pwm.set_duty(Channel::C3, max); + pwm.try_set_duty(Channel::C3, max).unwrap(); asm::bkpt(); // Use the Pwm object to set C3 to be dim - pwm.set_duty(Channel::C3, max / 4); + pwm.try_set_duty(Channel::C3, max / 4).unwrap(); asm::bkpt(); // Use the Pwm object to set C3 to be zero - pwm.set_duty(Channel::C3, 0); + pwm.try_set_duty(Channel::C3, 0).unwrap(); asm::bkpt(); @@ -97,17 +97,17 @@ fn main() -> ! { let mut pwm_channel = pwm.split().2; // Use the PwmChannel object to set C3 to be full strength - pwm_channel.set_duty(max); + pwm_channel.try_set_duty(max).unwrap(); asm::bkpt(); // Use the PwmChannel object to set C3 to be dim - pwm_channel.set_duty(max / 4); + pwm_channel.try_set_duty(max / 4).unwrap(); asm::bkpt(); // Use the PwmChannel object to set C3 to be zero - pwm_channel.set_duty(0); + pwm_channel.try_set_duty(0).unwrap(); asm::bkpt(); diff --git a/examples/pwm_custom.rs b/examples/pwm_custom.rs index d48f058b..cb4c8387 100644 --- a/examples/pwm_custom.rs +++ b/examples/pwm_custom.rs @@ -31,28 +31,28 @@ fn main() -> ! { let pwm = Timer::tim3(p.TIM3, &clocks, &mut rcc.apb1).pwm((p0, p1), &mut afio.mapr, 1.khz()); - let max = pwm.get_max_duty(); + let max = pwm.try_get_max_duty().unwrap(); let mut pwm_channels = pwm.split(); // Enable the individual channels - pwm_channels.0.enable(); - pwm_channels.1.enable(); + pwm_channels.0.try_enable().unwrap(); + pwm_channels.1.try_enable().unwrap(); // full - pwm_channels.0.set_duty(max); - pwm_channels.1.set_duty(max); + pwm_channels.0.try_set_duty(max).unwrap(); + pwm_channels.1.try_set_duty(max).unwrap(); asm::bkpt(); // dim - pwm_channels.1.set_duty(max / 4); + pwm_channels.1.try_set_duty(max / 4).unwrap(); asm::bkpt(); // zero - pwm_channels.0.set_duty(0); - pwm_channels.1.set_duty(0); + pwm_channels.0.try_set_duty(0).unwrap(); + pwm_channels.1.try_set_duty(0).unwrap(); asm::bkpt(); diff --git a/examples/qei.rs b/examples/qei.rs index 8a4fce8a..3d090f97 100644 --- a/examples/qei.rs +++ b/examples/qei.rs @@ -46,9 +46,9 @@ fn main() -> ! { let mut delay = Delay::new(cp.SYST, clocks); loop { - let before = qei.count(); - delay.delay_ms(1_000_u16); - let after = qei.count(); + let before = qei.try_count().unwrap(); + delay.try_delay_ms(1_000_u16).unwrap(); + let after = qei.try_count().unwrap(); let elapsed = after.wrapping_sub(before) as i16; diff --git a/examples/serial.rs b/examples/serial.rs index c4944baf..1d21c712 100644 --- a/examples/serial.rs +++ b/examples/serial.rs @@ -70,10 +70,10 @@ fn main() -> ! { // Loopback test. Write `X` and wait until the write is successful. let sent = b'X'; - block!(serial.write(sent)).ok(); + block!(serial.try_write(sent)).ok(); // Read the byte that was just sent. Blocks until the read is complete - let received = block!(serial.read()).unwrap(); + let received = block!(serial.try_read()).unwrap(); // Since we have connected tx and rx, the byte we sent should be the one we received assert_eq!(received, sent); @@ -84,8 +84,8 @@ fn main() -> ! { // You can also split the serial struct into a receiving and a transmitting part let (mut tx, mut rx) = serial.split(); let sent = b'Y'; - block!(tx.write(sent)).ok(); - let received = block!(rx.read()).unwrap(); + block!(tx.try_write(sent)).ok(); + let received = block!(rx.try_read()).unwrap(); assert_eq!(received, sent); asm::bkpt(); diff --git a/examples/serial_config.rs b/examples/serial_config.rs index 27ae3417..58a8af09 100644 --- a/examples/serial_config.rs +++ b/examples/serial_config.rs @@ -73,8 +73,8 @@ fn main() -> ! { let (mut tx, _rx) = serial.split(); let sent = b'U'; - block!(tx.write(sent)).ok(); - block!(tx.write(sent)).ok(); + block!(tx.try_write(sent)).ok(); + block!(tx.try_write(sent)).ok(); loop {} } diff --git a/examples/timer-interrupt-rtfm.rs b/examples/timer-interrupt-rtfm.rs index d4a9892e..1b087795 100644 --- a/examples/timer-interrupt-rtfm.rs +++ b/examples/timer-interrupt-rtfm.rs @@ -13,7 +13,7 @@ use panic_halt as _; use rtfm::app; -use embedded_hal::digital::v2::OutputPin; +use embedded_hal::digital::OutputPin; use stm32f1xx_hal::{ gpio::{gpioc::PC13, Output, PushPull, State}, pac, @@ -85,19 +85,19 @@ const APP: () = { if *cx.resources.led_state { // Uses resources managed by rtfm to turn led off (on bluepill) - cx.resources.led.set_high().unwrap(); + cx.resources.led.try_set_high().unwrap(); *cx.resources.led_state = false; } else { - cx.resources.led.set_low().unwrap(); + cx.resources.led.try_set_low().unwrap(); *cx.resources.led_state = true; } *COUNT += 1; if *COUNT == 4 { // Changes timer update frequency - cx.resources.timer_handler.start(2.hz()); + let _ = cx.resources.timer_handler.try_start(2.hz()); } else if *COUNT == 12 { - cx.resources.timer_handler.start(1.hz()); + let _ = cx.resources.timer_handler.try_start(1.hz()); *COUNT = 0; } diff --git a/src/adc.rs b/src/adc.rs index a0f3384a..f2e8a3c3 100644 --- a/src/adc.rs +++ b/src/adc.rs @@ -1,5 +1,6 @@ //! # API for the Analog to Digital converter +use core::convert::Infallible; use core::marker::PhantomData; use embedded_hal::adc::{Channel, OneShot}; @@ -108,7 +109,7 @@ macro_rules! adc_pins { impl Channel<$ADC> for $pin { type ID = u8; - fn channel() -> u8 { $chan } + fn channel(&self) -> u8 { $chan } } )+ }; @@ -424,10 +425,10 @@ macro_rules! adc_hal { WORD: From, PIN: Channel<$ADC, ID = u8>, { - type Error = (); + type Error = Infallible; - fn read(&mut self, _pin: &mut PIN) -> nb::Result { - let res = self.convert(PIN::channel()); + fn try_read(&mut self, pin: &mut PIN) -> nb::Result { + let res = self.convert(PIN::channel(pin)); Ok(res.into()) } } @@ -616,10 +617,10 @@ impl Adc { { self.rb.cr1.modify(|_, w| w.discen().clear_bit()); self.rb.cr2.modify(|_, w| w.align().bit(self.align.into())); - self.set_channel_sample_time(PIN::channel(), self.sample_time); + self.set_channel_sample_time(PIN::channel(&pins), self.sample_time); self.rb .sqr3 - .modify(|_, w| unsafe { w.sq1().bits(PIN::channel()) }); + .modify(|_, w| unsafe { w.sq1().bits(PIN::channel(&pins)) }); self.rb.cr2.modify(|_, w| w.dma().set_bit()); let payload = AdcPayload { diff --git a/src/delay.rs b/src/delay.rs index b01163de..59624151 100644 --- a/src/delay.rs +++ b/src/delay.rs @@ -1,6 +1,7 @@ //! # Delays use cast::u32; +use core::convert::Infallible; use cortex_m::peripheral::syst::SystClkSource; use cortex_m::peripheral::SYST; @@ -28,25 +29,29 @@ impl Delay { } impl DelayMs for Delay { - fn delay_ms(&mut self, ms: u32) { - self.delay_us(ms * 1_000); + type Error = Infallible; + fn try_delay_ms(&mut self, ms: u32) -> Result<(), Self::Error> { + self.try_delay_us(ms * 1_000) } } impl DelayMs for Delay { - fn delay_ms(&mut self, ms: u16) { - self.delay_ms(u32(ms)); + type Error = Infallible; + fn try_delay_ms(&mut self, ms: u16) -> Result<(), Self::Error> { + self.try_delay_ms(u32(ms)) } } impl DelayMs for Delay { - fn delay_ms(&mut self, ms: u8) { - self.delay_ms(u32(ms)); + type Error = Infallible; + fn try_delay_ms(&mut self, ms: u8) -> Result<(), Self::Error> { + self.try_delay_ms(u32(ms)) } } impl DelayUs for Delay { - fn delay_us(&mut self, us: u32) { + type Error = Infallible; + fn try_delay_us(&mut self, us: u32) -> Result<(), Self::Error> { // The SysTick Reload Value register supports values between 1 and 0x00FFFFFF. const MAX_RVR: u32 = 0x00FF_FFFF; @@ -70,17 +75,20 @@ impl DelayUs for Delay { self.syst.disable_counter(); } + Ok(()) } } impl DelayUs for Delay { - fn delay_us(&mut self, us: u16) { - self.delay_us(u32(us)) + type Error = Infallible; + fn try_delay_us(&mut self, us: u16) -> Result<(), Self::Error> { + self.try_delay_us(u32(us)) } } impl DelayUs for Delay { - fn delay_us(&mut self, us: u8) { - self.delay_us(u32(us)) + type Error = Infallible; + fn try_delay_us(&mut self, us: u8) -> Result<(), Self::Error> { + self.try_delay_us(u32(us)) } } diff --git a/src/gpio.rs b/src/gpio.rs index 918330eb..8b898eeb 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -18,7 +18,7 @@ //! //! ```rust //! let output = gpioa.pa5.into_push_pull_output(&mut gpioa.crl); -//! output.set_high(); +//! output.try_set_high(); //! ``` //! //! Each GPIO pin can be set to various modes: @@ -245,7 +245,7 @@ macro_rules! gpio { use core::convert::Infallible; use core::marker::PhantomData; - use crate::hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin, toggleable}; + use crate::hal::digital::{InputPin, OutputPin, StatefulOutputPin, toggleable}; use crate::pac::{$gpioy, $GPIOX}; use crate::pac::EXTI; use crate::afio; @@ -340,12 +340,12 @@ macro_rules! gpio { impl OutputPin for Generic> { type Error = Infallible; - fn set_high(&mut self) -> Result<(), Self::Error> { + fn try_set_high(&mut self) -> Result<(), Self::Error> { // NOTE(unsafe) atomic write to a stateless register Ok(unsafe { (*$GPIOX::ptr()).bsrr.write(|w| w.bits(1 << self.i)) }) } - fn set_low(&mut self) -> Result<(), Self::Error> { + fn try_set_low(&mut self) -> Result<(), Self::Error> { // NOTE(unsafe) atomic write to a stateless register Ok(unsafe { (*$GPIOX::ptr()).bsrr.write(|w| w.bits(1 << (16 + self.i))) }) } @@ -353,11 +353,11 @@ macro_rules! gpio { impl InputPin for Generic> { type Error = Infallible; - fn is_high(&self) -> Result { - self.is_low().map(|b| !b) + fn try_is_high(&self) -> Result { + self.try_is_low().map(|b| !b) } - fn is_low(&self) -> Result { + fn try_is_low(&self) -> Result { // NOTE(unsafe) atomic read with no side effects Ok(unsafe { (*$GPIOX::ptr()).idr.read().bits() & (1 << self.i) == 0 }) } @@ -432,11 +432,11 @@ macro_rules! gpio { } impl StatefulOutputPin for Generic> { - fn is_set_high(&self) -> Result { - self.is_set_low().map(|b| !b) + fn try_is_set_high(&self) -> Result { + self.try_is_set_low().map(|b| !b) } - fn is_set_low(&self) -> Result { + fn try_is_set_low(&self) -> Result { // NOTE(unsafe) atomic read with no side effects Ok(unsafe { (*$GPIOX::ptr()).odr.read().bits() & (1 << self.i) == 0 }) } @@ -446,11 +446,11 @@ macro_rules! gpio { impl InputPin for Generic> { type Error = Infallible; - fn is_high(&self) -> Result { - self.is_low().map(|b| !b) + fn try_is_high(&self) -> Result { + self.try_is_low().map(|b| !b) } - fn is_low(&self) -> Result { + fn try_is_low(&self) -> Result { // NOTE(unsafe) atomic read with no side effects Ok(unsafe { (*$GPIOX::ptr()).idr.read().bits() & (1 << self.i) == 0 }) } @@ -749,13 +749,13 @@ macro_rules! gpio { impl OutputPin for $PXi> { type Error = Infallible; #[inline] - fn set_high(&mut self) -> Result<(), Self::Error> { + fn try_set_high(&mut self) -> Result<(), Self::Error> { // NOTE(unsafe) atomic write to a stateless register Ok(self.set_state(State::High)) } #[inline] - fn set_low(&mut self) -> Result<(), Self::Error> { + fn try_set_low(&mut self) -> Result<(), Self::Error> { // NOTE(unsafe) atomic write to a stateless register Ok(self.set_state(State::Low)) } @@ -763,13 +763,13 @@ macro_rules! gpio { impl StatefulOutputPin for $PXi> { #[inline] - fn is_set_high(&self) -> Result { - self.is_set_low().map(|b| !b) + fn try_is_set_high(&self) -> Result { + self.try_is_set_low().map(|b| !b) } #[inline] - fn is_set_low(&self) -> Result { - Ok(self._is_set_low()) + fn try_is_set_low(&self) -> Result { + Ok(self._try_is_set_low()) } } @@ -798,27 +798,27 @@ macro_rules! gpio { impl InputPin for $PXi> { type Error = Infallible; #[inline] - fn is_high(&self) -> Result { - self.is_low().map(|b| !b) + fn try_is_high(&self) -> Result { + self.try_is_low().map(|b| !b) } #[inline] - fn is_low(&self) -> Result { + fn try_is_low(&self) -> Result { // NOTE(unsafe) atomic read with no side effects - Ok(self._is_low()) + Ok(self._try_is_low()) } } impl InputPin for $PXi> { type Error = Infallible; #[inline] - fn is_high(&self) -> Result { - self.is_low().map(|b| !b) + fn try_is_high(&self) -> Result { + self.try_is_low().map(|b| !b) } #[inline] - fn is_low(&self) -> Result { - Ok(self._is_low()) + fn try_is_low(&self) -> Result { + Ok(self._try_is_low()) } } @@ -860,7 +860,7 @@ macro_rules! gpio { impl OutputPin for $PXi { type Error = PinModeError; - fn set_high(&mut self) -> Result<(), Self::Error> { + fn try_set_high(&mut self) -> Result<(), Self::Error> { if self.mode.is_output() { self.set_state(State::High); Ok(()) @@ -869,7 +869,7 @@ macro_rules! gpio { Err(PinModeError::IncorrectMode) } } - fn set_low(&mut self) -> Result<(), Self::Error> { + fn try_set_low(&mut self) -> Result<(), Self::Error> { if self.mode.is_output() { self.set_state(State::Low); Ok(()) @@ -882,12 +882,12 @@ macro_rules! gpio { impl InputPin for $PXi { type Error = PinModeError; - fn is_high(&self) -> Result { - self.is_low().map(|b| !b) + fn try_is_high(&self) -> Result { + self.try_is_low().map(|b| !b) } - fn is_low(&self) -> Result { + fn try_is_low(&self) -> Result { if self.mode.is_input() { - Ok(self._is_low()) + Ok(self._try_is_low()) } else { Err(PinModeError::IncorrectMode) @@ -976,11 +976,11 @@ macro_rules! gpio { } } - fn _is_set_low(&self) -> bool { + fn _try_is_set_low(&self) -> bool { unsafe { (*$GPIOX::ptr()).odr.read().bits() & (1 << $i) == 0 } } - fn _is_low(&self) -> bool { + fn _try_is_low(&self) -> bool { // NOTE(unsafe) atomic read with no side effects unsafe { (*$GPIOX::ptr()).idr.read().bits() & (1 << $i) == 0 } } @@ -1120,7 +1120,7 @@ macro_rules! gpio { macro_rules! impl_pxx { ($(($port:ident :: $pin:ident)),*) => { - use embedded_hal::digital::v2::{InputPin, StatefulOutputPin, OutputPin}; + use embedded_hal::digital::{InputPin, StatefulOutputPin, OutputPin}; use core::convert::Infallible; pub enum Pxx { @@ -1131,59 +1131,59 @@ macro_rules! impl_pxx { impl OutputPin for Pxx> { type Error = Infallible; - fn set_high(&mut self) -> Result<(), Infallible> { + fn try_set_high(&mut self) -> Result<(), Infallible> { match self { - $(Pxx::$pin(pin) => pin.set_high()),* + $(Pxx::$pin(pin) => pin.try_set_high()),* } } - fn set_low(&mut self) -> Result<(), Infallible> { + fn try_set_low(&mut self) -> Result<(), Infallible> { match self { - $(Pxx::$pin(pin) => pin.set_low()),* + $(Pxx::$pin(pin) => pin.try_set_low()),* } } } impl StatefulOutputPin for Pxx> { - fn is_set_high(&self) -> Result { + fn try_is_set_high(&self) -> Result { match self { - $(Pxx::$pin(pin) => pin.is_set_high()),* + $(Pxx::$pin(pin) => pin.try_is_set_high()),* } } - fn is_set_low(&self) -> Result { + fn try_is_set_low(&self) -> Result { match self { - $(Pxx::$pin(pin) => pin.is_set_low()),* + $(Pxx::$pin(pin) => pin.try_is_set_low()),* } } } impl InputPin for Pxx> { type Error = Infallible; - fn is_high(&self) -> Result { + fn try_is_high(&self) -> Result { match self { - $(Pxx::$pin(pin) => pin.is_high()),* + $(Pxx::$pin(pin) => pin.try_is_high()),* } } - fn is_low(&self) -> Result { + fn try_is_low(&self) -> Result { match self { - $(Pxx::$pin(pin) => pin.is_low()),* + $(Pxx::$pin(pin) => pin.try_is_low()),* } } } impl InputPin for Pxx> { type Error = Infallible; - fn is_high(&self) -> Result { + fn try_is_high(&self) -> Result { match self { - $(Pxx::$pin(pin) => pin.is_high()),* + $(Pxx::$pin(pin) => pin.try_is_high()),* } } - fn is_low(&self) -> Result { + fn try_is_low(&self) -> Result { match self { - $(Pxx::$pin(pin) => pin.is_low()),* + $(Pxx::$pin(pin) => pin.try_is_low()),* } } } diff --git a/src/i2c.rs b/src/i2c.rs index ca835710..663f6014 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -479,7 +479,7 @@ where { type Error = NbError; - fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error> { + fn try_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error> { self.write_without_stop(addr, bytes)?; self.nb.send_stop(); busy_wait_cycles!(self.nb.wait_for_stop(), self.data_timeout)?; @@ -494,7 +494,7 @@ where { type Error = NbError; - fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { + fn try_read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { self.send_start_and_wait()?; self.send_addr_and_wait(addr, true)?; @@ -566,13 +566,18 @@ where { type Error = NbError; - fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Self::Error> { + fn try_write_read( + &mut self, + addr: u8, + bytes: &[u8], + buffer: &mut [u8], + ) -> Result<(), Self::Error> { if !bytes.is_empty() { self.write_without_stop(addr, bytes)?; } if !buffer.is_empty() { - self.read(addr, buffer)?; + self.try_read(addr, buffer)?; } else if !bytes.is_empty() { self.nb.send_stop(); busy_wait_cycles!(self.nb.wait_for_stop(), self.data_timeout)?; diff --git a/src/prelude.rs b/src/prelude.rs index ff349473..607843bc 100644 --- a/src/prelude.rs +++ b/src/prelude.rs @@ -8,8 +8,8 @@ pub use crate::dma::WriteDma as _stm32_hal_dma_WriteDma; pub use crate::flash::FlashExt as _stm32_hal_flash_FlashExt; pub use crate::gpio::GpioExt as _stm32_hal_gpio_GpioExt; pub use crate::hal::adc::OneShot as _embedded_hal_adc_OneShot; -pub use crate::hal::digital::v2::StatefulOutputPin as _embedded_hal_digital_StatefulOutputPin; -pub use crate::hal::digital::v2::ToggleableOutputPin as _embedded_hal_digital_ToggleableOutputPin; +pub use crate::hal::digital::StatefulOutputPin as _embedded_hal_digital_StatefulOutputPin; +pub use crate::hal::digital::ToggleableOutputPin as _embedded_hal_digital_ToggleableOutputPin; pub use crate::hal::prelude::*; pub use crate::rcc::RccExt as _stm32_hal_rcc_RccExt; pub use crate::time::U32Ext as _stm32_hal_time_U32Ext; diff --git a/src/pwm.rs b/src/pwm.rs index 53529242..5658adf9 100644 --- a/src/pwm.rs +++ b/src/pwm.rs @@ -53,6 +53,7 @@ ``` */ +use core::convert::Infallible; use core::marker::Copy; use core::marker::PhantomData; use core::mem; @@ -308,7 +309,7 @@ macro_rules! hal { } /* - The following implemention of the embedded_hal::Pwm uses Hertz as a time type. This was choosen + The following implemention of the embedded_hal::pwm::Pwm uses Hertz as a time type. This was choosen because of the timescales of operations being on the order of nanoseconds and not being able to efficently represent a float on the hardware. It might be possible to change the time type to a different time based using such as the nanosecond. The issue with doing so is that the max @@ -320,64 +321,69 @@ macro_rules! hal { defined for several base time units. This will allow for calling the set_period method with something that is natural to both the MCU and the end user. */ - impl hal::Pwm for Pwm<$TIMX, REMAP, P, PINS> where + impl hal::pwm::Pwm for Pwm<$TIMX, REMAP, P, PINS> where REMAP: Remap, PINS: Pins, { type Channel = Channel; type Duty = u16; + type Error = Infallible; type Time = Hertz; - fn enable(&mut self, channel: Self::Channel) { + fn try_enable(&mut self, channel: Self::Channel) -> Result<(), Self::Error> { match PINS::check_used(channel) { Channel::C1 => unsafe { bb::set(&(*$TIMX::ptr()).ccer, 0) }, Channel::C2 => unsafe { bb::set(&(*$TIMX::ptr()).ccer, 4) }, Channel::C3 => unsafe { bb::set(&(*$TIMX::ptr()).ccer, 8) }, Channel::C4 => unsafe { bb::set(&(*$TIMX::ptr()).ccer, 12) } } + Ok(()) } - fn disable(&mut self, channel: Self::Channel) { + fn try_disable(&mut self, channel: Self::Channel) -> Result<(), Self::Error> { match PINS::check_used(channel) { Channel::C1 => unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 0) }, Channel::C2 => unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 4) }, Channel::C3 => unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 8) }, Channel::C4 => unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 12) }, } + Ok(()) } - fn get_duty(&self, channel: Self::Channel) -> Self::Duty { - match PINS::check_used(channel) { + fn try_get_duty(&self, channel: Self::Channel) -> Result { + let duty = match PINS::check_used(channel) { Channel::C1 => unsafe { (*$TIMX::ptr()).ccr1.read().ccr().bits() }, Channel::C2 => unsafe { (*$TIMX::ptr()).ccr2.read().ccr().bits() }, Channel::C3 => unsafe { (*$TIMX::ptr()).ccr3.read().ccr().bits() }, Channel::C4 => unsafe { (*$TIMX::ptr()).ccr4.read().ccr().bits() }, - } + }; + Ok(duty) } - fn set_duty(&mut self, channel: Self::Channel, duty: Self::Duty) { + fn try_set_duty(&mut self, channel: Self::Channel, duty: Self::Duty) -> Result<(), Self::Error> { match PINS::check_used(channel) { Channel::C1 => unsafe { (*$TIMX::ptr()).ccr1.write(|w| w.ccr().bits(duty)) }, Channel::C2 => unsafe { (*$TIMX::ptr()).ccr2.write(|w| w.ccr().bits(duty)) }, Channel::C3 => unsafe { (*$TIMX::ptr()).ccr3.write(|w| w.ccr().bits(duty)) }, Channel::C4 => unsafe { (*$TIMX::ptr()).ccr4.write(|w| w.ccr().bits(duty)) }, - } + }; + Ok(()) } - fn get_max_duty(&self) -> Self::Duty { - unsafe { (*$TIMX::ptr()).arr.read().arr().bits() } + fn try_get_max_duty(&self) -> Result { + Ok(unsafe { (*$TIMX::ptr()).arr.read().arr().bits() }) } - fn get_period(&self) -> Self::Time { + fn try_get_period(&self) -> Result { let clk = self.clk; let psc: u16 = unsafe{(*$TIMX::ptr()).psc.read().psc().bits()}; let arr: u16 = unsafe{(*$TIMX::ptr()).arr.read().arr().bits()}; // Length in ms of an internal clock pulse - (clk.0 / u32(psc * arr)).hz() + Ok((clk.0 / u32(psc * arr)).hz()) } - fn set_period(&mut self, period: T) where + fn try_set_period(&mut self, period: T) -> Result<(), Self::Error> where T: Into { let clk = self.clk; @@ -387,103 +393,120 @@ macro_rules! hal { unsafe { (*$TIMX::ptr()).psc.write(|w| w.psc().bits(psc)); (*$TIMX::ptr()).arr.write(|w| w.arr().bits(arr)); - } + }; + Ok(()) } } - impl hal::PwmPin for PwmChannel<$TIMX, C1> { + impl hal::pwm::PwmPin for PwmChannel<$TIMX, C1> { + type Error = Infallible; type Duty = u16; - fn disable(&mut self) { + fn try_disable(&mut self) -> Result<(), Self::Error>{ unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 0) } + Ok(()) } - fn enable(&mut self) { + fn try_enable(&mut self) -> Result<(), Self::Error>{ unsafe { bb::set(&(*$TIMX::ptr()).ccer, 0) } + Ok(()) } - fn get_duty(&self) -> u16 { - unsafe { (*$TIMX::ptr()).ccr1.read().ccr().bits() } + fn try_get_duty(&self) -> Result { + Ok(unsafe { (*$TIMX::ptr()).ccr1.read().ccr().bits() }) } - fn get_max_duty(&self) -> u16 { - unsafe { (*$TIMX::ptr()).arr.read().arr().bits() } + fn try_get_max_duty(&self) -> Result { + Ok(unsafe { (*$TIMX::ptr()).arr.read().arr().bits() }) } - fn set_duty(&mut self, duty: u16) { + fn try_set_duty(&mut self, duty: u16) -> Result<(), Self::Error> { unsafe { (*$TIMX::ptr()).ccr1.write(|w| w.ccr().bits(duty)) } + Ok(()) } } - impl hal::PwmPin for PwmChannel<$TIMX, C2> { + impl hal::pwm::PwmPin for PwmChannel<$TIMX, C2> { + type Error = Infallible; type Duty = u16; - fn disable(&mut self) { + fn try_disable(&mut self) -> Result<(), Self::Error>{ unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 4) } + Ok(()) } - fn enable(&mut self) { + fn try_enable(&mut self) -> Result<(), Self::Error>{ unsafe { bb::set(&(*$TIMX::ptr()).ccer, 4) } + Ok(()) } - fn get_duty(&self) -> u16 { - unsafe { (*$TIMX::ptr()).ccr2.read().ccr().bits() } + fn try_get_duty(&self) -> Result { + Ok(unsafe { (*$TIMX::ptr()).ccr2.read().ccr().bits() }) } - fn get_max_duty(&self) -> u16 { - unsafe { (*$TIMX::ptr()).arr.read().arr().bits() } + fn try_get_max_duty(&self) -> Result { + Ok(unsafe { (*$TIMX::ptr()).arr.read().arr().bits() }) } - fn set_duty(&mut self, duty: u16) { + fn try_set_duty(&mut self, duty: u16) -> Result<(), Self::Error>{ unsafe { (*$TIMX::ptr()).ccr2.write(|w| w.ccr().bits(duty)) } + Ok(()) } } - impl hal::PwmPin for PwmChannel<$TIMX, C3> { + impl hal::pwm::PwmPin for PwmChannel<$TIMX, C3> { + type Error = Infallible; type Duty = u16; - fn disable(&mut self) { + fn try_disable(&mut self) -> Result<(), Self::Error>{ unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 8) } + Ok(()) } - fn enable(&mut self) { + fn try_enable(&mut self) -> Result<(), Self::Error>{ unsafe { bb::set(&(*$TIMX::ptr()).ccer, 8) } + Ok(()) } - fn get_duty(&self) -> u16 { - unsafe { (*$TIMX::ptr()).ccr3.read().ccr().bits() } + fn try_get_duty(&self) -> Result { + Ok(unsafe { (*$TIMX::ptr()).ccr3.read().ccr().bits() }) } - fn get_max_duty(&self) -> u16 { - unsafe { (*$TIMX::ptr()).arr.read().arr().bits() } + fn try_get_max_duty(&self) -> Result { + Ok(unsafe { (*$TIMX::ptr()).arr.read().arr().bits() }) } - fn set_duty(&mut self, duty: u16) { + fn try_set_duty(&mut self, duty: u16) -> Result<(), Self::Error>{ unsafe { (*$TIMX::ptr()).ccr3.write(|w| w.ccr().bits(duty)) } + Ok(()) } } - impl hal::PwmPin for PwmChannel<$TIMX, C4> { + impl hal::pwm::PwmPin for PwmChannel<$TIMX, C4> { type Duty = u16; + type Error = Infallible; - fn disable(&mut self) { + fn try_disable(&mut self) -> Result<(), Self::Error> { unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 12) } + Ok(()) } - fn enable(&mut self) { + fn try_enable(&mut self) -> Result<(), Self::Error> { unsafe { bb::set(&(*$TIMX::ptr()).ccer, 12) } + Ok(()) } - fn get_duty(&self) -> u16 { - unsafe { (*$TIMX::ptr()).ccr4.read().ccr().bits() } + fn try_get_duty(&self) -> Result { + Ok(unsafe { (*$TIMX::ptr()).ccr4.read().ccr().bits() }) } - fn get_max_duty(&self) -> u16 { - unsafe { (*$TIMX::ptr()).arr.read().arr().bits() } + fn try_get_max_duty(&self) -> Result { + Ok(unsafe { (*$TIMX::ptr()).arr.read().arr().bits() }) } - fn set_duty(&mut self, duty: u16) { + fn try_set_duty(&mut self, duty: u16) -> Result<(), Self::Error> { unsafe { (*$TIMX::ptr()).ccr4.write(|w| w.ccr().bits(duty)) } + Ok(()) } } )+ diff --git a/src/qei.rs b/src/qei.rs index 86ba49f3..c7267fb5 100644 --- a/src/qei.rs +++ b/src/qei.rs @@ -1,3 +1,5 @@ +use core::convert::Infallible; +use core::marker::PhantomData; /** # Quadrature Encoder Interface @@ -6,9 +8,8 @@ */ use core::u16; -use core::marker::PhantomData; - -use crate::hal::{self, Direction}; +use crate::hal; +use crate::hal::qei::Direction; #[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))] use crate::pac::TIM1; #[cfg(feature = "medium")] @@ -179,18 +180,19 @@ macro_rules! hal { } } - impl hal::Qei for Qei<$TIMX, REMAP, PINS> { + impl hal::qei::Qei for Qei<$TIMX, REMAP, PINS> { + type Error = Infallible; type Count = u16; - fn count(&self) -> u16 { - self.tim.cnt.read().cnt().bits() + fn try_count(&self) -> Result { + Ok(self.tim.cnt.read().cnt().bits()) } - fn direction(&self) -> Direction { + fn try_direction(&self) -> Result { if self.tim.cr1.read().dir().bit_is_clear() { - hal::Direction::Upcounting + Ok(Direction::Upcounting) } else { - hal::Direction::Downcounting + Ok(Direction::Downcounting) } } } diff --git a/src/serial.rs b/src/serial.rs index 31c16365..3a9d6632 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -416,7 +416,7 @@ macro_rules! hal { impl crate::hal::serial::Read for Rx<$USARTX> { type Error = Error; - fn read(&mut self) -> nb::Result { + fn try_read(&mut self) -> nb::Result { unsafe { &*$USARTX::ptr() }.read() } } @@ -424,10 +424,10 @@ macro_rules! hal { impl crate::hal::serial::Write for Tx<$USARTX> { type Error = Infallible; - fn flush(&mut self) -> nb::Result<(), Self::Error> { + fn try_flush(&mut self) -> nb::Result<(), Self::Error> { unsafe { &*$USARTX::ptr() }.flush() } - fn write(&mut self, byte: u8) -> nb::Result<(), Self::Error> { + fn try_write(&mut self, byte: u8) -> nb::Result<(), Self::Error> { unsafe { &*$USARTX::ptr() }.write(byte) } } @@ -435,7 +435,7 @@ macro_rules! hal { impl crate::hal::serial::Read for Serial<$USARTX, PINS> { type Error = Error; - fn read(&mut self) -> nb::Result { + fn try_read(&mut self) -> nb::Result { self.usart.deref().read() } } @@ -443,11 +443,11 @@ macro_rules! hal { impl crate::hal::serial::Write for Serial<$USARTX, PINS> { type Error = Infallible; - fn flush(&mut self) -> nb::Result<(), Self::Error> { + fn try_flush(&mut self) -> nb::Result<(), Self::Error> { self.usart.deref().flush() } - fn write(&mut self, byte: u8) -> nb::Result<(), Self::Error> { + fn try_write(&mut self, byte: u8) -> nb::Result<(), Self::Error> { self.usart.deref().write(byte) } } @@ -463,7 +463,7 @@ where fn write_str(&mut self, s: &str) -> core::fmt::Result { s.as_bytes() .iter() - .try_for_each(|c| nb::block!(self.write(*c))) + .try_for_each(|c| nb::block!(self.try_write(*c))) .map_err(|_| core::fmt::Error) } } diff --git a/src/spi.rs b/src/spi.rs index 2fa14cca..addc30d9 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -444,7 +444,7 @@ where { type Error = Error; - fn read(&mut self) -> nb::Result { + fn try_read(&mut self) -> nb::Result { let sr = self.spi.sr.read(); Err(if sr.ovr().bit_is_set() { @@ -462,7 +462,7 @@ where }) } - fn send(&mut self, data: FrameSize) -> nb::Result<(), Error> { + fn try_send(&mut self, data: FrameSize) -> nb::Result<(), Error> { let sr = self.spi.sr.read(); Err(if sr.ovr().bit_is_set() { @@ -499,7 +499,7 @@ where // of RM0008 Rev 20. This is more than twice as fast as the // default Write<> implementation (which reads and drops each // received value) - fn write(&mut self, words: &[u8]) -> Result<(), Error> { + fn try_write(&mut self, words: &[u8]) -> Result<(), Error> { self.spi_write(words) } } @@ -510,7 +510,7 @@ where { type Error = Error; - fn write(&mut self, words: &[u16]) -> Result<(), Error> { + fn try_write(&mut self, words: &[u16]) -> Result<(), Error> { self.spi_write(words) } } diff --git a/src/timer.rs b/src/timer.rs index f93b3dd2..d03904af 100644 --- a/src/timer.rs +++ b/src/timer.rs @@ -73,7 +73,6 @@ use crate::rcc::{sealed::RccBus, Clocks, Enable, GetBusFreq, Reset, APB1}; use cast::{u16, u32, u64}; use cortex_m::peripheral::syst::SystClkSource; use cortex_m::peripheral::SYST; -use void::Void; use crate::time::Hertz; @@ -179,7 +178,7 @@ impl Timer { { let Self { tim, clk } = self; let mut timer = CountDownTimer { tim, clk }; - timer.start(timeout); + timer.try_start(timeout).unwrap(); // infallible timer } @@ -237,9 +236,10 @@ impl CountDownTimer { } impl CountDown for CountDownTimer { + type Error = Error; type Time = Hertz; - fn start(&mut self, timeout: T) + fn try_start(&mut self, timeout: T) -> Result<(), Self::Error> where T: Into, { @@ -250,9 +250,10 @@ impl CountDown for CountDownTimer { self.tim.set_reload(rvr); self.tim.clear_current(); self.tim.enable_counter(); + Ok(()) } - fn wait(&mut self) -> nb::Result<(), Void> { + fn try_wait(&mut self) -> nb::Result<(), Self::Error> { if self.tim.has_wrapped() { Ok(()) } else { @@ -262,9 +263,7 @@ impl CountDown for CountDownTimer { } impl Cancel for CountDownTimer { - type Error = Error; - - fn cancel(&mut self) -> Result<(), Self::Error> { + fn try_cancel(&mut self) -> Result<(), Self::Error> { if !self.tim.is_counter_enabled() { return Err(Self::Error::Canceled); } @@ -296,7 +295,7 @@ macro_rules! hal { { let Self { tim, clk } = self; let mut timer = CountDownTimer { tim, clk }; - timer.start(timeout); + timer.try_start(timeout).unwrap(); // infallible timer } @@ -309,7 +308,7 @@ macro_rules! hal { let Self { tim, clk } = self; let mut timer = CountDownTimer { tim, clk }; timer.tim.cr2.modify(|_,w| w.mms().variant(mode)); - timer.start(timeout); + timer.try_start(timeout).unwrap(); // infallible timer } )? @@ -393,9 +392,10 @@ macro_rules! hal { } impl CountDown for CountDownTimer<$TIMX> { + type Error = Error; type Time = Hertz; - fn start(&mut self, timeout: T) + fn try_start(&mut self, timeout: T) -> Result<(), Self::Error> where T: Into, { @@ -414,9 +414,11 @@ macro_rules! hal { // start counter self.tim.cr1.modify(|_, w| w.cen().set_bit()); + + Ok(()) } - fn wait(&mut self) -> nb::Result<(), Void> { + fn try_wait(&mut self) -> nb::Result<(), Self::Error> { if self.tim.sr.read().uif().bit_is_clear() { Err(nb::Error::WouldBlock) } else { @@ -428,9 +430,7 @@ macro_rules! hal { impl Cancel for CountDownTimer<$TIMX> { - type Error = Error; - - fn cancel(&mut self) -> Result<(), Self::Error> { + fn try_cancel(&mut self) -> Result<(), Self::Error> { let is_counter_enabled = self.tim.cr1.read().cen().is_enabled(); if !is_counter_enabled { return Err(Self::Error::Canceled); diff --git a/src/watchdog.rs b/src/watchdog.rs index f1bf3888..20dfe4a3 100644 --- a/src/watchdog.rs +++ b/src/watchdog.rs @@ -1,10 +1,11 @@ //! Watchdog peripherals use crate::{ - hal::watchdog::{Watchdog, WatchdogEnable}, + hal::watchdog::{Enable as WatchdogEnable, Watchdog}, pac::{DBGMCU as DBG, IWDG}, time::MilliSeconds, }; +use core::convert::Infallible; /// Wraps the Independent Watchdog (IWDG) peripheral pub struct IndependentWatchdog { @@ -89,17 +90,23 @@ impl IndependentWatchdog { } impl WatchdogEnable for IndependentWatchdog { + type Error = Infallible; + type Target = IndependentWatchdog; type Time = MilliSeconds; - fn start>(&mut self, period: T) { + fn try_start>(self, period: T) -> Result { self.setup(period.into().0); self.iwdg.kr.write(|w| unsafe { w.key().bits(KR_START) }); + Ok(self) } } impl Watchdog for IndependentWatchdog { - fn feed(&mut self) { + type Error = Infallible; + + fn try_feed(&mut self) -> Result<(), Self::Error> { self.iwdg.kr.write(|w| unsafe { w.key().bits(KR_RELOAD) }); + Ok(()) } }