diff --git a/Cargo.toml b/Cargo.toml index ee22ce7b..f4be9993 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -39,14 +39,13 @@ sdio-host = { version = "0.6.0", optional = true } embedded-dma = "0.2.0" bare-metal = { version = "1" } void = { default-features = false, version = "1.0.2" } -embedded-hal = { features = ["unproven"], version = "0.2.7" } +embedded-hal = { git = "https://github.com/burrbull/embedded-hal", branch = "outport", features = ["unproven"] } display-interface = { version = "0.4.1", optional = true } fugit = "0.3.5" fugit-timer = "0.1.3" rtic-monotonic = { version = "1.0", optional = true } bitflags = "1.3.2" embedded-storage = "0.2" -hd44780-driver = "0.4.0" [dependencies.time] version = "0.3" @@ -80,6 +79,7 @@ display-interface-spi = "0.4" ist7920 = "0.1.0" smart-leds = "0.3.0" ws2812-spi = { version = "0.4.0", features = [] } +hd44780-driver = { git = "https://github.com/burrbull/hd44780-driver", branch = "outport" } [dev-dependencies.time] version = "0.3" diff --git a/examples/hd44780.rs b/examples/hd44780.rs index 73c3ac2a..79799c75 100644 --- a/examples/hd44780.rs +++ b/examples/hd44780.rs @@ -35,7 +35,7 @@ fn main() -> ! { let d6 = gpiob.pb4.into_push_pull_output(); let d7 = gpiob.pb3.into_push_pull_output(); - let mut lcd = HD44780::new_4bit(rs, en, d4, d5, d6, d7, &mut delay).unwrap(); + let mut lcd = HD44780::new_4bit_port(rs, en, (d4, d5, d6, d7).outport(), &mut delay).unwrap(); lcd.reset(&mut delay).unwrap(); lcd.clear(&mut delay).unwrap(); lcd.set_display_mode( diff --git a/src/gpio/outport.rs b/src/gpio/outport.rs index 6130e42f..338fddf7 100644 --- a/src/gpio/outport.rs +++ b/src/gpio/outport.rs @@ -1,4 +1,5 @@ use super::*; +use embedded_hal::digital::v2::OutputPort; pub trait OutPort { type Target; @@ -6,7 +7,7 @@ pub trait OutPort { } macro_rules! out_port { - ( $name:ident => ( $($i:literal),+ ), ( $($N:ident),+ ), ( $($d:ident),* )) => { + ( $name:ident => $n:literal, ( $($i:literal),+ ), ( $($N:ident),+ ), ( $($d:ident),* )) => { pub struct $name { $(pub $d: Pin>,)+ } @@ -40,13 +41,21 @@ macro_rules! out_port { } } } + + impl OutputPort<$n, u8> for $name

{ + type Error = core::convert::Infallible; + fn write(&mut self, data: u8) -> Result<(), Self::Error> { + self.write_u8(data); + Ok(()) + } + } } } -out_port!(OutPort2 => (0, 1), (N0, N1), (d0, d1)); -out_port!(OutPort3 => (0, 1, 2), (N0, N1, N2), (d0, d1, d2)); -out_port!(OutPort4 => (0, 1, 2, 3), (N0, N1, N2, N3), (d0, d1, d2, d3)); -out_port!(OutPort5 => (0, 1, 2, 3, 4), (N0, N1, N2, N3, N4), (d0, d1, d2, d3, d4)); -out_port!(OutPort6 => (0, 1, 2, 3, 4, 5), (N0, N1, N2, N3, N4, N5), (d0, d1, d2, d3, d4, d5)); -out_port!(OutPort7 => (0, 1, 2, 3, 4, 5, 6), (N0, N1, N2, N3, N4, N5, N6), (d0, d1, d2, d3, d4, d5, d6)); -out_port!(OutPort8 => (0, 1, 2, 3, 4, 5, 6, 7), (N0, N1, N2, N3, N4, N5, N6, N7), (d0, d1, d2, d3, d4, d5, d6, d7)); +out_port!(OutPort2 => 2, (0, 1), (N0, N1), (d0, d1)); +out_port!(OutPort3 => 3, (0, 1, 2), (N0, N1, N2), (d0, d1, d2)); +out_port!(OutPort4 => 4, (0, 1, 2, 3), (N0, N1, N2, N3), (d0, d1, d2, d3)); +out_port!(OutPort5 => 5, (0, 1, 2, 3, 4), (N0, N1, N2, N3, N4), (d0, d1, d2, d3, d4)); +out_port!(OutPort6 => 6, (0, 1, 2, 3, 4, 5), (N0, N1, N2, N3, N4, N5), (d0, d1, d2, d3, d4, d5)); +out_port!(OutPort7 => 7, (0, 1, 2, 3, 4, 5, 6), (N0, N1, N2, N3, N4, N5, N6), (d0, d1, d2, d3, d4, d5, d6)); +out_port!(OutPort8 => 8, (0, 1, 2, 3, 4, 5, 6, 7), (N0, N1, N2, N3, N4, N5, N6, N7), (d0, d1, d2, d3, d4, d5, d6, d7));