From ed43472a6379f8c41606f0d30f35f47045445102 Mon Sep 17 00:00:00 2001
From: randi <randipa99@gmail.com>
Date: Sun, 9 Apr 2023 10:37:22 +1200
Subject: [PATCH 1/3] Added DMA traits for HAL serial types

---
 src/dma/traits.rs | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/src/dma/traits.rs b/src/dma/traits.rs
index bab90956..26ae8fac 100644
--- a/src/dma/traits.rs
+++ b/src/dma/traits.rs
@@ -649,8 +649,11 @@ address!((pac::SPI4, dr, u8),);
 ))]
 dma_map!(
     (Stream0<DMA1>, 4, pac::UART5, PeripheralToMemory), //UART5_RX
+    (Stream0<DMA1>, 4, serial::Rx<pac::UART5>, PeripheralToMemory), //UART5_RX
     (Stream2<DMA1>, 4, pac::UART4, PeripheralToMemory), //UART4_RX
+    (Stream2<DMA1>, 4, serial::Rx<pac::UART4>, PeripheralToMemory), //UART4_RX
     (Stream4<DMA1>, 4, pac::UART4, MemoryToPeripheral), //UART4_TX
+    (Stream4<DMA1>, 4, serial::Tx<pac::UART4>, MemoryToPeripheral), //UART4_TX
     //(Stream6<DMA1>, 7, pac::DAC2, MemoryToPeripheral), //DAC2
 );
 
@@ -864,6 +867,7 @@ address!(
 ))]
 dma_map!(
     (Stream7<DMA1>, 4, pac::UART5, MemoryToPeripheral), //UART5_TX
+    (Stream7<DMA1>, 4, serial::Tx<pac::UART5>, MemoryToPeripheral), //UART5_TX
     (Stream0<DMA2>, 2, pac::ADC3, PeripheralToMemory),  //ADC3
     (Stream1<DMA2>, 1, pac::DCMI, PeripheralToMemory),  //DCMI
     (Stream1<DMA2>, 2, pac::ADC3, PeripheralToMemory),  //ADC3
@@ -935,6 +939,7 @@ dma_map!(
     (Stream7<DMA1>, 1, pac::I2C1, MemoryToPeripheral),          //I2C1_TX:DMA_CHANNEL_1
     (Stream7<DMA1>, 1, i2c::Tx<pac::I2C1>, MemoryToPeripheral), //I2C1_TX:DMA_CHANNEL_1
     (Stream7<DMA1>, 6, pac::USART2, PeripheralToMemory), //USART2_RX:DMA_CHANNEL_6
+    (Stream7<DMA1>, 6, serial::Rx<pac::USART2>, PeripheralToMemory), //USART2_RX:DMA_CHANNEL_6
     (Stream2<DMA2>, 2, pac::SPI1, MemoryToPeripheral), //SPI1_TX
     (Stream2<DMA2>, 2, spi::Tx<pac::SPI1>, MemoryToPeripheral), //SPI1_TX
     (Stream3<DMA2>, 3, pac::SPI1, MemoryToPeripheral), //SPI1_TX:DMA_CHANNEL_3
@@ -1060,9 +1065,13 @@ address!((pac::QUADSPI, dr, u32),);
 ))]
 dma_map!(
     (Stream0<DMA1>, 5, pac::UART8, MemoryToPeripheral), //UART8_TX
+    (Stream0<DMA1>, 5, serial::Tx<pac::UART8>, MemoryToPeripheral), //UART8_TX
     (Stream1<DMA1>, 5, pac::UART7, MemoryToPeripheral), //UART7_TX
+    (Stream1<DMA1>, 5, serial::Tx<pac::UART7>, MemoryToPeripheral), //UART7_TX
     (Stream3<DMA1>, 5, pac::UART7, PeripheralToMemory), //UART7_RX
+    (Stream3<DMA1>, 5, serial::Rx<pac::UART7>, PeripheralToMemory), //UART7_RX
     (Stream6<DMA1>, 5, pac::UART8, PeripheralToMemory), //UART8_RX
+    (Stream6<DMA1>, 5, serial::Rx<pac::UART8>, PeripheralToMemory), //UART8_RX
 );
 
 #[cfg(any(
@@ -1080,12 +1089,19 @@ address!((pac::UART7, dr, u8), (pac::UART8, dr, u8),);
 #[cfg(any(feature = "stm32f413", feature = "stm32f423",))]
 dma_map!(
     (Stream7<DMA1>, 8, pac::UART5, MemoryToPeripheral), //UART5_TX
+    (Stream7<DMA1>, 8, serial::Tx<pac::UART5>, MemoryToPeripheral), //UART5_TX
     (Stream0<DMA2>, 1, pac::UART9, MemoryToPeripheral), //UART9_TX
+    (Stream0<DMA2>, 1, serial::Tx<pac::UART9>, MemoryToPeripheral), //UART9_TX
     (Stream0<DMA2>, 5, pac::UART10, PeripheralToMemory), //UART10_RX
+    (Stream0<DMA2>, 5, serial::Rx<pac::UART10>, PeripheralToMemory), //UART10_RX
     (Stream3<DMA2>, 9, pac::UART10, PeripheralToMemory), //UART10_RX:DMA_CHANNEL_9
+    (Stream3<DMA2>, 9, serial::Rx<pac::UART10>, PeripheralToMemory), //UART10_RX:DMA_CHANNEL_9
     (Stream5<DMA2>, 9, pac::UART10, MemoryToPeripheral), //UART10_TX
+    (Stream5<DMA2>, 9, serial::Tx<pac::UART10>, MemoryToPeripheral), //UART10_TX
     (Stream7<DMA2>, 0, pac::UART9, PeripheralToMemory), //UART9_RX
+    (Stream7<DMA2>, 0, serial::Rx<pac::UART9>, PeripheralToMemory), //UART9_RX
     (Stream7<DMA2>, 6, pac::UART10, MemoryToPeripheral), //UART10_TX:DMA_CHANNEL_6
+    (Stream7<DMA2>, 6, serial::Tx<pac::UART10>, MemoryToPeripheral), //UART10_TX:DMA_CHANNEL_6
     //(pac::DMA2, Stream6, 2, IN<pac::AES>, MemoryToPeripheral), //AES_IN
     //(pac::DMA2, Stream5, 2, OUT<pac::AES>, PeripheralToMemory), //AES_OUT
 );

From 8ad148bde29937110fbb2ef76c85ffc0815ff89c Mon Sep 17 00:00:00 2001
From: randi <randipa99@gmail.com>
Date: Sun, 9 Apr 2023 17:53:04 +1200
Subject: [PATCH 2/3] Added missing U(S)ART DMA traits for HAL serial types

---
 CHANGELOG.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 122a029a..d859f187 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
  - Improve SPI::new* docs [#587]
  - Add advanced timer dead time insertion example [#585]
+ - Added missing U(S)ART DMA traits for HAL serial types [#593]
 
 ## [v0.15.0] - 2023-03-13
 

From 97fa5a676e25824c6e0a15ecfc73476ab7bd2e03 Mon Sep 17 00:00:00 2001
From: randi <randipa99@gmail.com>
Date: Sun, 9 Apr 2023 17:54:58 +1200
Subject: [PATCH 3/3] Added missing U(S)ART DMA traits for HAL serial types

---
 CHANGELOG.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index d859f187..fdaa296b 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -7,9 +7,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+ - Added missing U(S)ART DMA traits for HAL serial types [#593]
  - Improve SPI::new* docs [#587]
  - Add advanced timer dead time insertion example [#585]
- - Added missing U(S)ART DMA traits for HAL serial types [#593]
 
 ## [v0.15.0] - 2023-03-13