From 1052c8bf24edc7797c3a7585f43717fa7c729b15 Mon Sep 17 00:00:00 2001 From: Nicolas de Grave Date: Mon, 30 May 2022 23:28:45 +0200 Subject: [PATCH 1/7] Added STM32F765IIKx --- boards.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/boards.txt b/boards.txt index f16a5bf613..501875dd68 100644 --- a/boards.txt +++ b/boards.txt @@ -3034,6 +3034,14 @@ GenF7.menu.pnum.GENERIC_F756ZGYX.build.board=GENERIC_F756ZGYX GenF7.menu.pnum.GENERIC_F756ZGYX.build.product_line=STM32F756xx GenF7.menu.pnum.GENERIC_F756ZGYX.build.variant=STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y) +# Generic F765IIKx +GenF7.menu.pnum.GENERIC_F765IIKX=Generic F765Kx +GenF7.menu.pnum.GENERIC_F765IIKX.upload.maximum_size=2097152 +GenF7.menu.pnum.GENERIC_F765IIKX.upload.maximum_data_size=524288 +GenF7.menu.pnum.GENERIC_F765IIKX.build=GENERIC_F765IIKX +GenF7.menu.pnum.GENERIC_F765IIKX.build.product_line=STM32F765xx +GenF7.menu.pnum.GENERIC_F765IIKX.build.variant=F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) + # Generic F765VGHx GenF7.menu.pnum.GENERIC_F765VGHX=Generic F765VGHx GenF7.menu.pnum.GENERIC_F765VGHX.upload.maximum_size=1048576 From 9ca70e872ff789c007763a97d579caa6b1028fe9 Mon Sep 17 00:00:00 2001 From: Nicolas de Grave Date: Tue, 31 May 2022 00:03:15 +0200 Subject: [PATCH 2/7] Forgot 2 files --- .../generic_clock.c | 47 ++++- .../ldscript.ld | 185 ++++++++++++++++++ 2 files changed, 230 insertions(+), 2 deletions(-) create mode 100644 variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/ldscript.ld diff --git a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c index aad06ffcbd..74c3ec487f 100644 --- a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c +++ b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c @@ -24,8 +24,51 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 12; + RCC_OscInitStruct.PLL.PLLN = 216; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 4; + RCC_OscInitStruct.PLL.PLLR = 2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /** Activate the Over-Drive mode + */ + if (HAL_PWREx_EnableOverDrive() != HAL_OK) + { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) + { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/ldscript.ld b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/ldscript.ld new file mode 100644 index 0000000000..953bbdadaf --- /dev/null +++ b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/ldscript.ld @@ -0,0 +1,185 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** @brief : Linker script for STM32F765IIKx Device from STM32F7 series +** 2048Kbytes FLASH +** 512Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2022 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200 ; /* required amount of heap */ +_Min_Stack_Size = 0x400 ; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} From 97094f081d28cfe8e5d9fe9ca0754d4e60e666c5 Mon Sep 17 00:00:00 2001 From: Nicolas de Grave Date: Tue, 31 May 2022 20:46:20 +0200 Subject: [PATCH 3/7] Configured HSI instead of HSE and fixed warning at compilation --- .../generic_clock.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c index 74c3ec487f..3148598db5 100644 --- a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c +++ b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c @@ -24,8 +24,8 @@ */ WEAK void SystemClock_Config(void) { - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; /** Configure the main internal regulator output voltage */ @@ -35,14 +35,15 @@ WEAK void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 12; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; RCC_OscInitStruct.PLL.PLLN = 216; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = 4; + RCC_OscInitStruct.PLL.PLLQ = 2; RCC_OscInitStruct.PLL.PLLR = 2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { From 2863d9ba6648e22d6f4a7aff5a44599f529e4f4e Mon Sep 17 00:00:00 2001 From: Nicolas de Grave Date: Wed, 1 Jun 2022 15:27:30 +0200 Subject: [PATCH 4/7] Fixed Astyle errors --- .../generic_clock.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c index 3148598db5..daa7352a26 100644 --- a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c +++ b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c @@ -45,29 +45,26 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLQ = 2; RCC_OscInitStruct.PLL.PLLR = 2; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } /** Activate the Over-Drive mode */ - if (HAL_PWREx_EnableOverDrive() != HAL_OK) - { + if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) - { + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) { Error_Handler(); } } From e8ca554f7dde821f16cd3f6d387d62d978761213 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Wed, 1 Jun 2022 15:49:39 +0200 Subject: [PATCH 5/7] fix: astyle issue --- .../generic_clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c index daa7352a26..d35f70e4b3 100644 --- a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c +++ b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c @@ -57,8 +57,8 @@ WEAK void SystemClock_Config(void) /** Initializes the CPU, AHB and APB buses clocks */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; From 8b1b3a45282e8a12055f2bf00bf17bd2e83c7378 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Wed, 1 Jun 2022 20:58:44 +0200 Subject: [PATCH 6/7] fix: wrong variant path --- boards.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards.txt b/boards.txt index 501875dd68..e4cdd32b79 100644 --- a/boards.txt +++ b/boards.txt @@ -3040,7 +3040,7 @@ GenF7.menu.pnum.GENERIC_F765IIKX.upload.maximum_size=2097152 GenF7.menu.pnum.GENERIC_F765IIKX.upload.maximum_data_size=524288 GenF7.menu.pnum.GENERIC_F765IIKX.build=GENERIC_F765IIKX GenF7.menu.pnum.GENERIC_F765IIKX.build.product_line=STM32F765xx -GenF7.menu.pnum.GENERIC_F765IIKX.build.variant=F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) +GenF7.menu.pnum.GENERIC_F765IIKX.build.variant=STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) # Generic F765VGHx GenF7.menu.pnum.GENERIC_F765VGHX=Generic F765VGHx From fe0d2e725bdca26c6527e2cb1732b8cbfda24a49 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Thu, 2 Jun 2022 15:00:24 +0200 Subject: [PATCH 7/7] fix: wrong board entry and update clock config also, add all other mcu entries available and reference them in the README. Signed-off-by: Frederic Pillon --- README.md | 3 + boards.txt | 78 ++++++++++++++++++- .../generic_clock.c | 17 +++- 3 files changed, 93 insertions(+), 5 deletions(-) diff --git a/README.md b/README.md index db8e764b7f..e2d4536baa 100644 --- a/README.md +++ b/README.md @@ -282,10 +282,13 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32F750Z8 | Generic Board | *2.0.0* | | | :green_heart: | STM32F756BG
STM32F756NG | Generic Board | *2.0.0* | | | :green_heart: | STM32F756ZG | Generic Board | *2.0.0* | | +| :yellow_heart: | STM32F765IGK
STM32F765IIK
STM32F765IGT
STM32F765IIT | Generic Board | **2.3.0** | | | :green_heart: | STM32F765VG
STM32F765VI | Generic Board | *2.0.0* | | | :green_heart: | STM32F765ZG
STM32F765ZI | Generic Board | *2.0.0* | | +| :yellow_heart: | STM32F767IGK
STM32F767IIK
STM32F767IGT
STM32F767IIT | Generic Board | **2.3.0** | | | :green_heart: | STM32F767VG
STM32F767VI | Generic Board | *2.0.0* | | | :green_heart: | STM32F767ZG
STM32F767ZI | Generic Board | *2.0.0* | | +| :yellow_heart: | STM32F777IIK
STM32F777IIT | Generic Board | **2.3.0** | | | :green_heart: | STM32F777VI | Generic Board | *2.0.0* | | | :green_heart: | STM32F777ZI | Generic Board | *2.0.0* | | diff --git a/boards.txt b/boards.txt index e4cdd32b79..988405321c 100644 --- a/boards.txt +++ b/boards.txt @@ -3034,14 +3034,38 @@ GenF7.menu.pnum.GENERIC_F756ZGYX.build.board=GENERIC_F756ZGYX GenF7.menu.pnum.GENERIC_F756ZGYX.build.product_line=STM32F756xx GenF7.menu.pnum.GENERIC_F756ZGYX.build.variant=STM32F7xx/F745Z(E-G)T_F746Z(E-G)(T-Y)_F750Z8T_F756ZG(T-Y) +# Generic F765IGKx +GenF7.menu.pnum.GENERIC_F765IGKX=Generic F765IGKx +GenF7.menu.pnum.GENERIC_F765IGKX.upload.maximum_size=1048576 +GenF7.menu.pnum.GENERIC_F765IGKX.upload.maximum_data_size=393216 +GenF7.menu.pnum.GENERIC_F765IGKX.build.board=GENERIC_F765IGKX +GenF7.menu.pnum.GENERIC_F765IGKX.build.product_line=STM32F765xx +GenF7.menu.pnum.GENERIC_F765IGKX.build.variant=STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) + # Generic F765IIKx -GenF7.menu.pnum.GENERIC_F765IIKX=Generic F765Kx +GenF7.menu.pnum.GENERIC_F765IIKX=Generic F765IIKx GenF7.menu.pnum.GENERIC_F765IIKX.upload.maximum_size=2097152 -GenF7.menu.pnum.GENERIC_F765IIKX.upload.maximum_data_size=524288 -GenF7.menu.pnum.GENERIC_F765IIKX.build=GENERIC_F765IIKX +GenF7.menu.pnum.GENERIC_F765IIKX.upload.maximum_data_size=393216 +GenF7.menu.pnum.GENERIC_F765IIKX.build.board=GENERIC_F765IIKX GenF7.menu.pnum.GENERIC_F765IIKX.build.product_line=STM32F765xx GenF7.menu.pnum.GENERIC_F765IIKX.build.variant=STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) +# Generic F765IGTx +GenF7.menu.pnum.GENERIC_F765IGTX=Generic F765IGTx +GenF7.menu.pnum.GENERIC_F765IGTX.upload.maximum_size=1048576 +GenF7.menu.pnum.GENERIC_F765IGTX.upload.maximum_data_size=393216 +GenF7.menu.pnum.GENERIC_F765IGTX.build.board=GENERIC_F765IGTX +GenF7.menu.pnum.GENERIC_F765IGTX.build.product_line=STM32F765xx +GenF7.menu.pnum.GENERIC_F765IGTX.build.variant=STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) + +# Generic F765IITx +GenF7.menu.pnum.GENERIC_F765IITX=Generic F765IITx +GenF7.menu.pnum.GENERIC_F765IITX.upload.maximum_size=2097152 +GenF7.menu.pnum.GENERIC_F765IITX.upload.maximum_data_size=393216 +GenF7.menu.pnum.GENERIC_F765IITX.build.board=GENERIC_F765IITX +GenF7.menu.pnum.GENERIC_F765IITX.build.product_line=STM32F765xx +GenF7.menu.pnum.GENERIC_F765IITX.build.variant=STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) + # Generic F765VGHx GenF7.menu.pnum.GENERIC_F765VGHX=Generic F765VGHx GenF7.menu.pnum.GENERIC_F765VGHX.upload.maximum_size=1048576 @@ -3090,6 +3114,38 @@ GenF7.menu.pnum.GENERIC_F765ZITX.build.board=GENERIC_F765ZITX GenF7.menu.pnum.GENERIC_F765ZITX.build.product_line=STM32F765xx GenF7.menu.pnum.GENERIC_F765ZITX.build.variant=STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT +# Generic F767IGKx +GenF7.menu.pnum.GENERIC_F767IGKX=Generic F767IGKx +GenF7.menu.pnum.GENERIC_F767IGKX.upload.maximum_size=1048576 +GenF7.menu.pnum.GENERIC_F767IGKX.upload.maximum_data_size=393216 +GenF7.menu.pnum.GENERIC_F767IGKX.build.board=GENERIC_F767IGKX +GenF7.menu.pnum.GENERIC_F767IGKX.build.product_line=STM32F767xx +GenF7.menu.pnum.GENERIC_F767IGKX.build.variant=STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) + +# Generic F767IIKx +GenF7.menu.pnum.GENERIC_F767IIKX=Generic F767IIKx +GenF7.menu.pnum.GENERIC_F767IIKX.upload.maximum_size=2097152 +GenF7.menu.pnum.GENERIC_F767IIKX.upload.maximum_data_size=393216 +GenF7.menu.pnum.GENERIC_F767IIKX.build.board=GENERIC_F767IIKX +GenF7.menu.pnum.GENERIC_F767IIKX.build.product_line=STM32F767xx +GenF7.menu.pnum.GENERIC_F767IIKX.build.variant=STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) + +# Generic F767IGTx +GenF7.menu.pnum.GENERIC_F767IGTX=Generic F767IGTx +GenF7.menu.pnum.GENERIC_F767IGTX.upload.maximum_size=1048576 +GenF7.menu.pnum.GENERIC_F767IGTX.upload.maximum_data_size=393216 +GenF7.menu.pnum.GENERIC_F767IGTX.build.board=GENERIC_F767IGTX +GenF7.menu.pnum.GENERIC_F767IGTX.build.product_line=STM32F767xx +GenF7.menu.pnum.GENERIC_F767IGTX.build.variant=STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) + +# Generic F767IITx +GenF7.menu.pnum.GENERIC_F767IITX=Generic F767IITx +GenF7.menu.pnum.GENERIC_F767IITX.upload.maximum_size=2097152 +GenF7.menu.pnum.GENERIC_F767IITX.upload.maximum_data_size=393216 +GenF7.menu.pnum.GENERIC_F767IITX.build.board=GENERIC_F767IITX +GenF7.menu.pnum.GENERIC_F767IITX.build.product_line=STM32F767xx +GenF7.menu.pnum.GENERIC_F767IITX.build.variant=STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) + # Generic F767VGHx GenF7.menu.pnum.GENERIC_F767VGHX=Generic F767VGHx GenF7.menu.pnum.GENERIC_F767VGHX.upload.maximum_size=1048576 @@ -3138,6 +3194,22 @@ GenF7.menu.pnum.GENERIC_F767ZITX.build.board=GENERIC_F767ZITX GenF7.menu.pnum.GENERIC_F767ZITX.build.product_line=STM32F767xx GenF7.menu.pnum.GENERIC_F767ZITX.build.variant=STM32F7xx/F765Z(G-I)T_F767Z(G-I)T_F777ZIT +# Generic F777IIKx +GenF7.menu.pnum.GENERIC_F777IIKX=Generic F777IIKx +GenF7.menu.pnum.GENERIC_F777IIKX.upload.maximum_size=2097152 +GenF7.menu.pnum.GENERIC_F777IIKX.upload.maximum_data_size=393216 +GenF7.menu.pnum.GENERIC_F777IIKX.build.board=GENERIC_F777IIKX +GenF7.menu.pnum.GENERIC_F777IIKX.build.product_line=STM32F777xx +GenF7.menu.pnum.GENERIC_F777IIKX.build.variant=STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) + +# Generic F777IITx +GenF7.menu.pnum.GENERIC_F777IITX=Generic F777IITx +GenF7.menu.pnum.GENERIC_F777IITX.upload.maximum_size=2097152 +GenF7.menu.pnum.GENERIC_F777IITX.upload.maximum_data_size=393216 +GenF7.menu.pnum.GENERIC_F777IITX.build.board=GENERIC_F777IITX +GenF7.menu.pnum.GENERIC_F777IITX.build.product_line=STM32F777xx +GenF7.menu.pnum.GENERIC_F777IITX.build.variant=STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T) + # Generic F777VIHx GenF7.menu.pnum.GENERIC_F777VIHX=Generic F777VIHx GenF7.menu.pnum.GENERIC_F777VIHX.upload.maximum_size=2097152 diff --git a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c index d35f70e4b3..73b5ef782c 100644 --- a/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c +++ b/variants/STM32F7xx/F765I(G-I)(K-T)_F767I(G-I)(K-T)_F777II(K-T)/generic_clock.c @@ -26,6 +26,7 @@ WEAK void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {}; /** Configure the main internal regulator output voltage */ @@ -43,7 +44,7 @@ WEAK void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLM = 8; RCC_OscInitStruct.PLL.PLLN = 216; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLQ = 9; RCC_OscInitStruct.PLL.PLLR = 2; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); @@ -62,11 +63,23 @@ WEAK void SystemClock_Config(void) RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV4; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) { Error_Handler(); } + + /** Initializes the peripherals clock + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_SDMMC2 + | RCC_PERIPHCLK_CLK48; + PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL; + PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48; + PeriphClkInitStruct.Sdmmc2ClockSelection = RCC_SDMMC2CLKSOURCE_CLK48; + + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */