From 4996a535d2e2e41c094b03cb85082477024077d8 Mon Sep 17 00:00:00 2001 From: SFE-Brudnerd <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Wed, 29 Mar 2023 09:54:59 -0600 Subject: [PATCH 01/14] Add first attempt of a variant of the STM32WB5MMG MMPB --- boards.txt | 105 +++++++ variants/STM32WBxx/WB5MMGH/CMakeLists.txt | 2 + .../PeripheralPins_SFE_MMPB_STM32WB5MMG.c | 291 ++++++++++++++++++ .../WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp | 171 ++++++++++ .../WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h | 183 +++++++++++ 5 files changed, 752 insertions(+) create mode 100644 variants/STM32WBxx/WB5MMGH/PeripheralPins_SFE_MMPB_STM32WB5MMG.c create mode 100644 variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp create mode 100644 variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h diff --git a/boards.txt b/boards.txt index e1b0c08197..4c4322fb51 100644 --- a/boards.txt +++ b/boards.txt @@ -10548,6 +10548,54 @@ Midatronics.menu.upload_method.dfuMethod.upload.protocol=2 Midatronics.menu.upload_method.dfuMethod.upload.options=-g Midatronics.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg +################################################################################ +# SparkFun Boards + +SparkFun.name=SparkFun Boards + +SparkFun.build.core=arduino +SparkFun.build.board=SparkFun +SparkFun.build.variant_h=variant_{build.board}.h +SparkFun.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} +SparkFun.upload.maximum_size=0 +SparkFun.upload.maximum_data_size=0 + +# SFE_MMPB_STM32WB5MMG board +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG=SparkFun MicroMod STM32WB5MMG +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.node=NODE_WB5MMG +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.upload.maximum_size=827392 +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.upload.maximum_data_size=196608 +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.mcu=cortex-m4 +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.fpu=-mfpu=fpv4-sp-d16 +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.float-abi=-mfloat-abi=hard +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.board=SFE_MMPB_STM32WB5MMG +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.series=STM32WBxx +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.product_line=STM32WB5Mxx +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.variant=STM32WBxx/WB5MMGH +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.cmsis_lib_gcc=arm_cortexM4lf_math + +# Upload menu +SparkFun.menu.upload_method.MassStorage=Mass Storage +SparkFun.menu.upload_method.MassStorage.upload.protocol= +SparkFun.menu.upload_method.MassStorage.upload.tool=massStorageCopy + +SparkFun.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD) +SparkFun.menu.upload_method.swdMethod.upload.protocol=0 +SparkFun.menu.upload_method.swdMethod.upload.options=-g +SparkFun.menu.upload_method.swdMethod.upload.tool=stm32CubeProg + +SparkFun.menu.upload_method.serialMethod=STM32CubeProgrammer (Serial) +SparkFun.menu.upload_method.serialMethod.upload.protocol=1 +SparkFun.menu.upload_method.serialMethod.upload.options={serial.port.file} -s +SparkFun.menu.upload_method.serialMethod.upload.tool=stm32CubeProg + +SparkFun.menu.upload_method.dfuMethod=STM32CubeProgrammer (DFU) +SparkFun.menu.upload_method.dfuMethod.upload.protocol=2 +SparkFun.menu.upload_method.dfuMethod.upload.options=-g +SparkFun.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg + + ################################################################################ # Serialx activation Nucleo_144.menu.xserial.generic=Enabled (generic 'Serial') @@ -10744,6 +10792,12 @@ Midatronics.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL Midatronics.menu.xserial.disabled=Disabled (No Serial support) Midatronics.menu.xserial.disabled.build.xSerial= +SparkFun.menu.xserial.generic=Enabled (generic 'Serial') +SparkFun.menu.xserial.none=Enabled (no generic 'Serial') +SparkFun.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE +SparkFun.menu.xserial.disabled=Disabled (no Serial support) +SparkFun.menu.xserial.disabled.build.xSerial= + # USB connectivity Nucleo_144.menu.usb.none=None Nucleo_144.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART) @@ -11067,6 +11121,19 @@ Midatronics.menu.xusb.HS.build.usb_speed=-DUSE_USB_HS Midatronics.menu.xusb.HSFS=High Speed in Full Speed mode Midatronics.menu.xusb.HSFS.build.usb_speed=-DUSE_USB_HS -DUSE_USB_HS_IN_FS +SparkFun.menu.usb.none=None +SparkFun.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART) +SparkFun.menu.usb.CDCgen.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC +SparkFun.menu.usb.CDC=CDC (no generic 'Serial') +SparkFun.menu.usb.CDC.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB +SparkFun.menu.usb.HID=HID (keyboard and mouse) +SparkFun.menu.usb.HID.build.enable_usb={build.usb_flags} -DUSBD_USE_HID_COMPOSITE +SparkFun.menu.xusb.FS=Low/Full Speed +SparkFun.menu.xusb.HS=High Speed +SparkFun.menu.xusb.HS.build.usb_speed=-DUSE_USB_HS +SparkFun.menu.xusb.HSFS=High Speed in Full Speed mode +SparkFun.menu.xusb.HSFS.build.usb_speed=-DUSE_USB_HS -DUSE_USB_HS_IN_FS + # Optimizations Nucleo_144.menu.opt.osstd=Smallest (-Os default) Nucleo_144.menu.opt.oslto=Smallest (-Os) with LTO @@ -11687,6 +11754,26 @@ Midatronics.menu.opt.ogstd.build.flags.optimize=-Og Midatronics.menu.opt.o0std=No Optimization (-O0) Midatronics.menu.opt.o0std.build.flags.optimize=-O0 +SparkFun.menu.opt.osstd=Smallest (-Os default) +SparkFun.menu.opt.oslto=Smallest (-Os) with LTO +SparkFun.menu.opt.oslto.build.flags.optimize=-Os -flto +SparkFun.menu.opt.o1std=Fast (-O1) +SparkFun.menu.opt.o1std.build.flags.optimize=-O1 +SparkFun.menu.opt.o1lto=Fast (-O1) with LTO +SparkFun.menu.opt.o1lto.build.flags.optimize=-O1 -flto +SparkFun.menu.opt.o2std=Faster (-O2) +SparkFun.menu.opt.o2std.build.flags.optimize=-O2 +SparkFun.menu.opt.o2lto=Faster (-O2) with LTO +SparkFun.menu.opt.o2lto.build.flags.optimize=-O2 -flto +SparkFun.menu.opt.o3std=Fastest (-O3) +SparkFun.menu.opt.o3std.build.flags.optimize=-O3 +SparkFun.menu.opt.o3lto=Fastest (-O3) with LTO +SparkFun.menu.opt.o3lto.build.flags.optimize=-O3 -flto +SparkFun.menu.opt.ogstd=Debug (-Og) +SparkFun.menu.opt.ogstd.build.flags.optimize=-Og +SparkFun.menu.opt.o0std=No Optimization (-O0) +SparkFun.menu.opt.o0std.build.flags.optimize=-O0 + # Debug information Nucleo_144.menu.dbg.none=None Nucleo_144.menu.dbg.enable_sym=Symbols Enabled (-g) @@ -11924,6 +12011,14 @@ Midatronics.menu.dbg.enable_log.build.flags.debug= Midatronics.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g) Midatronics.menu.dbg.enable_all.build.flags.debug=-g +SparkFun.menu.dbg.none=None +SparkFun.menu.dbg.enable_sym=Symbols Enabled (-g) +SparkFun.menu.dbg.enable_sym.build.flags.debug=-g -DNDEBUG +SparkFun.menu.dbg.enable_log=Core logs Enabled +SparkFun.menu.dbg.enable_log.build.flags.debug= +SparkFun.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g) +SparkFun.menu.dbg.enable_all.build.flags.debug=-g + # C Runtime Library Nucleo_144.menu.rtlib.nano=Newlib Nano (default) Nucleo_144.menu.rtlib.nanofp=Newlib Nano + Float Printf @@ -12234,3 +12329,13 @@ Midatronics.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf Midatronics.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float Midatronics.menu.rtlib.full=Newlib Standard Midatronics.menu.rtlib.full.build.flags.ldspecs= + +SparkFun.menu.rtlib.nano=Newlib Nano (default) +SparkFun.menu.rtlib.nanofp=Newlib Nano + Float Printf +SparkFun.menu.rtlib.nanofp.build.flags.ldspecs=--specs=nano.specs -u _printf_float +SparkFun.menu.rtlib.nanofs=Newlib Nano + Float Scanf +SparkFun.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_float +SparkFun.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf +SparkFun.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float +SparkFun.menu.rtlib.full=Newlib Standard +SparkFun.menu.rtlib.full.build.flags.ldspecs= diff --git a/variants/STM32WBxx/WB5MMGH/CMakeLists.txt b/variants/STM32WBxx/WB5MMGH/CMakeLists.txt index 29fa14a7c9..5b7d0109d2 100644 --- a/variants/STM32WBxx/WB5MMGH/CMakeLists.txt +++ b/variants/STM32WBxx/WB5MMGH/CMakeLists.txt @@ -22,8 +22,10 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL generic_clock.c PeripheralPins.c PeripheralPins_STM32WB5MM_DK.c + PeripheralPins_SFE_MMPB_STM32WB5MMG.c variant_generic.cpp variant_STM32WB5MM_DK.cpp + variant_SFE_MMPB_STM32WB5MMG.cpp ) target_link_libraries(variant_bin PUBLIC variant_usage) diff --git a/variants/STM32WBxx/WB5MMGH/PeripheralPins_SFE_MMPB_STM32WB5MMG.c b/variants/STM32WBxx/WB5MMGH/PeripheralPins_SFE_MMPB_STM32WB5MMG.c new file mode 100644 index 0000000000..c80a4d1671 --- /dev/null +++ b/variants/STM32WBxx/WB5MMGH/PeripheralPins_SFE_MMPB_STM32WB5MMG.c @@ -0,0 +1,291 @@ +/* + ******************************************************************************* + * Copyright (c) 2020, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32WB5MMGHx.xml + * CubeMX DB release 6.0.70 + */ +#if defined(ARDUINO_SFE_MMPB_STM32WB5MMG) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + //{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + //{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + //{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + //{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + //{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + //{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + //{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + //{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + //{PA_8, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + //{PA_9, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + //{PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + //{PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + //{PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {NC, NP, 0} +}; +#endif + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + //{PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + //{PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + //{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + //{PB_11, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_14, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + //{PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + //{PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + //{PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + //{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + //{PB_10, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_13, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + //{PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + //{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + //{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + //{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + //{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + //{PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + //{PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + //{PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + //{PA_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + //{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + //{PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + //{PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + //{PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + //{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + //{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + //{PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + //{PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N + //{PB_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + //{PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + //{PB_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + //{PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + //{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + //{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + //{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + //{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + //{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PD_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PD_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + //{PE_0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + //{PE_1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + //{PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + //{PB_5, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + //{PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + //{PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + //{PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + //{PA_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + //{PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + //{PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + //{PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + //{PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + //{PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + //{PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + //{PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + //{PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + //{PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + //{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + //{PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + //{PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + //{PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + //{PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + //{PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + //{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + //{PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + //{PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + //{PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + //{PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + //{PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + //{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + //{PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + //{PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + //{PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + //{PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + //{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + //{PB_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + //{PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + //{PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + //{PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** No CAN *** + +//*** No ETHERNET *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_DATA0[] = { + //{PB_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PD_4, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_DATA1[] = { + //{PB_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PD_5, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_DATA2[] = { + //{PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PD_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_DATA3[] = { + //{PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PD_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_SCLK[] = { + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + //{PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_QSPI_MODULE_ENABLED +WEAK const PinMap PinMap_QUADSPI_SSEL[] = { + //{PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + //{PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PD_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_USB)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_USB)}, // USB_DP + //{PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + //{PC_9, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_USB)}, // USB_NOE + {NC, NP, 0} +}; +#endif + +//*** No SD *** + +#endif /* !CUSTOM_PERIPHERAL_PINS */ diff --git a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp new file mode 100644 index 0000000000..1c16ab7a55 --- /dev/null +++ b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp @@ -0,0 +1,171 @@ +/* + ******************************************************************************* + * Copyright (c) 2020, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_SFE_MMPB_STM32WB5MMG) +#include "pins_arduino.h" +#include "lock_resource.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // D0 + PA_1, // D1 + PA_2, // D2 + PA_3, // D3 + PA_4, // D4 + PA_5, // D5 + PA_6, // D6 + PA_7, // D7 + PA_8, // D8 + PA_9, // D9 + PA_10, // D10 + PA_11, // D11 + PA_12, // D12 + PA_13, // D13 + PA_14, // D14 + PB_3, // D15 + PB_4, // D16 + PB_5, // D17 + PB_6, // D18 + PB_7, // D19 + PB_8, // D20 + PB_9, // D21 + PB_12, // D22 + PB_13, // D23 + PB_14, // D24 + PB_15, // D25 + PC_0, // D26 + PC_1, // D27 + PC_2, // D28/A0 + PC_3, // D29/A1 + PC_4, // D30/A2 + PC_11, // D31 + PD_3, // D32 + PD_4, // D33 + PD_5, // D34 + PD_6, // D35 + PD_7, // D36 + PD_8, // D37 + PD_14, // D38 + PD_15, // D39 + PE_0, // D40 + PE_3, // D41 + PE_4, // D42 + PH_0, // D43 + PH_1, // D44 + PH_3 // D45 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 28, // A0, PC2 + 29, // A1, PC3 + 30, // A2, PC4 +}; + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {}; + + /* This prevents concurrent access to RCC registers by CPU2 (M0+) */ + hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY); + + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /* This prevents the CPU2 (M0+) to disable the HSI48 oscillator */ + hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY); + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSI + |RCC_OSCILLATORTYPE_LSI1|RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2; + RCC_OscInitStruct.PLL.PLLN = 32; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2 + |RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV2; + RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) + { + Error_Handler(); + } + + /** Initializes the peripherals clock + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RFWAKEUP + |RCC_PERIPHCLK_SAI1|RCC_PERIPHCLK_ADC; + PeriphClkInitStruct.PLLSAI1.PLLN = 24; + PeriphClkInitStruct.PLLSAI1.PLLP = RCC_PLLP_DIV3; + PeriphClkInitStruct.PLLSAI1.PLLQ = RCC_PLLQ_DIV3; + PeriphClkInitStruct.PLLSAI1.PLLR = RCC_PLLR_DIV3; + PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_SAI1CLK|RCC_PLLSAI1_ADCCLK; + PeriphClkInitStruct.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLLSAI1; + PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; + PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_HSE_DIV1024; + PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSI; + PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE0; + + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } + LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA); + LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40); + LL_PWR_SMPS_Enable(); + + /* Select HSI as system clock source after Wake Up from Stop mode */ + LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI); + + hsem_unlock(CFG_HW_RCC_SEMID); +} + +#ifdef __cplusplus +} +#endif + +#endif /* ARDUINO_SFE_MMPB_STM32WB5MMG */ diff --git a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h new file mode 100644 index 0000000000..f95f5f5c4c --- /dev/null +++ b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h @@ -0,0 +1,183 @@ +/* + ******************************************************************************* + * Copyright (c) 2020, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 0 +#define PA1 1 +#define PA2 2 +#define PA3 3 +#define PA4 4 +#define PA5 5 +#define PA6 6 +#define PA7 7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PB3 15 +#define PB4 16 +#define PB5 17 +#define PB6 18 +#define PB7 19 +#define PB8 20 +#define PB9 21 +#define PB12 22 +#define PB13 23 +#define PB14 24 +#define PB15 25 +#define PC0 26 +#define PC1 27 +#define PC2 PIN_A0 +#define PC3 PIN_A1 +#define PC4 PIN_A2 +#define PC11 31 +#define PD3 32 +#define PD4 33 +#define PD5 34 +#define PD6 35 +#define PD7 36 +#define PD8 37 +#define PD14 38 +#define PD15 39 +#define PE0 40 +#define PE3 41 +#define PE4 42 +#define PH0 43 +#define PH1 44 +#define PH3 45 + +// Alternate pins number +#define PA7_ALT1 (PA7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) + +#define NUM_DIGITAL_PINS 46 +#define NUM_ANALOG_INPUTS 3 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PA2 +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PNUM_NOT_DEFINED +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PH0 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PH1 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PA5 +#endif + +// QSPI definitions +#define QSPI_CLK PA3 +#define QSPI_CS PD3 +#define QSPI_IO0 PD4 +#define QSPI_IO1 PD5 +#define QSPI_IO2 PD6 +#define QSPI_IO3 PD7 + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PB7 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB6 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM16 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM17 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 101 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA3 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA2 +#endif + +// Extra HAL modules +#if !defined(HAL_QSPI_MODULE_DISABLED) + #define HAL_QSPI_MODULE_ENABLED +#endif + +// #if !defined(HAL_TIM_MODULE_DISABLED) + #define HAL_TIM_MODULE_ENABLED +// #endif + +#if !defined(HAL_I2S_MODULE_DISABLED) + #define HAL_I2S_MODULE_ENABLED +#endif +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif From 0cd9489c4416ebbddff97de487935a9c9d723b50 Mon Sep 17 00:00:00 2001 From: SFE-Brudnerd <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Wed, 5 Apr 2023 11:09:39 -0600 Subject: [PATCH 02/14] Update variant Missing Pin C13. Set correct UART TX/RX. Add LPUART. Re-add ifdef guards for TIM. Add Serial Hardware Open --- .../WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp | 29 +++++----- .../WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h | 55 ++++++++++++------- 2 files changed, 51 insertions(+), 33 deletions(-) diff --git a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp index 1c16ab7a55..08dce7e9e6 100644 --- a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp +++ b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp @@ -48,20 +48,21 @@ const PinName digitalPin[] = { PC_3, // D29/A1 PC_4, // D30/A2 PC_11, // D31 - PD_3, // D32 - PD_4, // D33 - PD_5, // D34 - PD_6, // D35 - PD_7, // D36 - PD_8, // D37 - PD_14, // D38 - PD_15, // D39 - PE_0, // D40 - PE_3, // D41 - PE_4, // D42 - PH_0, // D43 - PH_1, // D44 - PH_3 // D45 + PC_13, // D32 + PD_3, // D33 + PD_4, // D34 + PD_5, // D35 + PD_6, // D36 + PD_7, // D37 + PD_8, // D38 + PD_14, // D39 + PD_15, // D40 + PE_0, // D41 + PE_3, // D42 + PE_4, // D43 + PH_0, // D44 + PH_1, // D45 + PH_3 // D46 }; // Analog (Ax) pin number array diff --git a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h index f95f5f5c4c..110b12e344 100644 --- a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h +++ b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h @@ -47,27 +47,28 @@ #define PC3 PIN_A1 #define PC4 PIN_A2 #define PC11 31 -#define PD3 32 -#define PD4 33 -#define PD5 34 -#define PD6 35 -#define PD7 36 -#define PD8 37 -#define PD14 38 -#define PD15 39 -#define PE0 40 -#define PE3 41 -#define PE4 42 -#define PH0 43 -#define PH1 44 -#define PH3 45 +#define PC13 32 +#define PD3 33 +#define PD4 34 +#define PD5 35 +#define PD6 36 +#define PD7 37 +#define PD8 38 +#define PD14 39 +#define PD15 40 +#define PE0 41 +#define PE3 42 +#define PE4 43 +#define PH0 44 +#define PH1 45 +#define PH3 46 // Alternate pins number #define PA7_ALT1 (PA7 | ALT1) #define PB8_ALT1 (PB8 | ALT1) #define PB9_ALT1 (PB9 | ALT1) -#define NUM_DIGITAL_PINS 46 +#define NUM_DIGITAL_PINS 47 #define NUM_ANALOG_INPUTS 3 // On-board LED pin number @@ -95,9 +96,15 @@ #endif #ifndef PIN_SPI_MOSI #define PIN_SPI_MOSI PA7 + #ifndef PIN_SPI_PICO + #define PIN_SPI_PICO PIN_SPI_MOSI + #endif #endif #ifndef PIN_SPI_MISO #define PIN_SPI_MISO PA6 + #ifndef PIN_SPI_POCI + #define PIN_SPI_POCI PIN_SPI_MISO + #endif #endif #ifndef PIN_SPI_SCK #define PIN_SPI_SCK PA5 @@ -136,10 +143,17 @@ // Default pin used for generic 'Serial' instance // Mandatory for Firmata #ifndef PIN_SERIAL_RX - #define PIN_SERIAL_RX PA3 + #define PIN_SERIAL_RX PA10 #endif #ifndef PIN_SERIAL_TX - #define PIN_SERIAL_TX PA2 + #define PIN_SERIAL_TX PA9 +#endif + +#ifndef PIN_SERIALLP1_RX + #define PIN_SERIALLP1_RX PC0 +#endif +#ifndef PIN_SERIALLP1_TX + #define PIN_SERIALLP1_TX PC1 #endif // Extra HAL modules @@ -147,9 +161,9 @@ #define HAL_QSPI_MODULE_ENABLED #endif -// #if !defined(HAL_TIM_MODULE_DISABLED) +#if !defined(HAL_TIM_MODULE_DISABLED) #define HAL_TIM_MODULE_ENABLED -// #endif +#endif #if !defined(HAL_I2S_MODULE_DISABLED) #define HAL_I2S_MODULE_ENABLED @@ -180,4 +194,7 @@ #ifndef SERIAL_PORT_HARDWARE #define SERIAL_PORT_HARDWARE Serial #endif + #ifndef SERIAL_PORT_HARDWARE_OPEN + #define SERIAL_PORT_HARDWARE_OPEN SerialOpen + #endif #endif From e34e60bf3447a1c58a9384b0aab6fecdc1243807 Mon Sep 17 00:00:00 2001 From: SFE-Brudnerd <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Tue, 6 Jun 2023 15:52:45 -0600 Subject: [PATCH 03/14] Move QSPI defines into managed space. --- .../WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h index 110b12e344..457c7fd7fb 100644 --- a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h +++ b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h @@ -110,14 +110,6 @@ #define PIN_SPI_SCK PA5 #endif -// QSPI definitions -#define QSPI_CLK PA3 -#define QSPI_CS PD3 -#define QSPI_IO0 PD4 -#define QSPI_IO1 PD5 -#define QSPI_IO2 PD6 -#define QSPI_IO3 PD7 - // I2C definitions #ifndef PIN_WIRE_SDA #define PIN_WIRE_SDA PB7 @@ -159,6 +151,12 @@ // Extra HAL modules #if !defined(HAL_QSPI_MODULE_DISABLED) #define HAL_QSPI_MODULE_ENABLED + #define QSPI_CLK PA3 + #define QSPI_CS PD3 + #define QSPI_IO0 PD4 + #define QSPI_IO1 PD5 + #define QSPI_IO2 PD6 + #define QSPI_IO3 PD7 #endif #if !defined(HAL_TIM_MODULE_DISABLED) From cae2ef801691560888d41a59d1c4cf6fe21cd148 Mon Sep 17 00:00:00 2001 From: SFE-Brudnerd <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Wed, 7 Jun 2023 16:00:38 -0600 Subject: [PATCH 04/14] Move SF F4 to SFE menu. Prepare SF WB for release. Bring boards.txt file changes to current release standards. Move F405 MMPB to SFE category in boards.txt. Update README.md for SFE boards. Ran cmake_updater_hook.py only allowing changes that affect SFE products Added STM32WB5MMG MMPB to platformio boards_remap.json --- README.md | 78 +++++++------ boards.txt | 42 ++++--- cmake/boards_db.cmake | 134 ++++++++++++++-------- tools/platformio/boards_remap.json | 1 + variants/STM32WBxx/WB5MMGH/CMakeLists.txt | 4 +- 5 files changed, 156 insertions(+), 103 deletions(-) diff --git a/README.md b/README.md index fd1973b28c..387c44a78b 100644 --- a/README.md +++ b/README.md @@ -49,39 +49,41 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d ## Supported boards - - [Nucleo 144 boards](#nucleo-144-boards) - - [Nucleo 64 boards](#nucleo-64-boards) - - [Nucleo 32 boards](#nucleo-32-boards) - - [Discovery boards](#discovery-boards) - - [Eval boards](#eval-boards) - - [STM32MP1 series coprocessor boards](#stm32mp1-series-coprocessor-boards) - - [Generic STM32C0 boards](#generic-stm32c0-boards) - - [Generic STM32F0 boards](#generic-stm32f0-boards) - - [Generic STM32F1 boards](#generic-stm32f1-boards) - - [Generic STM32F2 boards](#generic-stm32f2-boards) - - [Generic STM32F3 boards](#generic-stm32f3-boards) - - [Generic STM32F4 boards](#generic-stm32f4-boards) - - [Generic STM32F7 boards](#generic-stm32f7-boards) - - [Generic STM32G0 boards](#generic-stm32g0-boards) - - [Generic STM32G4 boards](#generic-stm32g4-boards) - - [Generic STM32H5 boards](#generic-stm32h5-boards) - - [Generic STM32H7 boards](#generic-stm32h7-boards) - - [Generic STM32L0 boards](#generic-stm32l0-boards) - - [Generic STM32L1 boards](#generic-stm32l1-boards) - - [Generic STM32L4 boards](#generic-stm32l4-boards) - - [Generic STM32L5 boards](#generic-stm32l5-boards) - - [Generic STM32U5 boards](#generic-stm32u5-boards) - - [Generic STM32WB boards](#generic-stm32wb-boards) - - [Generic STM32WL boards](#generic-stm32wb-boards) - - [3D printer boards](#3d-printer-boards) - - [Blues Wireless boards](#blues-wireless-boards) - - [Elecgator boards](#elecgator-boards) - - [Electronic Speed Controller boards](#electronic-speed-controller-boards) - - [Garatronics boards](#Garatronic/McHobby-boards) - - [Generic flight controllers](#generic-flight-controllers) - - [LoRa boards](#lora-boards) - - [Midatronics boards](#midatronics-boards) - +- [Nucleo 144 boards](#nucleo-144-boards) +- [Nucleo 64 boards](#nucleo-64-boards) +- [Nucleo 32 boards](#nucleo-32-boards) +- [Discovery boards](#discovery-boards) +- [Eval boards](#eval-boards) +- [STM32MP1 series coprocessor boards](#stm32mp1-series-coprocessor-boards) +- [Generic STM32C0 boards](#generic-stm32c0-boards) +- [Generic STM32F0 boards](#generic-stm32f0-boards) +- [Generic STM32F1 boards](#generic-stm32f1-boards) +- [Generic STM32F2 boards](#generic-stm32f2-boards) +- [Generic STM32F3 boards](#generic-stm32f3-boards) +- [Generic STM32F4 boards](#generic-stm32f4-boards) +- [Generic STM32F7 boards](#generic-stm32f7-boards) +- [Generic STM32G0 boards](#generic-stm32g0-boards) +- [Generic STM32G4 boards](#generic-stm32g4-boards) +- [Generic STM32H5 boards](#generic-stm32h5-boards) +- [Generic STM32H7 boards](#generic-stm32h7-boards) +- [Generic STM32L0 boards](#generic-stm32l0-boards) +- [Generic STM32L1 boards](#generic-stm32l1-boards) +- [Generic STM32L4 boards](#generic-stm32l4-boards) +- [Generic STM32L5 boards](#generic-stm32l5-boards) +- [Generic STM32U5 boards](#generic-stm32u5-boards) +- [Generic STM32WB boards](#generic-stm32wb-boards) +- [Generic STM32WL boards](#generic-stm32wl-boards) +- [3D printer boards](#3d-printer-boards) +- [Blues Wireless boards](#blues-wireless-boards) +- [Elecgator boards](#elecgator-boards) +- [Electronic Speed Controller boards](#electronic-speed-controller-boards) +- [Garatronic/McHobby boards](#garatronicmchobby-boards) +- [Generic flight controllers](#generic-flight-controllers) +- [LoRa boards](#lora-boards) +- [Midatronics boards](#midatronics-boards) +- [SparkFun boards](#sparkfun-boards) +- [Next release](#next-release) +- [Troubleshooting](#troubleshooting) ### [Nucleo 144](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-nucleo-boards.html) boards @@ -324,8 +326,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | Status | Device(s) | Name | Release | Notes | | :----: | :-------: | ---- | :-----: | :---- | -| :green_heart: | STM32F405RG | [Adafruit Feather STM32F405 Express](https://www.adafruit.com/product/4382) | *1.8.0* | | -| :yellow_heart: | STM32F405RG | [SparkFun MicroMod STM32](https://www.sparkfun.com/products/21326) | **2.6.0** | | +| :green_heart: | STM32F405RG | [Adafruit Feather STM32F405 Express](https://www.adafruit.com/product/4382) | *1.8.0* | | :green_heart: | STM32F401CC | [WeAct Black Pill](https://stm32-base.org/boards/STM32F401CCU6-WeAct-Black-Pill-V1.2) | *1.7.0* | [More info](https://github.com/WeActStudio/WeActStudio.MiniSTM32F4x1) | | :green_heart: | STM32F401CE | [WeAct Black Pill](https://stm32-base.org/boards/STM32F401CEU6-WeAct-Black-Pill-V3.0) | *2.4.0* | [More info](https://github.com/WeActStudio/WeActStudio.MiniSTM32F4x1) | | :green_heart: | STM32F411CE | [WeAct Black Pill](https://stm32-base.org/boards/STM32F411CEU6-WeAct-Black-Pill-V2.0) | *1.9.0* | [More info](https://github.com/WeActStudio/WeActStudio.MiniSTM32F4x1) | @@ -775,6 +776,13 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :----: | :-------: | ---- | :-----: | :---- | | :green_heart: | STM32WB55CE | [SharkyMKR](https://midatronics.com/shop/development-boards/mkr-sharky-i/) | *1.7.0* | | +### [SparkFun](https://www.sparkfun.com/) boards + +| Status | Device(s) | Name | Release | Notes | +| :----: | :-------: | ---- | :-----: | :---- | +| :yellow_heart: | STM32F405RG | [SparkFun MicroMod Processor Board - STM32F405](https://www.sparkfun.com/products/21326) | **2.6.0** | | +| :yellow_heart: | STM32WB5MMG | [SparkFun MicroMod Processor Board - STM32WB5MMG](https://www.sparkfun.com/products/21438) | **2.6.0** | | + ## Next release See [milestones](https://github.com/stm32duino/Arduino_Core_STM32/milestones) to have an overview of the next release content. diff --git a/boards.txt b/boards.txt index 81fdb5b732..9a60b2d551 100644 --- a/boards.txt +++ b/boards.txt @@ -3755,18 +3755,6 @@ GenF4.menu.pnum.FEATHER_F405.build.variant_h=variant_{build.board}.h GenF4.menu.pnum.FEATHER_F405.build.variant=STM32F4xx/F405RGT_F415RGT GenF4.menu.pnum.FEATHER_F405.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS -# SparkFun MicroMod STM32F405 board -GenF4.menu.pnum.MICROMOD_F405=SparkFun MicroMod STM32F405 -GenF4.menu.pnum.MICROMOD_F405.upload.maximum_size=1048576 -GenF4.menu.pnum.MICROMOD_F405.upload.maximum_data_size=131072 -GenF4.menu.pnum.MICROMOD_F405.build.board=MICROMOD_F405 -GenF4.menu.pnum.MICROMOD_F405.build.product_line=STM32F405xx -GenF4.menu.pnum.MICROMOD_F405.build.variant_h=variant_{build.board}.h -GenF4.menu.pnum.MICROMOD_F405.build.variant=STM32F4xx/F405RGT_F415RGT -GenF4.menu.pnum.MICROMOD_F405.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS -GenF4.menu.pnum.MICROMOD_F405.build.vid=0x1B4F -GenF4.menu.pnum.MICROMOD_F405.build.pid=0x0029 - # ThunderPack F411xxE # https://github.com/jgillick/ThunderPack/tree/STM32F4 GenF4.menu.pnum.THUNDERPACK_F411=ThunderPack v1.1+ @@ -10867,25 +10855,41 @@ SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.product_line=STM32WB5Mxx SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.variant=STM32WBxx/WB5MMGH SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.cmsis_lib_gcc=arm_cortexM4lf_math +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.vid=0x1B4F +SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.pid=0x0034 + +# SparkFun MicroMod STM32F405 Board +SparkFun.menu.pnum.MICROMOD_F405=SparkFun MicroMod STM32F405 +SparkFun.menu.pnum.MICROMOD_F405.upload.maximum_size=1048576 +SparkFun.menu.pnum.MICROMOD_F405.upload.maximum_data_size=131072 +SparkFun.menu.pnum.MICROMOD_F405.build.mcu=cortex-m4 +SparkFun.menu.pnum.MICROMOD_F405.build.fpu=-mfpu=fpv4-sp-d16 +SparkFun.menu.pnum.MICROMOD_F405.build.float-abi=-mfloat-abi=hard +SparkFun.menu.pnum.MICROMOD_F405.build.board=MICROMOD_F405 +SparkFun.menu.pnum.MICROMOD_F405.build.series=STM32F4xx +SparkFun.menu.pnum.MICROMOD_F405.build.product_line=STM32F405xx +SparkFun.menu.pnum.MICROMOD_F405.build.variant_h=variant_{build.board}.h +SparkFun.menu.pnum.MICROMOD_F405.build.variant=STM32F4xx/F405RGT_F415RGT +SparkFun.menu.pnum.MICROMOD_F405.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS +SparkFun.menu.pnum.MICROMOD_F405.build.cmsis_lib_gcc=arm_cortexM4lf_math +SparkFun.menu.pnum.MICROMOD_F405.build.flash_offset=0x0 +SparkFun.menu.pnum.MICROMOD_F405.build.vid=0x1B4F +SparkFun.menu.pnum.MICROMOD_F405.build.pid=0x0029 # Upload menu -SparkFun.menu.upload_method.MassStorage=Mass Storage -SparkFun.menu.upload_method.MassStorage.upload.protocol= -SparkFun.menu.upload_method.MassStorage.upload.tool=massStorageCopy - SparkFun.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD) SparkFun.menu.upload_method.swdMethod.upload.protocol=0 -SparkFun.menu.upload_method.swdMethod.upload.options=-g +SparkFun.menu.upload_method.swdMethod.upload.options= SparkFun.menu.upload_method.swdMethod.upload.tool=stm32CubeProg SparkFun.menu.upload_method.serialMethod=STM32CubeProgrammer (Serial) SparkFun.menu.upload_method.serialMethod.upload.protocol=1 -SparkFun.menu.upload_method.serialMethod.upload.options={serial.port.file} -s +SparkFun.menu.upload_method.serialMethod.upload.options={serial.port.file} SparkFun.menu.upload_method.serialMethod.upload.tool=stm32CubeProg SparkFun.menu.upload_method.dfuMethod=STM32CubeProgrammer (DFU) SparkFun.menu.upload_method.dfuMethod.upload.protocol=2 -SparkFun.menu.upload_method.dfuMethod.upload.options=-g +SparkFun.menu.upload_method.dfuMethod.upload.options= SparkFun.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake index 352087aa61..94597b501d 100644 --- a/cmake/boards_db.cmake +++ b/cmake/boards_db.cmake @@ -98845,10 +98845,10 @@ set(MICROMOD_F405_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/ set(MICROMOD_F405_MAXSIZE 1048576) set(MICROMOD_F405_MAXDATASIZE 131072) set(MICROMOD_F405_MCU cortex-m4) -set(MICROMOD_F405_FPCONF "-") +set(MICROMOD_F405_FPCONF "fpv4-sp-d16-hard") add_library(MICROMOD_F405 INTERFACE) target_compile_options(MICROMOD_F405 INTERFACE - "SHELL:-DSTM32F405xx " + "SHELL:-DSTM32F405xx " "SHELL:-DCUSTOM_PERIPHERAL_PINS" "SHELL:" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" @@ -98923,51 +98923,6 @@ target_compile_options(MICROMOD_F405_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) -# MICROMOD_F405_hid -# ----------------------------------------------------------------------------- - -set(MICROMOD_F405_hid_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F4xx/F405RGT_F415RGT") -set(MICROMOD_F405_hid_MAXSIZE 1048576) -set(MICROMOD_F405_hid_MAXDATASIZE 131072) -set(MICROMOD_F405_hid_MCU cortex-m4) -set(MICROMOD_F405_hid_FPCONF "-") -add_library(MICROMOD_F405_hid INTERFACE) -target_compile_options(MICROMOD_F405_hid INTERFACE - "SHELL:-DSTM32F405xx -DHAL_UART_MODULE_ENABLED -DBL_HID" - "SHELL:-DCUSTOM_PERIPHERAL_PINS" - "SHELL:" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" - -mcpu=${MICROMOD_F405_hid_MCU} -) -target_compile_definitions(MICROMOD_F405_hid INTERFACE - "STM32F4xx" - "ARDUINO_MICROMOD_F405" - "BOARD_NAME=\"MICROMOD_F405\"" - "BOARD_ID=MICROMOD_F405" - "VARIANT_H=\"variant_MICROMOD_F405.h\"" -) -target_include_directories(MICROMOD_F405_hid INTERFACE - ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F4xx - ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Inc - ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F4xx_HAL_Driver/Src - ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ - ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/gcc/ - ${MICROMOD_F405_hid_VARIANT_PATH} -) - -target_link_options(MICROMOD_F405_hid INTERFACE - "LINKER:--default-script=${MICROMOD_F405_hid_VARIANT_PATH}/ldscript.ld" - "LINKER:--defsym=LD_FLASH_OFFSET=0x4000" - "LINKER:--defsym=LD_MAX_SIZE=1048576" - "LINKER:--defsym=LD_MAX_DATA_SIZE=131072" - "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" - -mcpu=${MICROMOD_F405_hid_MCU} -) -target_link_libraries(MICROMOD_F405_hid INTERFACE - arm_cortexM4lf_math -) - - # MKR_SHARKY # ----------------------------------------------------------------------------- @@ -104645,6 +104600,91 @@ target_compile_options(RUMBA32_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# SFE_MMPB_STM32WB5MMG +# ----------------------------------------------------------------------------- + +set(SFE_MMPB_STM32WB5MMG_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WBxx/WB5MMGH") +set(SFE_MMPB_STM32WB5MMG_MAXSIZE 827392) +set(SFE_MMPB_STM32WB5MMG_MAXDATASIZE 196608) +set(SFE_MMPB_STM32WB5MMG_MCU cortex-m4) +set(SFE_MMPB_STM32WB5MMG_FPCONF "fpv4-sp-d16-hard") +add_library(SFE_MMPB_STM32WB5MMG INTERFACE) +target_compile_options(SFE_MMPB_STM32WB5MMG INTERFACE + "SHELL:-DSTM32WB5Mxx " + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${SFE_MMPB_STM32WB5MMG_MCU} +) +target_compile_definitions(SFE_MMPB_STM32WB5MMG INTERFACE + "STM32WBxx" + "ARDUINO_SFE_MMPB_STM32WB5MMG" + "BOARD_NAME=\"SFE_MMPB_STM32WB5MMG\"" + "BOARD_ID=SFE_MMPB_STM32WB5MMG" + "VARIANT_H=\"variant_SFE_MMPB_STM32WB5MMG.h\"" +) +target_include_directories(SFE_MMPB_STM32WB5MMG INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WBxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WBxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/ + ${SFE_MMPB_STM32WB5MMG_VARIANT_PATH} +) + +target_link_options(SFE_MMPB_STM32WB5MMG INTERFACE + "LINKER:--default-script=${SFE_MMPB_STM32WB5MMG_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_MAX_SIZE=827392" + "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${SFE_MMPB_STM32WB5MMG_MCU} +) +target_link_libraries(SFE_MMPB_STM32WB5MMG INTERFACE + arm_cortexM4lf_math +) + +add_library(SFE_MMPB_STM32WB5MMG_serial_disabled INTERFACE) +target_compile_options(SFE_MMPB_STM32WB5MMG_serial_disabled INTERFACE + "SHELL:" +) +add_library(SFE_MMPB_STM32WB5MMG_serial_generic INTERFACE) +target_compile_options(SFE_MMPB_STM32WB5MMG_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(SFE_MMPB_STM32WB5MMG_serial_none INTERFACE) +target_compile_options(SFE_MMPB_STM32WB5MMG_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(SFE_MMPB_STM32WB5MMG_usb_CDC INTERFACE) +target_compile_options(SFE_MMPB_STM32WB5MMG_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0034 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(SFE_MMPB_STM32WB5MMG_usb_CDCgen INTERFACE) +target_compile_options(SFE_MMPB_STM32WB5MMG_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0034 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(SFE_MMPB_STM32WB5MMG_usb_HID INTERFACE) +target_compile_options(SFE_MMPB_STM32WB5MMG_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x1B4F -DUSBD_PID=0x0034 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(SFE_MMPB_STM32WB5MMG_usb_none INTERFACE) +target_compile_options(SFE_MMPB_STM32WB5MMG_usb_none INTERFACE + "SHELL:" +) +add_library(SFE_MMPB_STM32WB5MMG_xusb_FS INTERFACE) +target_compile_options(SFE_MMPB_STM32WB5MMG_xusb_FS INTERFACE + "SHELL:" +) +add_library(SFE_MMPB_STM32WB5MMG_xusb_HS INTERFACE) +target_compile_options(SFE_MMPB_STM32WB5MMG_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(SFE_MMPB_STM32WB5MMG_xusb_HSFS INTERFACE) +target_compile_options(SFE_MMPB_STM32WB5MMG_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # Sparky_V1 # ----------------------------------------------------------------------------- diff --git a/tools/platformio/boards_remap.json b/tools/platformio/boards_remap.json index 1d7e86902e..9a622e4666 100644 --- a/tools/platformio/boards_remap.json +++ b/tools/platformio/boards_remap.json @@ -22,6 +22,7 @@ "robotdyn_blackpill_f303cc": "BLACKPILL_F303CC", "rumba32_f446ve": "RUMBA32", "sparkfun_micromod_stm32f405": "MICROMOD_F405", + "sparkfun_micromod_stm32wb5mmg": "SFE_MMPB_STM32WB5MMG", "sparky_v1": "SPARKY_F303CC", "steval_mksboxv1": "STEVAL_MKSBOX1V1", "stm32f4stamp": "GENERIC_F405RGTX", diff --git a/variants/STM32WBxx/WB5MMGH/CMakeLists.txt b/variants/STM32WBxx/WB5MMGH/CMakeLists.txt index 5b7d0109d2..b6bebde9ac 100644 --- a/variants/STM32WBxx/WB5MMGH/CMakeLists.txt +++ b/variants/STM32WBxx/WB5MMGH/CMakeLists.txt @@ -21,11 +21,11 @@ target_link_libraries(variant INTERFACE variant_usage) add_library(variant_bin STATIC EXCLUDE_FROM_ALL generic_clock.c PeripheralPins.c - PeripheralPins_STM32WB5MM_DK.c PeripheralPins_SFE_MMPB_STM32WB5MMG.c + PeripheralPins_STM32WB5MM_DK.c variant_generic.cpp - variant_STM32WB5MM_DK.cpp variant_SFE_MMPB_STM32WB5MMG.cpp + variant_STM32WB5MM_DK.cpp ) target_link_libraries(variant_bin PUBLIC variant_usage) From 53d057b7662c0c1157d4981d5a8f3d12e42d98f1 Mon Sep 17 00:00:00 2001 From: SFE-Brudnerd <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Wed, 7 Jun 2023 16:24:25 -0600 Subject: [PATCH 05/14] Fix for ASTYLE --- .../WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp | 25 ++++++++----------- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp index 08dce7e9e6..7721dd3b0e 100644 --- a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp +++ b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.cpp @@ -100,8 +100,8 @@ void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSI - |RCC_OSCILLATORTYPE_LSI1|RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI + | RCC_OSCILLATORTYPE_LSI1 | RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; @@ -114,16 +114,15 @@ void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4; RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - { + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2 - |RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2 + | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; @@ -131,28 +130,26 @@ void SystemClock_Config(void) RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV2; RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) - { + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) { Error_Handler(); } /** Initializes the peripherals clock */ - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RFWAKEUP - |RCC_PERIPHCLK_SAI1|RCC_PERIPHCLK_ADC; + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS | RCC_PERIPHCLK_RFWAKEUP + | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_ADC; PeriphClkInitStruct.PLLSAI1.PLLN = 24; PeriphClkInitStruct.PLLSAI1.PLLP = RCC_PLLP_DIV3; PeriphClkInitStruct.PLLSAI1.PLLQ = RCC_PLLQ_DIV3; PeriphClkInitStruct.PLLSAI1.PLLR = RCC_PLLR_DIV3; - PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_SAI1CLK|RCC_PLLSAI1_ADCCLK; + PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_SAI1CLK | RCC_PLLSAI1_ADCCLK; PeriphClkInitStruct.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLLSAI1; PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_HSE_DIV1024; PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSI; PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE0; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - { + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { Error_Handler(); } LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA); From 1b041116c54bbede14aebc4fd2b9765fcd2af21e Mon Sep 17 00:00:00 2001 From: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Thu, 8 Jun 2023 10:12:49 -0600 Subject: [PATCH 06/14] Update README.md Co-authored-by: Frederic Pillon Signed-off-by: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> --- README.md | 2 -- 1 file changed, 2 deletions(-) diff --git a/README.md b/README.md index 387c44a78b..20a5961a31 100644 --- a/README.md +++ b/README.md @@ -82,8 +82,6 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d - [LoRa boards](#lora-boards) - [Midatronics boards](#midatronics-boards) - [SparkFun boards](#sparkfun-boards) -- [Next release](#next-release) -- [Troubleshooting](#troubleshooting) ### [Nucleo 144](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-nucleo-boards.html) boards From 8a7215cb69c09a782a09fd6405b4bfbb197d1f80 Mon Sep 17 00:00:00 2001 From: SFE-Brudnerd <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Thu, 8 Jun 2023 11:42:10 -0600 Subject: [PATCH 07/14] Update README.md Add space to ToC that was mistakenly removed. Readded pipe that was mistakenly removed. --- README.md | 68 +++++++++++++++++++++++++++---------------------------- 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/README.md b/README.md index 20a5961a31..ddad8b2ed2 100644 --- a/README.md +++ b/README.md @@ -49,39 +49,39 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d ## Supported boards -- [Nucleo 144 boards](#nucleo-144-boards) -- [Nucleo 64 boards](#nucleo-64-boards) -- [Nucleo 32 boards](#nucleo-32-boards) -- [Discovery boards](#discovery-boards) -- [Eval boards](#eval-boards) -- [STM32MP1 series coprocessor boards](#stm32mp1-series-coprocessor-boards) -- [Generic STM32C0 boards](#generic-stm32c0-boards) -- [Generic STM32F0 boards](#generic-stm32f0-boards) -- [Generic STM32F1 boards](#generic-stm32f1-boards) -- [Generic STM32F2 boards](#generic-stm32f2-boards) -- [Generic STM32F3 boards](#generic-stm32f3-boards) -- [Generic STM32F4 boards](#generic-stm32f4-boards) -- [Generic STM32F7 boards](#generic-stm32f7-boards) -- [Generic STM32G0 boards](#generic-stm32g0-boards) -- [Generic STM32G4 boards](#generic-stm32g4-boards) -- [Generic STM32H5 boards](#generic-stm32h5-boards) -- [Generic STM32H7 boards](#generic-stm32h7-boards) -- [Generic STM32L0 boards](#generic-stm32l0-boards) -- [Generic STM32L1 boards](#generic-stm32l1-boards) -- [Generic STM32L4 boards](#generic-stm32l4-boards) -- [Generic STM32L5 boards](#generic-stm32l5-boards) -- [Generic STM32U5 boards](#generic-stm32u5-boards) -- [Generic STM32WB boards](#generic-stm32wb-boards) -- [Generic STM32WL boards](#generic-stm32wl-boards) -- [3D printer boards](#3d-printer-boards) -- [Blues Wireless boards](#blues-wireless-boards) -- [Elecgator boards](#elecgator-boards) -- [Electronic Speed Controller boards](#electronic-speed-controller-boards) -- [Garatronic/McHobby boards](#garatronicmchobby-boards) -- [Generic flight controllers](#generic-flight-controllers) -- [LoRa boards](#lora-boards) -- [Midatronics boards](#midatronics-boards) -- [SparkFun boards](#sparkfun-boards) + - [Nucleo 144 boards](#nucleo-144-boards) + - [Nucleo 64 boards](#nucleo-64-boards) + - [Nucleo 32 boards](#nucleo-32-boards) + - [Discovery boards](#discovery-boards) + - [Eval boards](#eval-boards) + - [STM32MP1 series coprocessor boards](#stm32mp1-series-coprocessor-boards) + - [Generic STM32C0 boards](#generic-stm32c0-boards) + - [Generic STM32F0 boards](#generic-stm32f0-boards) + - [Generic STM32F1 boards](#generic-stm32f1-boards) + - [Generic STM32F2 boards](#generic-stm32f2-boards) + - [Generic STM32F3 boards](#generic-stm32f3-boards) + - [Generic STM32F4 boards](#generic-stm32f4-boards) + - [Generic STM32F7 boards](#generic-stm32f7-boards) + - [Generic STM32G0 boards](#generic-stm32g0-boards) + - [Generic STM32G4 boards](#generic-stm32g4-boards) + - [Generic STM32H5 boards](#generic-stm32h5-boards) + - [Generic STM32H7 boards](#generic-stm32h7-boards) + - [Generic STM32L0 boards](#generic-stm32l0-boards) + - [Generic STM32L1 boards](#generic-stm32l1-boards) + - [Generic STM32L4 boards](#generic-stm32l4-boards) + - [Generic STM32L5 boards](#generic-stm32l5-boards) + - [Generic STM32U5 boards](#generic-stm32u5-boards) + - [Generic STM32WB boards](#generic-stm32wb-boards) + - [Generic STM32WL boards](#generic-stm32wl-boards) + - [3D printer boards](#3d-printer-boards) + - [Blues Wireless boards](#blues-wireless-boards) + - [Elecgator boards](#elecgator-boards) + - [Electronic Speed Controller boards](#electronic-speed-controller-boards) + - [Garatronic/McHobby boards](#garatronicmchobby-boards) + - [Generic flight controllers](#generic-flight-controllers) + - [LoRa boards](#lora-boards) + - [Midatronics boards](#midatronics-boards) + - [SparkFun boards](#sparkfun-boards) ### [Nucleo 144](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-nucleo-boards.html) boards @@ -324,7 +324,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | Status | Device(s) | Name | Release | Notes | | :----: | :-------: | ---- | :-----: | :---- | -| :green_heart: | STM32F405RG | [Adafruit Feather STM32F405 Express](https://www.adafruit.com/product/4382) | *1.8.0* | +| :green_heart: | STM32F405RG | [Adafruit Feather STM32F405 Express](https://www.adafruit.com/product/4382) | *1.8.0* | | | :green_heart: | STM32F401CC | [WeAct Black Pill](https://stm32-base.org/boards/STM32F401CCU6-WeAct-Black-Pill-V1.2) | *1.7.0* | [More info](https://github.com/WeActStudio/WeActStudio.MiniSTM32F4x1) | | :green_heart: | STM32F401CE | [WeAct Black Pill](https://stm32-base.org/boards/STM32F401CEU6-WeAct-Black-Pill-V3.0) | *2.4.0* | [More info](https://github.com/WeActStudio/WeActStudio.MiniSTM32F4x1) | | :green_heart: | STM32F411CE | [WeAct Black Pill](https://stm32-base.org/boards/STM32F411CEU6-WeAct-Black-Pill-V2.0) | *1.9.0* | [More info](https://github.com/WeActStudio/WeActStudio.MiniSTM32F4x1) | From 20e46ad8edfb20ccc88a48e1cbbbf5f109625385 Mon Sep 17 00:00:00 2001 From: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Fri, 9 Jun 2023 08:53:43 -0600 Subject: [PATCH 08/14] Update boards.txt Co-authored-by: Frederic Pillon Signed-off-by: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> --- boards.txt | 1 - 1 file changed, 1 deletion(-) diff --git a/boards.txt b/boards.txt index 9a60b2d551..194289e2da 100644 --- a/boards.txt +++ b/boards.txt @@ -10843,7 +10843,6 @@ SparkFun.upload.maximum_data_size=0 # SFE_MMPB_STM32WB5MMG board SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG=SparkFun MicroMod STM32WB5MMG -SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.node=NODE_WB5MMG SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.upload.maximum_size=827392 SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.upload.maximum_data_size=196608 SparkFun.menu.pnum.SFE_MMPB_STM32WB5MMG.build.mcu=cortex-m4 From 98df03099c95ddafed0ce81f8e6ab3c4e6fb41ea Mon Sep 17 00:00:00 2001 From: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Fri, 9 Jun 2023 08:54:04 -0600 Subject: [PATCH 09/14] Update boards.txt Co-authored-by: Frederic Pillon Signed-off-by: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> --- boards.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/boards.txt b/boards.txt index 194289e2da..3f7b9a01b6 100644 --- a/boards.txt +++ b/boards.txt @@ -10838,6 +10838,7 @@ SparkFun.build.core=arduino SparkFun.build.board=SparkFun SparkFun.build.variant_h=variant_{build.board}.h SparkFun.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} +SparkFun.build.flash_offset=0x0 SparkFun.upload.maximum_size=0 SparkFun.upload.maximum_data_size=0 From 83cbc22671eea40dfbe29009e8626b8db6a14692 Mon Sep 17 00:00:00 2001 From: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Fri, 9 Jun 2023 08:54:15 -0600 Subject: [PATCH 10/14] Update boards.txt Co-authored-by: Frederic Pillon Signed-off-by: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> --- boards.txt | 1 - 1 file changed, 1 deletion(-) diff --git a/boards.txt b/boards.txt index 3f7b9a01b6..c27bcfda3d 100644 --- a/boards.txt +++ b/boards.txt @@ -10872,7 +10872,6 @@ SparkFun.menu.pnum.MICROMOD_F405.build.variant_h=variant_{build.board}.h SparkFun.menu.pnum.MICROMOD_F405.build.variant=STM32F4xx/F405RGT_F415RGT SparkFun.menu.pnum.MICROMOD_F405.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS SparkFun.menu.pnum.MICROMOD_F405.build.cmsis_lib_gcc=arm_cortexM4lf_math -SparkFun.menu.pnum.MICROMOD_F405.build.flash_offset=0x0 SparkFun.menu.pnum.MICROMOD_F405.build.vid=0x1B4F SparkFun.menu.pnum.MICROMOD_F405.build.pid=0x0029 From 363777006b6f80508a509d0927ad966ef5ebc824 Mon Sep 17 00:00:00 2001 From: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Fri, 9 Jun 2023 08:56:42 -0600 Subject: [PATCH 11/14] Update variants/STM32WBxx/WB5MMGH/PeripheralPins_SFE_MMPB_STM32WB5MMG.c Co-authored-by: Frederic Pillon Signed-off-by: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> --- .../STM32WBxx/WB5MMGH/PeripheralPins_SFE_MMPB_STM32WB5MMG.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/STM32WBxx/WB5MMGH/PeripheralPins_SFE_MMPB_STM32WB5MMG.c b/variants/STM32WBxx/WB5MMGH/PeripheralPins_SFE_MMPB_STM32WB5MMG.c index c80a4d1671..9bf8d80806 100644 --- a/variants/STM32WBxx/WB5MMGH/PeripheralPins_SFE_MMPB_STM32WB5MMG.c +++ b/variants/STM32WBxx/WB5MMGH/PeripheralPins_SFE_MMPB_STM32WB5MMG.c @@ -288,4 +288,4 @@ WEAK const PinMap PinMap_USB[] = { //*** No SD *** -#endif /* !CUSTOM_PERIPHERAL_PINS */ +#endif /* ARDUINO_SFE_MMPB_STM32WB5MMG */ From 4df00371e024e110de011ee5b5a1ec49259cbf46 Mon Sep 17 00:00:00 2001 From: SFE-Brudnerd <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Fri, 9 Jun 2023 10:20:20 -0600 Subject: [PATCH 12/14] Change offset to 0x0 --- cmake/boards_db.cmake | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake index 94597b501d..62c08b18cb 100644 --- a/cmake/boards_db.cmake +++ b/cmake/boards_db.cmake @@ -104634,7 +104634,7 @@ target_include_directories(SFE_MMPB_STM32WB5MMG INTERFACE target_link_options(SFE_MMPB_STM32WB5MMG INTERFACE "LINKER:--default-script=${SFE_MMPB_STM32WB5MMG_VARIANT_PATH}/ldscript.ld" - "LINKER:--defsym=LD_FLASH_OFFSET=0" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" "LINKER:--defsym=LD_MAX_SIZE=827392" "LINKER:--defsym=LD_MAX_DATA_SIZE=196608" "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" From 413106b38df8debd6f1ff091a9a98d37b5c0fe09 Mon Sep 17 00:00:00 2001 From: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> Date: Mon, 12 Jun 2023 08:34:16 -0600 Subject: [PATCH 13/14] Update README.md Co-authored-by: Frederic Pillon Signed-off-by: Alex Brudner <101155592+SFE-Brudnerd@users.noreply.github.com> --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index ddad8b2ed2..6aa3174ead 100644 --- a/README.md +++ b/README.md @@ -779,7 +779,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | Status | Device(s) | Name | Release | Notes | | :----: | :-------: | ---- | :-----: | :---- | | :yellow_heart: | STM32F405RG | [SparkFun MicroMod Processor Board - STM32F405](https://www.sparkfun.com/products/21326) | **2.6.0** | | -| :yellow_heart: | STM32WB5MMG | [SparkFun MicroMod Processor Board - STM32WB5MMG](https://www.sparkfun.com/products/21438) | **2.6.0** | | +| :yellow_heart: | STM32WB5MMG | SparkFun MicroMod Processor Board - STM32WB5MMG | **2.6.0** | | ## Next release From c6649b62a46f0a46eb976e965f2f6ab3d6f2a934 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Wed, 14 Jun 2023 11:20:39 +0200 Subject: [PATCH 14/14] Update variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h Signed-off-by: Frederic Pillon --- variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h index 457c7fd7fb..73ed69ce00 100644 --- a/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h +++ b/variants/STM32WBxx/WB5MMGH/variant_SFE_MMPB_STM32WB5MMG.h @@ -129,7 +129,7 @@ // UART Definitions #ifndef SERIAL_UART_INSTANCE - #define SERIAL_UART_INSTANCE 101 + #define SERIAL_UART_INSTANCE 1 #endif // Default pin used for generic 'Serial' instance