@@ -1110,11 +1110,23 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
11101110 // ORR is sufficient, it is assumed a Swift kernel would initialize the TBI
11111111 // bits so that is still true.
11121112 if (HasFP && AFI->hasSwiftAsyncContext ()) {
1113- // ORR x29, x29, #0x1000_0000_0000_0000
1114- BuildMI (MBB, MBBI, DL, TII->get (AArch64::ORRXri), AArch64::FP)
1115- .addUse (AArch64::FP)
1116- .addImm (0x1100 )
1117- .setMIFlag (MachineInstr::FrameSetup);
1113+ if (Subtarget.swiftAsyncContextIsDynamicallySet ()) {
1114+ // The special symbol below is absolute and has a *value* that can be
1115+ // combined with the frame pointer to signal an extended frame.
1116+ BuildMI (MBB, MBBI, DL, TII->get (AArch64::LOADgot), AArch64::X16)
1117+ .addExternalSymbol (" swift_async_extendedFramePointerFlags" ,
1118+ AArch64II::MO_GOT);
1119+ BuildMI (MBB, MBBI, DL, TII->get (AArch64::ORRXrs), AArch64::FP)
1120+ .addUse (AArch64::FP)
1121+ .addUse (AArch64::X16)
1122+ .addImm (Subtarget.isTargetILP32 () ? 32 : 0 );
1123+ } else {
1124+ // ORR x29, x29, #0x1000_0000_0000_0000
1125+ BuildMI (MBB, MBBI, DL, TII->get (AArch64::ORRXri), AArch64::FP)
1126+ .addUse (AArch64::FP)
1127+ .addImm (0x1100 )
1128+ .setMIFlag (MachineInstr::FrameSetup);
1129+ }
11181130 }
11191131
11201132 // All calls are tail calls in GHC calling conv, and functions have no
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