From 8cf6778d3040b33db768bb7542630d9820a72e28 Mon Sep 17 00:00:00 2001 From: Alex Richardson Date: Mon, 21 Sep 2020 08:59:22 +0100 Subject: [PATCH] [RISC-V] Implement RISCVInstrInfo::isCopyInstrImpl() This does not result in changes for any of the current tests, but it might improve debug information in some cases. Reviewed By: luismarques Differential Revision: https://reviews.llvm.org/D86522 --- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 24 +++++++++++++++++++++++- llvm/lib/Target/RISCV/RISCVInstrInfo.h | 3 +++ 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp index 249264d1945f..57ce933075a8 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp @@ -517,7 +517,7 @@ bool RISCVInstrInfo::isAsCheapAsAMove(const MachineInstr &MI) const { break; case RISCV::FSGNJ_D: case RISCV::FSGNJ_S: - // The canonical floatig-point move is fsgnj rd, rs, rs. + // The canonical floating-point move is fsgnj rd, rs, rs. return MI.getOperand(1).isReg() && MI.getOperand(2).isReg() && MI.getOperand(1).getReg() == MI.getOperand(2).getReg(); case RISCV::ADDI: @@ -530,6 +530,28 @@ bool RISCVInstrInfo::isAsCheapAsAMove(const MachineInstr &MI) const { return MI.isAsCheapAsAMove(); } +Optional +RISCVInstrInfo::isCopyInstrImpl(const MachineInstr &MI) const { + if (MI.isMoveReg()) + return DestSourcePair{MI.getOperand(0), MI.getOperand(1)}; + switch (MI.getOpcode()) { + default: + break; + case RISCV::ADDI: + if (MI.getOperand(2).isImm() && MI.getOperand(2).getImm() == 0) + return DestSourcePair{MI.getOperand(0), MI.getOperand(1)}; + break; + case RISCV::FSGNJ_D: + case RISCV::FSGNJ_S: + // The canonical floating-point move is fsgnj rd, rs, rs. + if (MI.getOperand(1).isReg() && MI.getOperand(2).isReg() && + MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) + return DestSourcePair{MI.getOperand(0), MI.getOperand(1)}; + break; + } + return None; +} + bool RISCVInstrInfo::verifyInstruction(const MachineInstr &MI, StringRef &ErrInfo) const { const MCInstrInfo *MCII = STI.getInstrInfo(); diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.h b/llvm/lib/Target/RISCV/RISCVInstrInfo.h index cd8b6d5fba59..180a3e88bc8f 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.h +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.h @@ -83,6 +83,9 @@ class RISCVInstrInfo : public RISCVGenInstrInfo { bool isAsCheapAsAMove(const MachineInstr &MI) const override; + Optional + isCopyInstrImpl(const MachineInstr &MI) const override; + bool verifyInstruction(const MachineInstr &MI, StringRef &ErrInfo) const override;