Open Source Verilog Simulator with This

[coder-humbitious]

Hi Taichi,

I was searching for open-source AXI BFMs and landed onto your repository on github. This and your rggen is awesome piece of work and is very helpful. A big thank you to you for putting your hard work up there.

I am trying to use the verification elements for an all-AXI 2x3 switch where both the sides operate on AXI3/4.(I I've got experience in building backbones (AXI/APB/AHB etc) and worked on Vcs/NCVerilog before.)

I am trying to explore it more and trying to see how we can use it. I've got some questions about it -

1. Is it likely to work with iVerilog or Verilator or SV-Parser etc open-source Verilog simulators. There are VCS and Xcellium make files but we don't have those tools. Have you ever tried it. We gona try fresh, but in case you already know of issues here.

2. Will we able to use in an axi-switch verification environment...? In such a testbench, we need 2 AXI master BFMs, 3 AXI slave BFMs, protocol monitors and checkers and transactors plus testcases.
   There are plenty of tasks and functions in the code and we are trying to read through and unwind them. But without a arch/document and the components, it's taking us some time. Hence the question.

Regards.

[taichi-ishitani]

Hi @coder-humbitious ,

Thank you for focusing on my AXI BFM !

Followings are answers for your questions.

Is it likely to work with iVerilog or Verilator or SV-Parser etc open-source Verilog simulators.

I think there are no OSS simulators supporting my AXI BFM because my AXI BFM is built on UVM (Universal Verification Methodology; industry standard platform to build testbenches written in SystemVerilog). To use my AXI BFM and UVM, commercial simulators, such as VCS and Xcelium are needed.

There are two ways to use simulators supporting UVM;

1. Use EDA Playground. You can use the latest VCS without a fee on this side. But there are some limitations like run time, I think.
2. Use the latest Vivado simulator. From version 2019.2, Vivado simulator supports UVM and I think you can use this simulator without a fee. However, I have not yet used this simulator so I don't know if my AXI BFM works with this simulator.

Will we able to use in an axi-switch verification environment...?

Maybe yes. I use my AXI BFM to verify my NoC fabric. You can refer the testbench for my NoC fabric to create your AXI switch. Following links are to the testbench and testcases implementations.
https://github.com/taichi-ishitani/tnoc/tree/master/env/axi_adapter
https://github.com/taichi-ishitani/tnoc/tree/master/test/axi_adapter

we are trying to read through and unwind them

You only have to read following source files because these are implementing user interface.

• Interface to connect DUT
  • https://github.com/taichi-ishitani/tvip-axi/blob/master/src/tvip_axi_if.sv
• User interface to create stimulus and to get monitored transactions
  • https://github.com/taichi-ishitani/tvip-axi/blob/master/src/tvip_axi_item.svh
  • https://github.com/taichi-ishitani/tvip-axi/blob/master/src/tvip_axi_master_access_sequence.svh
  • https://github.com/taichi-ishitani/tvip-axi/blob/master/src/tvip_axi_master_write_sequence.svh
  • https://github.com/taichi-ishitani/tvip-axi/blob/master/src/tvip_axi_master_read_sequence.svh
  • https://github.com/taichi-ishitani/tvip-axi/blob/master/src/tvip_axi_slave_default_sequence.svh

You're welcome to ask any questions !