From 649eceae4cf2a22d2b5d210278cad192f788ca6c Mon Sep 17 00:00:00 2001 From: "Ben L. Titzer" Date: Tue, 6 Feb 2024 20:35:55 -0500 Subject: [PATCH] [arm64] Factor out unimplemented errors --- aeneas/src/arm64/Arm64Backend.v3 | 35 +++++++++---------------- aeneas/src/arm64/Arm64MacroAssembler.v3 | 7 +++-- aeneas/src/arm64/SsaArm64Gen.v3 | 26 +++++++++--------- aeneas/src/mach/MachProgram.v3 | 2 +- aeneas/src/main/Error.v3 | 3 +++ aeneas/src/main/Version.v3 | 2 +- aeneas/src/ssa/SsaContext.v3 | 3 +++ 7 files changed, 39 insertions(+), 39 deletions(-) diff --git a/aeneas/src/arm64/Arm64Backend.v3 b/aeneas/src/arm64/Arm64Backend.v3 index 48076d9b2..969ef4435 100644 --- a/aeneas/src/arm64/Arm64Backend.v3 +++ b/aeneas/src/arm64/Arm64Backend.v3 @@ -18,24 +18,21 @@ class Arm64Target extends Target { def configureCompiler(compiler: Compiler) {} def configureProgram(prog: Program) { - prog.ERROR.fail("not implemented"); + prog.ERROR.unimplemented(); } - def computeFieldOffsets(prog: Program, b: Vector, start: int) { - prog.ERROR.fail("not implemented"); + prog.ERROR.unimplemented(); } def addRoots(compiler: Compiler, prog: Program) { - prog.ERROR.fail("not implemented"); + prog.ERROR.unimplemented(); } - def emit(compiler: Compiler, prog: Program) { - prog.ERROR.fail("not implemented"); + prog.ERROR.unimplemented(); } } -// TODO: negative object headers class Arm64Backend extends MachBackend { - var asm: Arm64MacroAssembler; // TODO + var asm: Arm64MacroAssembler; def test: bool; var codegen: SsaArm64Gen; var allocateRegs: void -> void; @@ -54,7 +51,7 @@ class Arm64Backend extends MachBackend { asm = Arm64MacroAssembler.new(); if (ri_gc != null) { // call the RiRuntime.gc() method - mach.fail("not implemented"); + prog.ERROR.unimplemented(); } else { // there is no appropriate RiRuntime.gc() method objReg = Arm64Regs.R0; @@ -67,29 +64,23 @@ class Arm64Backend extends MachBackend { } // Override MachBackend - def genEntryStub() { - mach.fail("not implemented"); + prog.ERROR.unimplemented(); } - def genAllocStub() { - mach.fail("not implemented"); + prog.ERROR.unimplemented(); } - def genCodeFromSsa() { - mach.fail("not implemented"); + prog.ERROR.unimplemented(); } - def patchCodeAddr(w: DataWriter, a: Addr, posAddr: int) { - mach.fail("not implemented"); + prog.ERROR.unimplemented(); } - def genSignalHandlerStub() { - mach.fail("not implemented"); + prog.ERROR.unimplemented(); } - def genFatalStub(ex: string, addr: Addr) { - mach.fail("not implemented"); + prog.ERROR.unimplemented(); } // Methods overridden for each OS target @@ -97,4 +88,4 @@ class Arm64Backend extends MachBackend { def asm_exit_r(r: X86_64Gpr); def asm_exit_code(code: int); def genTestOutput(main: IrMethod, frame: MachFrame); -} \ No newline at end of file +} diff --git a/aeneas/src/arm64/Arm64MacroAssembler.v3 b/aeneas/src/arm64/Arm64MacroAssembler.v3 index 231ce2954..be90f6fd7 100644 --- a/aeneas/src/arm64/Arm64MacroAssembler.v3 +++ b/aeneas/src/arm64/Arm64MacroAssembler.v3 @@ -1,5 +1,8 @@ // Copyright 2024 Virgil Authors. All rights reserved. // See LICENSE for details of Apache 2.0 license. -// TODO -class Arm64MacroAssembler extends Arm64Assembler {} \ No newline at end of file +// An extended Arm64Assembler that has additional machine-level utilities, such as +// recording patch locations and translating between regset locations and arm64 +// registers/memory. +class Arm64MacroAssembler extends Arm64Assembler { +} diff --git a/aeneas/src/arm64/SsaArm64Gen.v3 b/aeneas/src/arm64/SsaArm64Gen.v3 index a07ae65fc..5c9ac6a32 100644 --- a/aeneas/src/arm64/SsaArm64Gen.v3 +++ b/aeneas/src/arm64/SsaArm64Gen.v3 @@ -6,9 +6,9 @@ def Conds: Arm64Conds; // TODO // Code generation for the Arm64 backend class SsaArm64Gen extends SsaMachGen { - def asm: Arm64MacroAssembler; // TODO + def asm: Arm64MacroAssembler; def m = SsaInstrMatcher.new(); - def dwarf: Dwarf; // What is this? + def dwarf: Dwarf; new(context: SsaContext, mach: MachProgram, asm, w: MachDataWriter, dwarf) super(context, mach, Arm64RegSet.SET, w) {} @@ -16,25 +16,25 @@ class SsaArm64Gen extends SsaMachGen { // Overidden Architecture Specific Routines def visitApply(block: SsaBlock, i: SsaApplyOp) { match (i.op.opcode) { - _ => context.fail("not implemented"); // TODO + _ => context.unimplemented(); // TODO } } - def visitThrow(block: SsaBlock, i: SsaThrow) { context.fail("not implemented"); } - def visitIf(block: SsaBlock, i: SsaIf) { context.fail("not implemented"); } - def visitSwitch(block: SsaBlock, i: SsaSwitch) { context.fail("not implemented"); } - def visitGoto(block: SsaBlock, target: SsaGoto) { context.fail("not implemented"); } + def visitThrow(block: SsaBlock, i: SsaThrow) { context.unimplemented(); } + def visitIf(block: SsaBlock, i: SsaIf) { context.unimplemented(); } + def visitSwitch(block: SsaBlock, i: SsaSwitch) { context.unimplemented(); } + def visitGoto(block: SsaBlock, target: SsaGoto) { context.unimplemented(); } // Override Code Generation def assemble(opcode: int, x: Array) { - context.fail("not implemented"); + context.unimplemented(); } // Regalloc callbacks to add moves - def genSaveLocal(reg: int, v: VReg) { context.fail("not implemented"); } - def genRestoreLocal(v: VReg, reg: int) { context.fail("not implemented"); } - def genMoveLocLoc(src: (VReg, int), dst: (VReg, int), regClass: RegClass) { context.fail("not implemented"); } + def genSaveLocal(reg: int, v: VReg) { context.unimplemented(); } + def genRestoreLocal(v: VReg, reg: int) { context.unimplemented(); } + def genMoveLocLoc(src: (VReg, int), dst: (VReg, int), regClass: RegClass) { context.unimplemented(); } // Register allocation callback to prepend a move - def genMoveValLoc(src: VReg, dst: (VReg, int), regClass: RegClass) { context.fail("not implemented"); } -} \ No newline at end of file + def genMoveValLoc(src: VReg, dst: (VReg, int), regClass: RegClass) { context.unimplemented(); } +} diff --git a/aeneas/src/mach/MachProgram.v3 b/aeneas/src/mach/MachProgram.v3 index 37ea00f71..eccacd923 100644 --- a/aeneas/src/mach/MachProgram.v3 +++ b/aeneas/src/mach/MachProgram.v3 @@ -333,7 +333,7 @@ class MachProgram extends TargetProgram { if (region.space.bigEndian) w.put_b64be(a.get()); else w.put_b64(a.get()); } - else return prog.ERROR.fail("unexpected data item in region"); + else return fail("unexpected data item in region"); } def encodeField(w: DataWriter, f: IrField) { // encode a component's field at the address diff --git a/aeneas/src/main/Error.v3 b/aeneas/src/main/Error.v3 index cbcb4f828..345d3978f 100644 --- a/aeneas/src/main/Error.v3 +++ b/aeneas/src/main/Error.v3 @@ -95,6 +95,9 @@ class ErrorGen(maxErrors: int) { if (errorType != null) return errorType; return errorType = getErrorTypeCon("?").create0(); } + def unimplemented() { + fail("not implemented"); + } def fail(msg: string) { if (CLOptions.FATAL.get()) return V3.fail(msg); addError(null, null, V3Exception.InternalError, msg); diff --git a/aeneas/src/main/Version.v3 b/aeneas/src/main/Version.v3 index a7bf94b22..0dcc01069 100644 --- a/aeneas/src/main/Version.v3 +++ b/aeneas/src/main/Version.v3 @@ -3,6 +3,6 @@ // Updated by VCS scripts. DO NOT EDIT. component Version { - def version: string = "III-7.1685"; + def version: string = "III-7.1686"; var buildData: string; } diff --git a/aeneas/src/ssa/SsaContext.v3 b/aeneas/src/ssa/SsaContext.v3 index ba32c9b41..06490c7ae 100644 --- a/aeneas/src/ssa/SsaContext.v3 +++ b/aeneas/src/ssa/SsaContext.v3 @@ -20,6 +20,9 @@ class SsaContext(compiler: Compiler, prog: Program) { graph = if(m != null, m.ssa); block = if(graph != null, graph.startBlock); } + def unimplemented() { + fail("not implemented"); + } def fail(msg: string) { // XXX: render SSA of failing method/block by default? prog.ERROR.fail(where().puts(msg).toString());