From 5e03ceb84f5486dfdadeab5d091765be021db7f8 Mon Sep 17 00:00:00 2001 From: John Wright Date: Tue, 12 Feb 2019 10:55:34 -0800 Subject: [PATCH] Don't run DCE && Profit --- macros/src/main/scala/MacroCompiler.scala | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/macros/src/main/scala/MacroCompiler.scala b/macros/src/main/scala/MacroCompiler.scala index 9e0c72ed..c12560a9 100644 --- a/macros/src/main/scala/MacroCompiler.scala +++ b/macros/src/main/scala/MacroCompiler.scala @@ -13,6 +13,7 @@ import firrtl.ir._ import firrtl.PrimOps import firrtl.Utils._ import firrtl.annotations._ +import firrtl.transforms.{NoDCEAnnotation} import firrtl.CompilerUtils.getLoweringTransforms import mdf.macrolib.{PolarizedPort, PortPolarity} import scala.collection.mutable.{ArrayBuffer, HashMap} @@ -46,11 +47,6 @@ object MacroCompilerAnnotation { /** CompileAvailable - compile what is possible and do nothing with uncompiled memories. **/ case object CompileAvailable extends CompilerMode - /** - * The default mode for the macro compiler. - * TODO: Maybe set the default to FallbackSynflops (typical for - * vlsi_mem_gen-like scripts) once it's implemented? - */ val Default = CompileAvailable // Options as list of (CompilerMode, command-line name, description) @@ -764,7 +760,8 @@ object MacroCompiler extends App { ) )) ) - val state = CircuitState(circuit, HighForm, annotations) + // Append a NoDCEAnnotation to avoid dead code elimination removing the non-parent SRAMs + val state = CircuitState(circuit, HighForm, annotations :+ NoDCEAnnotation) // Run the compiler. val result = new MacroCompiler().compileAndEmit(state)