diff --git a/generators/firechip/src/main/scala/TargetConfigs.scala b/generators/firechip/src/main/scala/TargetConfigs.scala index c6402a7128..c74803c41f 100644 --- a/generators/firechip/src/main/scala/TargetConfigs.scala +++ b/generators/firechip/src/main/scala/TargetConfigs.scala @@ -139,6 +139,26 @@ class WithMinimalFireSimHighPerfConfigTweaks extends Config( new WithMinimalFireSimDesignTweaks ) +/** + * Adds BlockDevice to WithMinimalFireSimHighPerfConfigTweaks + */ +class WithMinimalAndBlockDeviceFireSimHighPerfConfigTweaks extends Config( + new WithFireSimHighPerfClocking ++ + new freechips.rocketchip.subsystem.WithNoMemPort ++ // removes mem port for FASEDBridge to match against + new testchipip.WithBackingScratchpad ++ // adds backing scratchpad for memory to replace FASED model + new testchipip.WithBlockDevice(true) ++ // add in block device + new WithMinimalFireSimDesignTweaks +) + +/** + * Adds Block device to WithMinimalFireSimHighPerfConfigTweaks + */ +class WithMinimalAndFASEDFireSimHighPerfConfigTweaks extends Config( + new WithFireSimHighPerfClocking ++ + new WithDefaultMemModel ++ // add default FASED memory model + new WithMinimalFireSimDesignTweaks +) + // Tweaks for legacy FireSim configs. class WithFireSimHighPerfConfigTweaks extends Config( new WithFireSimHighPerfClocking ++