Vector extension simx without testcases

.github/workflows/ci.yml

@@ -117,7 +117,7 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        name: [regression, opencl, cache, config1, config2, debug, scope, stress, synthesis, vm]
+        name: [regression, opencl, cache, config1, config2, debug, scope, stress, synthesis, vm, vector]
         xlen: [32, 64]
 
     steps:

.gitignore

@@ -2,3 +2,4 @@
 /.vscode
 *.cache
 *.code-workspace
+*.DS_store

.gitmodules

@@ -7,3 +7,6 @@
 [submodule "third_party/cvfpu"]
 	path = third_party/cvfpu
 	url = https://github.com/openhwgroup/cvfpu.git
+[submodule "third_party/riscv-vector-tests"]
+	path = third_party/riscv-vector-tests
+	url = https://github.com/ksco/riscv-vector-tests.git

ci/regression.sh.in

@@ -386,10 +386,20 @@ synthesis()
     echo "synthesis tests done!"
 }
 
+vector()
+{
+    echo "begin vector tests..."
+
+    make -C sim/simx
+    TOOLDIR=@TOOLDIR@ XLEN=@XLEN@ VLEN=256 REG_TESTS=1 ./tests/riscv/riscv-vector-tests/run-test.sh
+
+    echo "vector tests done!"
+}
+
 show_usage()
 {
     echo "Vortex Regression Test"
-    echo "Usage: $0 [--clean] [--unittest] [--isa] [--kernel] [--regression] [--opencl] [--cache] [--config1] [--config2] [--debug] [--scope] [--stress] [--synthesis] [--all] [--h|--help]"
+    echo "Usage: $0 [--clean] [--unittest] [--isa] [--kernel] [--regression] [--opencl] [--cache] [--config1] [--config2] [--debug] [--scope] [--stress] [--synthesis] [--vector] [--all] [--h|--help]"
 }
 
 declare -a tests=()
@@ -439,6 +449,9 @@ while [ "$1" != "" ]; do
         --synthesis )
                 tests+=("synthesis")
                 ;;
+        --vector )
+                tests+=("vector")
+                ;;
         --all )
                 tests=()
                 tests+=("unittest")
@@ -454,6 +467,7 @@ while [ "$1" != "" ]; do
                 tests+=("scope")
                 tests+=("stress")
                 tests+=("synthesis")
+                tests+=("vector")
                 ;;
         -h | --help )
                 show_usage

hw/rtl/VX_config.vh

@@ -87,6 +87,10 @@
 `endif
 `endif
 
+`ifndef VLEN
+`define VLEN 256
+`endif
+
 `ifndef NUM_CLUSTERS
 `define NUM_CLUSTERS 1
 `endif

hw/rtl/VX_types.vh

@@ -188,6 +188,19 @@
 `define VX_CSR_MIMPID                   12'hF13
 `define VX_CSR_MHARTID                  12'hF14
 
+// Vector CSRs
+
+`define VX_CSR_VSTART                   12'h008
+`define VX_CSR_VXSAT                    12'h009
+`define VX_CSR_VXRM                     12'h00A
+`define VX_CSR_VCSR                     12'h00F
+`define VX_CSR_VL                       12'hC20
+`define VX_CSR_VTYPE                    12'hC21
+`define VX_CSR_VLENB                    12'hC22
+`define VX_CSR_VCYCLE                   12'hC00
+`define VX_CSR_VTIME                    12'hC01
+`define VX_CSR_VINSTRET                 12'hC02
+
 // GPGU CSRs
 
 `define VX_CSR_THREAD_ID                12'hCC0

perf/cache/cache_perf.log

@@ -1,3 +1,3 @@
 CONFIGS=-DNUM_CLUSTERS=1 -DNUM_CORES=1 -DNUM_WARPS=2 -DNUM_THREADS=2   -DPERF_ENABLE -DICACHE_NUM_WAYS=1
 running: CONFIGS=-DNUM_CLUSTERS=1 -DNUM_CORES=1 -DNUM_WARPS=2 -DNUM_THREADS=2 -DPERF_ENABLE -DICACHE_NUM_WAYS=1 make -C ./ci/../driver/rtlsim
-verilator --build --exe --cc Vortex --top-module Vortex --language 1800-2009 --assert -Wall -Wpedantic -Wno-DECLFILENAME -Wno-REDEFMACRO --x-initial unique --x-assign unique verilator.vlt -I../../hw/rtl -I../../hw/dpi -I../../hw/rtl/libs -I../../hw/rtl/interfaces -I../../hw/rtl/cache -I../../hw/rtl/simulate -I../../hw/rtl/fp_cores -I../../third_party/fpnew/src/common_cells/include -I../../third_party/fpnew/src/common_cells/src -I../../third_party/fpnew/src/fpu_div_sqrt_mvp/hdl -I../../third_party/fpnew/src -I../../hw/rtl/tex_unit -I../../hw/rtl/raster_unit -I../../hw/rtl/rop_unit -DNUM_CLUSTERS=1 -DNUM_CORES=1 -DNUM_WARPS=2 -DNUM_THREADS=2   -DPERF_ENABLE -DICACHE_NUM_WAYS=1 -j 64 -DNDEBUG -DIMUL_DPI -DIDIV_DPI -DFPU_DPI ../common/util.cpp ../common/mem.cpp ../common/rvfloats.cpp ../../hw/dpi/util_dpi.cpp ../../hw/dpi/float_dpi.cpp processor.cpp -CFLAGS '-std=c++11 -Wall -Wextra -Wfatal-errors -Wno-array-bounds -fPIC -Wno-maybe-uninitialized -I../../../hw -I../../common -I../../../third_party/softfloat/source/include -I../../../third_party -DNUM_CLUSTERS=1 -DNUM_CORES=1 -DNUM_WARPS=2 -DNUM_THREADS=2   -DPERF_ENABLE -DICACHE_NUM_WAYS=1 -O2 -DNDEBUG' -LDFLAGS '-shared ../../../third_party/softfloat/build/Linux-x86_64-GCC/softfloat.a -L../../../third_party/ramulator -lramulator' -o ../../../driver/rtlsim/librtlsim.so
+verilator --build --exe --cc Vortex --top-module Vortex --language 1800-2009 --assert -Wall -Wpedantic -Wno-DECLFILENAME -Wno-REDEFMACRO --x-initial unique --x-assign unique verilator.vlt -I../../hw/rtl -I../../hw/dpi -I../../hw/rtl/libs -I../../hw/rtl/interfaces -I../../hw/rtl/cache -I../../hw/rtl/simulate -I../../hw/rtl/fp_cores -I../../third_party/fpnew/src/common_cells/include -I../../third_party/fpnew/src/common_cells/src -I../../third_party/fpnew/src/fpu_div_sqrt_mvp/hdl -I../../third_party/fpnew/src -I../../hw/rtl/tex_unit -I../../hw/rtl/raster_unit -I../../hw/rtl/rop_unit -DNUM_CLUSTERS=1 -DNUM_CORES=1 -DNUM_WARPS=2 -DNUM_THREADS=2   -DPERF_ENABLE -DICACHE_NUM_WAYS=1 -j 64 -DNDEBUG -DIMUL_DPI -DIDIV_DPI -DFPU_DPI ../common/util.cpp ../common/mem.cpp ../common/softfloat_ext.cpp ../common/rvfloats.cpp ../../hw/dpi/util_dpi.cpp ../../hw/dpi/float_dpi.cpp processor.cpp -CFLAGS '-std=c++11 -Wall -Wextra -Wfatal-errors -Wno-array-bounds -fPIC -Wno-maybe-uninitialized -I../../../hw -I../../common -I../../../third_party/softfloat/source/include -I../../../third_party -DNUM_CLUSTERS=1 -DNUM_CORES=1 -DNUM_WARPS=2 -DNUM_THREADS=2   -DPERF_ENABLE -DICACHE_NUM_WAYS=1 -O2 -DNDEBUG' -LDFLAGS '-shared ../../../third_party/softfloat/build/Linux-x86_64-GCC/softfloat.a -L../../../third_party/ramulator -lramulator' -o ../../../driver/rtlsim/librtlsim.so

sim/common/rvfloats.cpp

@@ -12,6 +12,7 @@
 // limitations under the License.
 
 #include "rvfloats.h"
+#include "softfloat_ext.h"
 #include <stdio.h>
 
 extern "C" {
@@ -158,6 +159,34 @@ uint64_t rv_fdiv_d(uint64_t a, uint64_t b, uint32_t frm, uint32_t* fflags) {
   return from_float64_t(r);
 }
 
+uint32_t rv_frecip7_s(uint32_t a, uint32_t frm, uint32_t* fflags) {
+  softfloat_roundingMode = frm;
+  auto r = f32_recip7(to_float32_t(a));
+  if (fflags) { *fflags = softfloat_exceptionFlags; }
+  return from_float32_t(r);
+}
+
+uint64_t rv_frecip7_d(uint64_t a, uint32_t frm, uint32_t* fflags) {
+  softfloat_roundingMode = frm;
+  auto r = f64_recip7(to_float64_t(a));
+  if (fflags) { *fflags = softfloat_exceptionFlags; }
+  return from_float64_t(r);
+}
+
+uint32_t rv_frsqrt7_s(uint32_t a, uint32_t frm, uint32_t* fflags) {
+  softfloat_roundingMode = frm;
+  auto r = f32_rsqrte7(to_float32_t(a));
+  if (fflags) { *fflags =softfloat_exceptionFlags; }
+  return from_float32_t(r);
+}
+
+uint64_t rv_frsqrt7_d(uint64_t a, uint32_t frm, uint32_t* fflags) {
+  softfloat_roundingMode = frm;
+  auto r = f64_rsqrte7(to_float64_t(a));
+  if (fflags) { *fflags = softfloat_exceptionFlags; }
+  return from_float64_t(r);
+}
+
 uint32_t rv_fsqrt_s(uint32_t a, uint32_t frm, uint32_t* fflags) {
   rv_init(frm);
   auto r = f32_sqrt(to_float32_t(a));
@@ -486,6 +515,11 @@ uint64_t rv_fsgnjx_d(uint64_t a, uint64_t b) {
   return r;
 }
 
+uint32_t rv_dtof_r(uint64_t a, uint32_t frm) {
+  rv_init(frm);
+  return rv_dtof(a);
+}
+
 uint32_t rv_dtof(uint64_t a) {
   auto r = f64_to_f32(to_float64_t(a));
   return from_float32_t(r);

sim/common/rvfloats.h

@@ -28,6 +28,8 @@ uint32_t rv_fnmadd_s(uint32_t a, uint32_t b, uint32_t c, uint32_t frm, uint32_t*
 uint32_t rv_fnmsub_s(uint32_t a, uint32_t b, uint32_t c, uint32_t frm, uint32_t* fflags);
 uint32_t rv_fdiv_s(uint32_t a, uint32_t b, uint32_t frm, uint32_t* fflags);
 uint32_t rv_fsqrt_s(uint32_t a, uint32_t frm, uint32_t* fflags);
+uint32_t rv_frecip7_s(uint32_t a, uint32_t frm, uint32_t* fflags);
+uint32_t rv_frsqrt7_s(uint32_t a, uint32_t frm, uint32_t* fflags);
 
 uint32_t rv_ftoi_s(uint32_t a, uint32_t frm, uint32_t* fflags);
 uint32_t rv_ftou_s(uint32_t a, uint32_t frm, uint32_t* fflags);
@@ -58,6 +60,8 @@ uint64_t rv_fsub_d(uint64_t a, uint64_t b, uint32_t frm, uint32_t* fflags);
 uint64_t rv_fmul_d(uint64_t a, uint64_t b, uint32_t frm, uint32_t* fflags);
 uint64_t rv_fdiv_d(uint64_t a, uint64_t b, uint32_t frm, uint32_t* fflags);
 uint64_t rv_fsqrt_d(uint64_t a, uint32_t frm, uint32_t* fflags);
+uint64_t rv_frecip7_d(uint64_t a, uint32_t frm, uint32_t* fflags);
+uint64_t rv_frsqrt7_d(uint64_t a, uint32_t frm, uint32_t* fflags);
 
 uint64_t rv_fmadd_d(uint64_t a, uint64_t b, uint64_t c, uint32_t frm, uint32_t* fflags);
 uint64_t rv_fmsub_d(uint64_t a, uint64_t b, uint64_t c, uint32_t frm, uint32_t* fflags);
@@ -85,6 +89,7 @@ uint64_t rv_fmin_d(uint64_t a, uint64_t b, uint32_t* fflags);
 uint64_t rv_fmax_d(uint64_t a, uint64_t b, uint32_t* fflags);
 
 uint32_t rv_dtof(uint64_t a);
+uint32_t rv_dtof_r(uint64_t a, uint32_t frm);
 uint64_t rv_ftod(uint32_t a);
 
 #ifdef __cplusplus