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ue_n78_sib1.log
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ue_n78_sib1.log
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[CONFIG] get parameters from cmdline , debug flags: 0x00400000
Send signal 35 to display resource usage...
[CONFIG] log_config: 2/3 parameters successfully set
[CONFIG] log_config: 53/53 parameters successfully set
[CONFIG] log_config: 53/53 parameters successfully set
[CONFIG] log_config: 16/16 parameters successfully set
[CONFIG] log_config: 16/16 parameters successfully set
log init done
create a thread for core -1
create a thread for core -1
[CONFIG] (root): 23/27 parameters successfully set
[CONFIG] (root): 4/5 parameters successfully set
[0m[ENB_APP] nfapi running mode: MONOLITHIC
[0m[CONFIG] TTracer: 4/4 parameters successfully set
CPU Freq is 3.193062
[0m[TMR] Starting itti queue: TASK_UNKNOWN as task 0
[0m[0m[TMR] Starting itti queue: TASK_TIMER as task 1
[0m[0m[TMR] Starting itti queue: TASK_L2L1 as task 2
[0m[0m[TMR] Starting itti queue: TASK_BM as task 3
[0m[0m[TMR] Starting itti queue: TASK_PHY_ENB as task 4
[0m[0m[TMR] Starting itti queue: TASK_MAC_ENB as task 5
[0m[0m[TMR] Starting itti queue: TASK_RLC_ENB as task 6
[0m[0m[TMR] Starting itti queue: TASK_RRC_ENB_NB_IoT as task 7
[0m[0m[TMR] Starting itti queue: TASK_PDCP_ENB as task 8
[0m[0m[TMR] Starting itti queue: TASK_DATA_FORWARDING as task 9
[0m[0m[TMR] Starting itti queue: TASK_END_MARKER as task 10
[0m[0m[TMR] Starting itti queue: TASK_RRC_ENB as task 11
[0m[0m[TMR] Starting itti queue: TASK_RRC_GNB as task 12
[0m[0m[TMR] Starting itti queue: TASK_RAL_ENB as task 13
[0m[0m[TMR] Starting itti queue: TASK_S1AP as task 14
[0m[0m[TMR] Starting itti queue: TASK_NGAP as task 15
[0m[0m[TMR] Starting itti queue: TASK_X2AP as task 16
[0m[0m[TMR] Starting itti queue: TASK_M2AP_ENB as task 17
[0m[0m[TMR] Starting itti queue: TASK_M2AP_MCE as task 18
[0m[0m[TMR] Starting itti queue: TASK_M3AP as task 19
[0m[0m[TMR] Starting itti queue: TASK_M3AP_MME as task 20
[0m[0m[TMR] Starting itti queue: TASK_M3AP_MCE as task 21
[0m[0m[TMR] Starting itti queue: TASK_SCTP as task 22
[0m[0m[TMR] Starting itti queue: TASK_ENB_APP as task 23
[0m[0m[TMR] Starting itti queue: TASK_GNB_APP as task 24
[0m[0m[TMR] Starting itti queue: TASK_MCE_APP as task 25
[0m[0m[TMR] Starting itti queue: TASK_MME_APP as task 26
[0m[0m[TMR] Starting itti queue: TASK_FLEXRAN_AGENT as task 27
[0m[0m[TMR] Starting itti queue: TASK_PHY_UE as task 28
[0m[0m[TMR] Starting itti queue: TASK_MAC_UE as task 29
[0m[0m[TMR] Starting itti queue: TASK_RLC_UE as task 30
[0m[0m[TMR] Starting itti queue: TASK_PDCP_UE as task 31
[0m[0m[TMR] Starting itti queue: TASK_RRC_UE as task 32
[0m[0m[TMR] Starting itti queue: TASK_RRC_NRUE as task 33
[0m[0m[TMR] Starting itti queue: TASK_NAS_UE as task 34
[0m[0m[TMR] Starting itti queue: TASK_RAL_UE as task 35
[0m[0m[TMR] Starting itti queue: TASK_MSC as task 36
[0m[0m[TMR] Starting itti queue: TASK_GTPV1_U as task 37
[0m[0m[TMR] Starting itti queue: TASK_UDP as task 38
[0m[0m[TMR] Starting itti queue: TASK_CU_F1 as task 39
[0m[0m[TMR] Starting itti queue: TASK_DU_F1 as task 40
[0m[0m[TMR] Starting itti queue: TASK_RRC_UE_SIM as task 41
[0m[0m[TMR] Starting itti queue: TASK_RRC_GNB_SIM as task 42
[0m[CONFIG] opt: 3/3 parameters successfully set
[0m[OPT] OPT disabled
[0m[CONFIG] loader: 2/2 parameters successfully set
[CONFIG] loader.ldpc: 1/2 parameters successfully set
[LOADER] library libldpc.so successfully loaded
[0m[HW] Version: Branch: master Abrev. Hash: 7747a60 Date: Tue Nov 2 16:11:01 2021 +0800
[0mcarrierBandwidth:106
buffer value is carrierBandwidth and arch is 106
scs:1
buffer value is scs and arch is 1
absoluteFrequencySSB:627264
buffer value is absoluteFrequencySSB and arch is 627264
absoluteFrequencyPointA:0
buffer value is absoluteFrequencyPointA and arch is 0
band:78
buffer value is band and arch is 78
phy_cell_id:166
buffer value is phy_cell_id and arch is 166
[0m[RRC] UE Init config Bandwidth 106,scs 1 absoluteFrequencySSB 627264 band 78 phy_cell_id 166
[0m[0m[MAC] Computing frequency (pointA 626640 => 3399600 KHz (freq_min 3300000 KHz, NR band 78 N_OFFs 620000))
[0m[0m[MAC] Computing frequency (pointA 626640 => 3399600 KHz (freq_min 3300000 KHz, NR band 78 N_OFFs 620000))
[0m[0m[MAC] NR band 78, duplex mode TDD, duplex spacing = 0 KHz
[0m[0m[PHY] Set UE mode 0, UE_fo_compensation 0, UE_scan_carrier 0, UE_no_timing_correction 0
[0m[0m[PHY] Set UE N_RB_DL 0
[0m[0m[PHY] Set UE nb_rx_antenna 1, nb_tx_antenna 1, threequarter_fs 0
[0m[0m[PHY] Initializing frame parms: set nb_antenna_ports_gNB 1, tdd_config, 3, Nid_cell 166
[0m[0m[MAC] NR band 78, duplex mode TDD, duplex spacing = 0 KHz
[0m[0m[PHY] Initializing frame parms: DL frequency 3418680000 Hz, UL frequency 3418680000 Hz: band 78, uldl offset 0 Hz
[0m[0m[PHY] Initializing frame parms for mu 1, N_RB 106, Ncp 0
[0m[0m[PHY] Doing symbol rotation calculation for gNB TX/RX, f0 3418680000.000000 Hz, Nsymb 28
[0m[0m[PHY] Symbol rotation 0/28 => (27244,-18205)
[0m[0m[PHY] Symbol rotation 1/28 => tl 0.000036 (-23170,23169) (0.625000)
[0m[0m[PHY] Symbol rotation 2/28 => tl 0.000072 (18204,-27245) (0.156250)
[0m[0m[PHY] Symbol rotation 3/28 => tl 0.000108 (-12540,30272) (0.687500)
[0m[0m[PHY] Symbol rotation 4/28 => tl 0.000143 (6392,-32138) (0.218750)
[0m[0m[PHY] Symbol rotation 5/28 => tl 0.000179 (0,32767) (0.750000)
[0m[0m[PHY] Symbol rotation 6/28 => tl 0.000215 (-6393,-32138) (0.281250)
[0m[0m[PHY] Symbol rotation 7/28 => tl 0.000250 (12539,30272) (0.812500)
[0m[0m[PHY] Symbol rotation 8/28 => tl 0.000286 (-18205,-27245) (0.343750)
[0m[0m[PHY] Symbol rotation 9/28 => tl 0.000322 (23169,23169) (0.875000)
[0m[0m[PHY] Symbol rotation 10/28 => tl 0.000357 (-27245,-18205) (0.406250)
[0m[0m[PHY] Symbol rotation 11/28 => tl 0.000393 (30272,12539) (0.937500)
[0m[0m[PHY] Symbol rotation 12/28 => tl 0.000429 (-32138,-6393) (0.468750)
[0m[0m[PHY] Symbol rotation 13/28 => tl 0.000464 (32767,0) (1.000000)
[0m[0m[PHY] Symbol rotation 14/28 => tl 0.000500 (27244,-18205) (0.093750)
[0m[0m[PHY] Symbol rotation 15/28 => tl 0.000536 (-23170,23169) (0.625000)
[0m[0m[PHY] Symbol rotation 16/28 => tl 0.000572 (18204,-27245) (0.156250)
[0m[0m[PHY] Symbol rotation 17/28 => tl 0.000608 (-12540,30272) (0.687500)
[0m[0m[PHY] Symbol rotation 18/28 => tl 0.000643 (6392,-32138) (0.218750)
[0m[0m[PHY] Symbol rotation 19/28 => tl 0.000679 (-1,32767) (0.750000)
[0m[0m[PHY] Symbol rotation 20/28 => tl 0.000715 (-6393,-32138) (0.281250)
[0m[0m[PHY] Symbol rotation 21/28 => tl 0.000750 (12539,30272) (0.812500)
[0m[0m[PHY] Symbol rotation 22/28 => tl 0.000786 (-18205,-27245) (0.343750)
[0m[0m[PHY] Symbol rotation 23/28 => tl 0.000822 (23169,23169) (0.875000)
[0m[0m[PHY] Symbol rotation 24/28 => tl 0.000857 (-27245,-18205) (0.406250)
[0m[0m[PHY] Symbol rotation 25/28 => tl 0.000893 (30272,12539) (0.937500)
[0m[0m[PHY] Symbol rotation 26/28 => tl 0.000929 (-32138,-6393) (0.468750)
[0m[0m[PHY] Symbol rotation 27/28 => tl 0.000964 (32766,0) (1.000000)
[0m[0m[PHY] Initializing UE vars (abstraction 0) for gNB TXant 1, UE RXant 1
[0m[CONFIG] loader.dfts: 1/2 parameters successfully set
[LOADER] library libdfts.so successfully loaded
[0m[PHY] UE 0 Setting N_TA_offset to 800 samples (factor 2.000000, UL Freq 3418680000, N_RB 106)
[0m[0m[PHY] HW: Configuring card 0, tx/rx num_channels 1/1, duplex_mode TDD
[0m[0m[PHY] HW: Configuring channel 0 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 3418680000.000000 Hz, rx_freq 3418680000.000000 Hz
[0m[0m[PHY] HW: Configuring channel 1 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 2 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 3 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring card 1, tx/rx num_channels 1/1, duplex_mode TDD
[0m[0m[PHY] HW: Configuring channel 0 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 3418680000.000000 Hz, rx_freq 3418680000.000000 Hz
[0m[0m[PHY] HW: Configuring channel 1 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 2 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 3 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring card 2, tx/rx num_channels 1/1, duplex_mode TDD
[0m[0m[PHY] HW: Configuring channel 0 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 3418680000.000000 Hz, rx_freq 3418680000.000000 Hz
[0m[0m[PHY] HW: Configuring channel 1 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 2 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 3 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring card 3, tx/rx num_channels 1/1, duplex_mode TDD
[0m[0m[PHY] HW: Configuring channel 0 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 3418680000.000000 Hz, rx_freq 3418680000.000000 Hz
[0m[0m[PHY] HW: Configuring channel 1 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 2 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 3 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring card 4, tx/rx num_channels 1/1, duplex_mode TDD
[0m[0m[PHY] HW: Configuring channel 0 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 3418680000.000000 Hz, rx_freq 3418680000.000000 Hz
[0m[0m[PHY] HW: Configuring channel 1 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 2 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 3 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring card 5, tx/rx num_channels 1/1, duplex_mode TDD
[0m[0m[PHY] HW: Configuring channel 0 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 3418680000.000000 Hz, rx_freq 3418680000.000000 Hz
[0m[0m[PHY] HW: Configuring channel 1 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 2 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 3 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring card 6, tx/rx num_channels 1/1, duplex_mode TDD
[0m[0m[PHY] HW: Configuring channel 0 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 3418680000.000000 Hz, rx_freq 3418680000.000000 Hz
[0m[0m[PHY] HW: Configuring channel 1 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 2 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 3 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring card 7, tx/rx num_channels 1/1, duplex_mode TDD
[0m[0m[PHY] HW: Configuring channel 0 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 3418680000.000000 Hz, rx_freq 3418680000.000000 Hz
[0m[0m[PHY] HW: Configuring channel 1 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 2 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 3 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[HW] # /dev/cpu_dma_latency set to 10 us
[0m[0m[PHY] Intializing UE Threads for instance 0 (0x556342739610,0x7f700fc1b010)...
[0mUE threads created by 3688
TYPE <CTRL-C> TO TERMINATE
[CONFIG] device.recplay: 7/7 parameters successfully set
[CONFIG] device: 1/1 parameters successfully set
[CONFIG] loader.oai_device: 1/2 parameters successfully set
[LOADER] library liboai_device.so successfully loaded
LMSSDR: Initializing openair0_device for RRU ...
cal 0: freq 3500000000.000000, offset 44.000000, diff 81320000.000000
cal 1: freq 2660000000.000000, offset 55.000000, diff 758680000.000000
cal 2: freq 2300000000.000000, offset 54.000000, diff 1118680000.000000
cal 3: freq 1880000000.000000, offset 54.000000, diff 1538680000.000000
cal 4: freq 816000000.000000, offset 79.000000, diff 2602680000.000000
[0m[HW] [RRU] has loaded LMSSDR device.
[0mConnecting to device: LimeSDR-USB, media=USB 3.0, module=STREAM, addr=1d50:6108, serial=0009060B00491714
CGEN: Freq=80 MHz, VCO=2.56 GHz, INT=82, FRAC=349525, DIV_OUTCH_CGEN=15
M=156, N=3, Fvco=1040.000 MHz
16: 6A A1 AA
19: AA AA 5C
phase: min 26.0; max 192.1; selected 109.0)
M=156, N=3, Fvco=1040.000 MHz
M=156, N=3, Fvco=1040.000 MHz
16: 55 A5 AA
16: 55 AD 2A
16: 55 AD 2A
16: 77 9D 3D
16: AA 5C 75
16: AA 5A D5
phase: min 31.2; max 186.9; selected 109.0)
M=156, N=3, Fvco=1040.000 MHz
MCU programming : 64/16384MCU programming : 128/16384MCU programming : 192/16384MCU programming : 256/16384MCU programming : 320/16384MCU programming : 384/16384MCU programming : 448/16384MCU programming : 512/16384MCU programming : 576/16384MCU programming : 640/16384MCU programming : 704/16384MCU programming : 768/16384MCU programming : 832/16384MCU programming : 896/16384MCU programming : 960/16384MCU programming : 1024/16384MCU programming : 1088/16384MCU programming : 1152/16384MCU programming : 1216/16384MCU programming : 1280/16384MCU programming : 1344/16384MCU programming : 1408/16384MCU programming : 1472/16384MCU programming : 1536/16384MCU programming : 1600/16384MCU programming : 1664/16384MCU programming : 1728/16384MCU programming : 1792/16384MCU programming : 1856/16384MCU programming : 1920/16384MCU programming : 1984/16384MCU programming : 2048/16384MCU programming : 2112/16384MCU programming : 2176/16384MCU programming : 2240/16384MCU programming : 2304/16384MCU programming : 2368/16384MCU programming : 2432/16384MCU programming : 2496/16384MCU programming : 2560/16384MCU programming : 2624/16384MCU programming : 2688/16384MCU programming : 2752/16384MCU programming : 2816/16384MCU programming : 2880/16384MCU programming : 2944/16384MCU programming : 3008/16384MCU programming : 3072/16384MCU programming : 3136/16384MCU programming : 3200/16384MCU programming : 3264/16384MCU programming : 3328/16384MCU programming : 3392/16384MCU programming : 3456/16384MCU programming : 3520/16384MCU programming : 3584/16384MCU programming : 3648/16384MCU programming : 3712/16384MCU programming : 3776/16384MCU programming : 3840/16384MCU programming : 3904/16384MCU programming : 3968/16384MCU programming : 4032/16384MCU programming : 4096/16384MCU programming : 4160/16384MCU programming : 4224/16384MCU programming : 4288/16384MCU programming : 4352/16384MCU programming : 4416/16384MCU programming : 4480/16384MCU programming : 4544/16384MCU programming : 4608/16384MCU programming : 4672/16384MCU programming : 4736/16384MCU programming : 4800/16384MCU programming : 4864/16384MCU programming : 4928/16384MCU programming : 4992/16384MCU programming : 5056/16384MCU programming : 5120/16384MCU programming : 5184/16384MCU programming : 5248/16384MCU programming : 5312/16384MCU programming : 5376/16384MCU programming : 5440/16384MCU programming : 5504/16384MCU programming : 5568/16384MCU programming : 5632/16384MCU programming : 5696/16384MCU programming : 5760/16384MCU programming : 5824/16384MCU programming : 5888/16384MCU programming : 5952/16384MCU programming : 6016/16384MCU programming : 6080/16384MCU programming : 6144/16384MCU programming : 6208/16384MCU programming : 6272/16384MCU programming : 6336/16384MCU programming : 6400/16384MCU programming : 6464/16384MCU programming : 6528/16384MCU programming : 6592/16384MCU programming : 6656/16384MCU programming : 6720/16384MCU programming : 6784/16384MCU programming : 6848/16384MCU programming : 6912/16384MCU programming : 6976/16384MCU programming : 7040/16384MCU programming : 7104/16384MCU programming : 7168/16384MCU programming : 7232/16384MCU programming : 7296/16384MCU programming : 7360/16384MCU programming : 7424/16384MCU programming : 7488/16384MCU programming : 7552/16384MCU programming : 7616/16384MCU programming : 7680/16384MCU programming : 7744/16384MCU programming : 7808/16384MCU programming : 7872/16384MCU programming : 7936/16384MCU programming : 8000/16384MCU programming : 8064/16384MCU programming : 8128/16384MCU programming : 8192/16384MCU programming : 8256/16384MCU programming : 8320/16384MCU programming : 8384/16384MCU programming : 8448/16384MCU programming : 8512/16384MCU programming : 8576/16384MCU programming : 8640/16384MCU programming : 8704/16384MCU programming : 8768/16384MCU programming : 8832/16384MCU programming : 8896/16384MCU programming : 8960/16384MCU programming : 9024/16384MCU programming : 9088/16384MCU programming : 9152/16384MCU programming : 9216/16384MCU programming : 9280/16384MCU programming : 9344/16384MCU programming : 9408/16384MCU programming : 9472/16384MCU programming : 9536/16384MCU programming : 9600/16384MCU programming : 9664/16384MCU programming : 9728/16384MCU programming : 9792/16384MCU programming : 9856/16384MCU programming : 9920/16384MCU programming : 9984/16384MCU programming : 10048/16384MCU programming : 10112/16384MCU programming : 10176/16384MCU programming : 10240/16384MCU programming : 10304/16384MCU programming : 10368/16384MCU programming : 10432/16384MCU programming : 10496/16384MCU programming : 10560/16384MCU programming : 10624/16384MCU programming : 10688/16384MCU programming : 10752/16384MCU programming : 10816/16384MCU programming : 10880/16384MCU programming : 10944/16384MCU programming : 11008/16384MCU programming : 11072/16384MCU programming : 11136/16384MCU programming : 11200/16384MCU programming : 11264/16384MCU programming : 11328/16384MCU programming : 11392/16384MCU programming : 11456/16384MCU programming : 11520/16384MCU programming : 11584/16384MCU programming : 11648/16384MCU programming : 11712/16384MCU programming : 11776/16384MCU programming : 11840/16384MCU programming : 11904/16384MCU programming : 11968/16384MCU programming : 12032/16384MCU programming : 12096/16384MCU programming : 12160/16384MCU programming : 12224/16384MCU programming : 12288/16384MCU programming : 12352/16384MCU programming : 12416/16384MCU programming : 12480/16384MCU programming : 12544/16384MCU programming : 12608/16384MCU programming : 12672/16384MCU programming : 12736/16384MCU programming : 12800/16384MCU programming : 12864/16384MCU programming : 12928/16384MCU programming : 12992/16384MCU programming : 13056/16384MCU programming : 13120/16384MCU programming : 13184/16384MCU programming : 13248/16384MCU programming : 13312/16384MCU programming : 13376/16384MCU programming : 13440/16384MCU programming : 13504/16384MCU programming : 13568/16384MCU programming : 13632/16384MCU programming : 13696/16384MCU programming : 13760/16384MCU programming : 13824/16384MCU programming : 13888/16384MCU programming : 13952/16384MCU programming : 14016/16384MCU programming : 14080/16384MCU programming : 14144/16384MCU programming : 14208/16384MCU programming : 14272/16384MCU programming : 14336/16384MCU programming : 14400/16384MCU programming : 14464/16384MCU programming : 14528/16384MCU programming : 14592/16384MCU programming : 14656/16384MCU programming : 14720/16384MCU programming : 14784/16384MCU programming : 14848/16384MCU programming : 14912/16384MCU programming : 14976/16384MCU programming : 15040/16384MCU programming : 15104/16384MCU programming : 15168/16384MCU programming : 15232/16384MCU programming : 15296/16384MCU programming : 15360/16384MCU programming : 15424/16384MCU programming : 15488/16384MCU programming : 15552/16384MCU programming : 15616/16384MCU programming : 15680/16384MCU programming : 15744/16384MCU programming : 15808/16384MCU programming : 15872/16384MCU programming : 15936/16384MCU programming : 16000/16384MCU programming : 16064/16384MCU programming : 16128/16384MCU programming : 16192/16384MCU programming : 16256/16384MCU programming : 16320/16384MCU programming : 16384/16384
MCU Programming finished, 796 ms
M=204, N=3, Fvco=1044.480 MHz
16: 55 AD 28
phase: min 17.9; max 190.6; selected 104.2)
M=204, N=3, Fvco=1044.480 MHz
M=204, N=3, Fvco=1044.480 MHz
16: 55 AD 2A
16: 55 AD 2A
16: A6 DC 75
16: AA 5A D5
phase: min 23.8; max 184.6; selected 104.2)
M=204, N=3, Fvco=1044.480 MHz
CGEN: Freq=491.52 MHz, VCO=1.96608 GHz, INT=63, FRAC=0, DIV_OUTCH_CGEN=1
CGEN ICT_VCO_CGEN changed to 31
M=192, N=24, Fvco=983.040 MHz
16: 55 A5 2A
16: 55 A5 2C
16: 55 AD 2C
16: 55 9D 1D
16: D5 BB 5D
16: FD 5B 5D
16: FD 5A 5D
16: BB 5A 55
37: AB 5A 55
2335: AB 5A 55
2125: AA 5A 15
phase: min 174.4; max 275.6; selected 225.0)
M=192, N=24, Fvco=983.040 MHz
M=192, N=24, Fvco=983.040 MHz
16: DD A3 CA
16: 5D A3 8A
16: 5D A7 8A
16: 5D A7 8A
16: 55 A7 AA
16: 55 A7 AA
16: 55 A7 AA
16: 55 A7 AA
16: 55 A7 AA
16: 55 A5 AA
16: 55 A5 AA
16: 55 A5 AA
16: 55 A5 AA
16: 55 A5 2A
16: 55 AD 2A
16: 55 AD 2A
16: 55 AD 2A
16: 55 AD 2A
16: 55 AD 2A
16: 55 AD 2A
16: 55 AD 2A
16: 55 AD 2A
16: 55 AD 2A
16: 55 AD 2A
16: 55 AD 2A
16: 57 AD 2A
16: 57 8D 3B
16: 77 9D 3B
16: 77 9D 3F
16: 77 DD 3D
16: 77 DD 3D
16: B6 DC 35
16: A6 DC 75
16: A6 DC 75
16: AE DC 75
16: AA 5C 75
16: AA 5C 75
16: AA 58 75
16: AA 58 55
16: AA 5A D5
phase: min 225.0; max 253.1; selected 239.1)
M=192, N=24, Fvco=983.040 MHz
Set sample rate 61.440000 MHz
Set TX frequency 3418.680000 MHz
CGEN: Freq=61.44 MHz, VCO=2.4576 GHz, INT=79, FRAC=0, DIV_OUTCH_CGEN=19
SR: 61.440 MHz
SR: 61.440 MHz
Rx pktLoss: ts diff: 178160 pktLoss: 130
Rx pktLoss: ts diff: 6800 pktLoss: 4
[0m[PHY] [SCHED][UE] Check absolute frequency DL 3418680000.000000, UL 3418680000.000000 (RF card 0, oai_exit 0, channel 0, rx_num_channels 1)
[0m[0m[93m[PHY] Starting sync detection
[0m[0m[PHY] [UE thread Synch] Running Initial Synch (mode 0)
[0m[0m[PHY] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 245588, val = 8028617 (69 dB) avg 63 dB, ffo 0.000000
[0mPSS execution duration 395956 microseconds
[0m[PHY] [UE0] Initial sync : Estimated PSS position -1, Nid2 1
[0m[0m[PHY] sync_pos -1 ssb_offset 614255
[0m[0m[PHY] TDD Normal prefix: SSS error condition: sync_pos -1
[0mpopping from TX, samples popped 0/1360
[0m[PHY] [UE] nr_synchro_time: Sync source = 1, Peak found at pos 433548, val = 26331610 (72 dB) avg 63 dB, ffo 0.000000
[0mPSS execution duration 387341 microseconds
[0m[PHY] [UE0] Initial sync : Estimated PSS position 433548, Nid2 1
[0m[0m[PHY] sync_pos 433548 ssb_offset 433404
[0m[0m[PHY] Calling sss detection (normal CP)
[0m[0m[PHY] [UE0] Initial sync: starting PBCH detection (rx_offset 0)
[0m[0m[PHY] [UE0] Initial sync: pbch decoded sucessfully
[0m[0m[PHY] TDD Normal prefix: CellId 166 metric 2121, phase 4, pbch 0
[0m[0m[PHY] [UE0] In synch, rx_offset 336828 samples
[0m[0m[PHY] [UE 0] RRC Measurements => rssi -inf dBm (dig -inf dB, gain 50), N0 0 dBm, rsrp -inf dBm/RE, rsrq -inf dB
[0m[0m[PHY] [UE 0] Measured Carrier Frequency 3418680000 Hz (offset 0 Hz)
[0m[0m[PHY] HW: Configuring channel 0 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 3418680000.000000 Hz, rx_freq 3418680000.000000 Hz
[0m[0m[PHY] HW: Configuring channel 1 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 2 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] HW: Configuring channel 3 (rf_chain 0): setting tx_gain 0.000000, rx_gain 50.000000, tx_freq 0.000000 Hz, rx_freq 0.000000 Hz
[0m[0m[PHY] Got synch: hw_slot_offset 22, carrier off 0 Hz, rxgain 50.000000 (DL 3418680000.000000 Hz, UL 3418680000.000000 Hz)
[0m[0m[PHY] Resynchronizing RX by 336828 samples (mode = 0)
[0mTrying DCI candidate 0 of 3 number of candidates, CCE 0 (0), L 8 scrambling is 0
(126.17) Received dci indication (rnti ffff,dci format 0,n_CCE 0,payloadSize 39,payload 5fc0c0000)
[0m[1;31m[PHY] [UE 0] AbsSubFrame 126.17, Mode NOT SYNCHED: DCI 1 of 1 total DCIs found --> rnti 65535 : format 0 with start cce 0 and CCE 0 payloadSize 39 with rnti 65535
[0m[0m[MAC] >>>NR_IF_Module i=0, dl_info->dci_ind->number_of_dcis=1 thread_id 1 Time[ 126, 17 ]
[0m[0m[MAC] In nr_ue_process_dci: Processing received DCI format 1_0 (DL BWP 0) rnti 65535
[0m[0m[93m[MAC] riv = 95
[0m[0m[93m[MAC] n_RB_DLBWP = 48
[0m[0m[93m[MAC] number_rbs = 48
[0m[0m[93m[MAC] start_rb = 0
[0m[0m[93m[MAC] (nr_ue_procedures.c) rnti = ffff dl_config->number_pdus = 0 n_dmrs_cdm_groups 2
[0m[0m[93m[MAC] (nr_ue_procedures.c) frequency_domain_resource_assignment=95 number_rbs=48 start_rb=0
[0m[0m[93m[MAC] (nr_ue_procedures.c) time_domain_resource_assignment=12 number_symbols=6 start_symbol=1
[0m[0m[MAC] in nr_ue_scheduled_response() pdu_type 4, rnti_type 5, current_harq_pid 0, status 1, threadid 1
[0m[0m[MAC] >>>> dlsch0->g_pucch = -1 dlsch0_harq.mcs = 3 pdsch_to_harq_feedback_time_ind = 0 slot_for_feedback_ack = 17 active = 1
[0m[0m[93m[PHY] [UE 0]To Handle x_dlsch Frame 126, nr_slot_rx 17: found 1 DCIs with thread_id 1 active(P 0, SI 1, ra 0, dlsch 0)
[0m[0m[PHY] ------ --> PDSCH ChannelComp/LLR Frame.slot 126.17 ------
[0m[0m[93m[PHY] [UE 0] PDSCH type 0 active in nr_slot_rx 17, harq_pid 0 (1), BWPStart 4, rb_start 0, nb_rb 48, symbol_start 1, nb_symbols 6, DMRS mask 4
[0mPDSCH Channel Estimation : ThreadId 1, eNB_offset 0 ch_offset 4096, symbol_offset 4096 OFDM size 2048, Ncp=0, Ns=17, k=1454 symbol 2
[0m[93m[PHY] in nr_pdsch_channel_estimation(), nushift 0, p 0, delta 0, config_type 0, rb_offset 0, k 1454, threadid 1
[0m[0m[PHY] PDSCH Channel estimation gNB id 0, PDSCH antenna port 0, slot 17, symbol 2
[0mnushift 2 is illegal!!!
[0m[PHY] [DLSCH] AbsSubframe 126.17 log2_maxh = 8 [log2_maxh0 0 log2_maxh1 0] (910,910)
[0mnushift 2 is illegal!!!
nushift 2 is illegal!!!
nushift 2 is illegal!!!
nushift 2 is illegal!!!
nushift 2 is illegal!!!
[0m[93m[PHY] nr_dlsch_unscrambling Nid_cell 166 rnti 65535
[0m[0m[93m[PHY] DLSCH Decoding, harq_pid 0 TBS 1416 (177) G 5760 nb_re_dmrs 12 mcs 3 Nl 1 nb_symb_sch 6 nb_rb 48 Coderate 251 Qm 2 dmrs_length 1
[0m[0m[93m[PHY] HARQ_PID 0 Rate Matching Segment 0 (coded bits 5760,E 5760, F 8,unpunctured/repeated bits 4320, TBS 1416, mod_order 2, nb_rb 48, Nl 1, rv 0, round 0)...
[0m[0m[93m[PHY] Segment 0(Total 1 time-thid[ 126, 17, 1]) CRC OK
[0m[0m[0m[93m[PHY] byte 0 : 7c
[0m[0m[93m[PHY] byte 1 : 80
[0m[0m[93m[PHY] byte 2 : c
[0m[0m[93m[PHY] byte 3 : a
[0m[0m[93m[PHY] byte 4 : a
[0m[0m[93m[PHY] byte 5 : 30
[0m[0m[93m[PHY] byte 6 : 4
[0m[0m[93m[PHY] byte 7 : 41
[0m[0m[93m[PHY] byte 8 : 8c
[0m[0m[93m[PHY] byte 9 : 4
[0m[0m[93m[MAC] Decode sib1
[0m[0m[1;31m[RRC] history is null
[0m<BCCH-DL-SCH-Message>
<message>
<c1>
<systemInformationBlockType1>
<cellSelectionInfo>
<q-RxLevMin>-64</q-RxLevMin>
</cellSelectionInfo>
<cellAccessRelatedInfo>
<plmn-IdentityList>
<PLMN-IdentityInfo>
<plmn-IdentityList>
<PLMN-Identity>
<mcc>
<MCC-MNC-Digit>4</MCC-MNC-Digit>
<MCC-MNC-Digit>6</MCC-MNC-Digit>
<MCC-MNC-Digit>0</MCC-MNC-Digit>
</mcc>
<mnc>
<MCC-MNC-Digit>1</MCC-MNC-Digit>
<MCC-MNC-Digit>1</MCC-MNC-Digit>
</mnc>
</PLMN-Identity>
</plmn-IdentityList>
<trackingAreaCode>
000001100011000000010000
</trackingAreaCode>
<cellIdentity>
000001100011000110011101000000000010
</cellIdentity>
<cellReservedForOperatorUse><notReserved/></cellReservedForOperatorUse>
</PLMN-IdentityInfo>
<PLMN-IdentityInfo>
<plmn-IdentityList>
<PLMN-Identity>
<mcc>
<MCC-MNC-Digit>4</MCC-MNC-Digit>
<MCC-MNC-Digit>6</MCC-MNC-Digit>
<MCC-MNC-Digit>0</MCC-MNC-Digit>
</mcc>
<mnc>
<MCC-MNC-Digit>0</MCC-MNC-Digit>
<MCC-MNC-Digit>1</MCC-MNC-Digit>
</mnc>
</PLMN-Identity>
</plmn-IdentityList>
<trackingAreaCode>
000001100011000000010000
</trackingAreaCode>
<cellIdentity>
000001100011000110011101000000000010
</cellIdentity>
<cellReservedForOperatorUse><notReserved/></cellReservedForOperatorUse>
</PLMN-IdentityInfo>
</plmn-IdentityList>
</cellAccessRelatedInfo>
<connEstFailureControl>
<connEstFailCount><n1/></connEstFailCount>
<connEstFailOffsetValidity><s30/></connEstFailOffsetValidity>
<connEstFailOffset>1</connEstFailOffset>
</connEstFailureControl>
<si-SchedulingInfo>
<schedulingInfoList>
<SchedulingInfo>
<si-BroadcastStatus><broadcasting/></si-BroadcastStatus>
<si-Periodicity><rf32/></si-Periodicity>
<sib-MappingInfo>
<SIB-TypeInfo>
<type><sibType2/></type>
<valueTag>0</valueTag>
</SIB-TypeInfo>
<SIB-TypeInfo>
<type><sibType4/></type>
<valueTag>0</valueTag>
</SIB-TypeInfo>
</sib-MappingInfo>
</SchedulingInfo>
<SchedulingInfo>
<si-BroadcastStatus><broadcasting/></si-BroadcastStatus>
<si-Periodicity><rf64/></si-Periodicity>
<sib-MappingInfo>
<SIB-TypeInfo>
<type><sibType5/></type>
<valueTag>0</valueTag>
</SIB-TypeInfo>
</sib-MappingInfo>
</SchedulingInfo>
</schedulingInfoList>
<si-WindowLength><s160/></si-WindowLength>
</si-SchedulingInfo>
<servingCellConfigCommon>
<downlinkConfigCommon>
<frequencyInfoDL>
<frequencyBandList>
<NR-MultiBandInfo>
<freqBandIndicatorNR>78</freqBandIndicatorNR>
</NR-MultiBandInfo>
</frequencyBandList>
<offsetToPointA>24</offsetToPointA>
<scs-SpecificCarrierList>
<SCS-SpecificCarrier>
<offsetToCarrier>0</offsetToCarrier>
<subcarrierSpacing><kHz30/></subcarrierSpacing>
<carrierBandwidth>273</carrierBandwidth>
</SCS-SpecificCarrier>
</scs-SpecificCarrierList>
</frequencyInfoDL>
<initialDownlinkBWP>
<genericParameters>
<locationAndBandwidth>1099</locationAndBandwidth>
<subcarrierSpacing><kHz30/></subcarrierSpacing>
</genericParameters>
<pdcch-ConfigCommon>
<setup>
<controlResourceSetZero>10</controlResourceSetZero>
<searchSpaceZero>4</searchSpaceZero>
<commonSearchSpaceList>
<SearchSpace>
<searchSpaceId>1</searchSpaceId>
<controlResourceSetId>0</controlResourceSetId>
<monitoringSlotPeriodicityAndOffset>
<sl1></sl1>
</monitoringSlotPeriodicityAndOffset>
<monitoringSymbolsWithinSlot>
10000000000000
</monitoringSymbolsWithinSlot>
<nrofCandidates>
<aggregationLevel1><n0/></aggregationLevel1>
<aggregationLevel2><n0/></aggregationLevel2>
<aggregationLevel4><n4/></aggregationLevel4>
<aggregationLevel8><n2/></aggregationLevel8>
<aggregationLevel16><n1/></aggregationLevel16>
</nrofCandidates>
<searchSpaceType>
<common>
<dci-Format0-0-AndFormat1-0>
</dci-Format0-0-AndFormat1-0>
</common>
</searchSpaceType>
</SearchSpace>
<SearchSpace>
<searchSpaceId>8</searchSpaceId>
<controlResourceSetId>0</controlResourceSetId>
<monitoringSlotPeriodicityAndOffset>
<sl40>21</sl40>
</monitoringSlotPeriodicityAndOffset>
<duration>2</duration>
<monitoringSymbolsWithinSlot>
10000000000000
</monitoringSymbolsWithinSlot>
<nrofCandidates>
<aggregationLevel1><n0/></aggregationLevel1>
<aggregationLevel2><n0/></aggregationLevel2>
<aggregationLevel4><n4/></aggregationLevel4>
<aggregationLevel8><n2/></aggregationLevel8>
<aggregationLevel16><n1/></aggregationLevel16>
</nrofCandidates>
<searchSpaceType>
<common>
<dci-Format0-0-AndFormat1-0>
</dci-Format0-0-AndFormat1-0>
</common>
</searchSpaceType>
</SearchSpace>
</commonSearchSpaceList>
<searchSpaceSIB1>0</searchSpaceSIB1>
<searchSpaceOtherSystemInformation>8</searchSpaceOtherSystemInformation>
<pagingSearchSpace>1</pagingSearchSpace>
<ra-SearchSpace>1</ra-SearchSpace>
</setup>
</pdcch-ConfigCommon>
<pdsch-ConfigCommon>
<setup>
<pdsch-TimeDomainAllocationList>
<PDSCH-TimeDomainResourceAllocation>
<mappingType><typeA/></mappingType>
<startSymbolAndLength>53</startSymbolAndLength>
</PDSCH-TimeDomainResourceAllocation>
<PDSCH-TimeDomainResourceAllocation>
<mappingType><typeA/></mappingType>
<startSymbolAndLength>67</startSymbolAndLength>
</PDSCH-TimeDomainResourceAllocation>
<PDSCH-TimeDomainResourceAllocation>
<mappingType><typeA/></mappingType>
<startSymbolAndLength>81</startSymbolAndLength>
</PDSCH-TimeDomainResourceAllocation>
<PDSCH-TimeDomainResourceAllocation>
<mappingType><typeA/></mappingType>
<startSymbolAndLength>95</startSymbolAndLength>
</PDSCH-TimeDomainResourceAllocation>
<PDSCH-TimeDomainResourceAllocation>
<mappingType><typeA/></mappingType>
<startSymbolAndLength>100</startSymbolAndLength>
</PDSCH-TimeDomainResourceAllocation>
<PDSCH-TimeDomainResourceAllocation>
<mappingType><typeA/></mappingType>
<startSymbolAndLength>86</startSymbolAndLength>
</PDSCH-TimeDomainResourceAllocation>
<PDSCH-TimeDomainResourceAllocation>
<mappingType><typeA/></mappingType>
<startSymbolAndLength>72</startSymbolAndLength>
</PDSCH-TimeDomainResourceAllocation>
<PDSCH-TimeDomainResourceAllocation>
<mappingType><typeA/></mappingType>
<startSymbolAndLength>58</startSymbolAndLength>
</PDSCH-TimeDomainResourceAllocation>
<PDSCH-TimeDomainResourceAllocation>
<mappingType><typeA/></mappingType>
<startSymbolAndLength>44</startSymbolAndLength>
</PDSCH-TimeDomainResourceAllocation>
<PDSCH-TimeDomainResourceAllocation>
<mappingType><typeA/></mappingType>
<startSymbolAndLength>30</startSymbolAndLength>
</PDSCH-TimeDomainResourceAllocation>
</pdsch-TimeDomainAllocationList>
</setup>
</pdsch-ConfigCommon>
</initialDownlinkBWP>
<bcch-Config>
<modificationPeriodCoeff><n2/></modificationPeriodCoeff>
</bcch-Config>
<pcch-Config>
<defaultPagingCycle><rf128/></defaultPagingCycle>
<nAndPagingFrameOffset>
<halfT>1</halfT>
</nAndPagingFrameOffset>
<ns><one/></ns>
<firstPDCCH-MonitoringOccasionOfPO>
<sCS60KHZoneT-SCS30KHZhalfT-SCS15KHZquarterT>
<INTEGER>7</INTEGER>
</sCS60KHZoneT-SCS30KHZhalfT-SCS15KHZquarterT>
</firstPDCCH-MonitoringOccasionOfPO>
</pcch-Config>
</downlinkConfigCommon>
<uplinkConfigCommon>
<frequencyInfoUL>
<scs-SpecificCarrierList>
<SCS-SpecificCarrier>
<offsetToCarrier>0</offsetToCarrier>
<subcarrierSpacing><kHz30/></subcarrierSpacing>
<carrierBandwidth>273</carrierBandwidth>
</SCS-SpecificCarrier>
</scs-SpecificCarrierList>
<p-Max>26</p-Max>
</frequencyInfoUL>
<initialUplinkBWP>
<genericParameters>
<locationAndBandwidth>1099</locationAndBandwidth>
<subcarrierSpacing><kHz30/></subcarrierSpacing>
</genericParameters>
<rach-ConfigCommon>
<setup>
<rach-ConfigGeneric>
<prach-ConfigurationIndex>17</prach-ConfigurationIndex>
<msg1-FDM><one/></msg1-FDM>
<msg1-FrequencyStart>12</msg1-FrequencyStart>
<zeroCorrelationZoneConfig>6</zeroCorrelationZoneConfig>
<preambleReceivedTargetPower>-100</preambleReceivedTargetPower>
<preambleTransMax><n10/></preambleTransMax>
<powerRampingStep><dB4/></powerRampingStep>
<ra-ResponseWindow><sl20/></ra-ResponseWindow>
</rach-ConfigGeneric>
<ssb-perRACH-OccasionAndCB-PreamblesPerSSB>
<eight>6</eight>
</ssb-perRACH-OccasionAndCB-PreamblesPerSSB>
<ra-ContentionResolutionTimer><sf64/></ra-ContentionResolutionTimer>
<rsrp-ThresholdSSB>36</rsrp-ThresholdSSB>
<prach-RootSequenceIndex>
<l839>234</l839>
</prach-RootSequenceIndex>
<restrictedSetConfig><unrestrictedSet/></restrictedSetConfig>
</setup>
</rach-ConfigCommon>
<pusch-ConfigCommon>
<setup>
<pusch-TimeDomainAllocationList>
<PUSCH-TimeDomainResourceAllocation>
<k2>1</k2>
<mappingType><typeB/></mappingType>
<startSymbolAndLength>27</startSymbolAndLength>
</PUSCH-TimeDomainResourceAllocation>
<PUSCH-TimeDomainResourceAllocation>
<k2>2</k2>
<mappingType><typeB/></mappingType>
<startSymbolAndLength>27</startSymbolAndLength>
</PUSCH-TimeDomainResourceAllocation>
<PUSCH-TimeDomainResourceAllocation>
<k2>3</k2>
<mappingType><typeB/></mappingType>
<startSymbolAndLength>27</startSymbolAndLength>
</PUSCH-TimeDomainResourceAllocation>
<PUSCH-TimeDomainResourceAllocation>
<k2>4</k2>
<mappingType><typeB/></mappingType>
<startSymbolAndLength>27</startSymbolAndLength>
</PUSCH-TimeDomainResourceAllocation>
<PUSCH-TimeDomainResourceAllocation>
<k2>5</k2>
<mappingType><typeB/></mappingType>
<startSymbolAndLength>27</startSymbolAndLength>
</PUSCH-TimeDomainResourceAllocation>
<PUSCH-TimeDomainResourceAllocation>
<k2>6</k2>
<mappingType><typeB/></mappingType>
<startSymbolAndLength>27</startSymbolAndLength>
</PUSCH-TimeDomainResourceAllocation>
<PUSCH-TimeDomainResourceAllocation>
<k2>7</k2>
<mappingType><typeB/></mappingType>
<startSymbolAndLength>27</startSymbolAndLength>
</PUSCH-TimeDomainResourceAllocation>
<PUSCH-TimeDomainResourceAllocation>
<k2>8</k2>
<mappingType><typeB/></mappingType>
<startSymbolAndLength>27</startSymbolAndLength>
</PUSCH-TimeDomainResourceAllocation>
</pusch-TimeDomainAllocationList>
<msg3-DeltaPreamble>4</msg3-DeltaPreamble>
<p0-NominalWithGrant>-74</p0-NominalWithGrant>
</setup>
</pusch-ConfigCommon>
<pucch-ConfigCommon>
<setup>
<pucch-ResourceCommon>12</pucch-ResourceCommon>
<pucch-GroupHopping><neither/></pucch-GroupHopping>
<hoppingId>166</hoppingId>
<p0-nominal>-104</p0-nominal>
</setup>
</pucch-ConfigCommon>
</initialUplinkBWP>
<timeAlignmentTimerCommon><infinity/></timeAlignmentTimerCommon>
</uplinkConfigCommon>
<n-TimingAdvanceOffset><n25600/></n-TimingAdvanceOffset>
<ssb-PositionsInBurst>
<inOneGroup>
11111110
</inOneGroup>
</ssb-PositionsInBurst>
<ssb-PeriodicityServingCell><ms20/></ssb-PeriodicityServingCell>
<tdd-UL-DL-ConfigurationCommon>
<referenceSubcarrierSpacing><kHz30/></referenceSubcarrierSpacing>
<pattern1>
<dl-UL-TransmissionPeriodicity><ms2p5/></dl-UL-TransmissionPeriodicity>
<nrofDownlinkSlots>3</nrofDownlinkSlots>
<nrofDownlinkSymbols>8</nrofDownlinkSymbols>
<nrofUplinkSlots>1</nrofUplinkSlots>
<nrofUplinkSymbols>2</nrofUplinkSymbols>
</pattern1>
<pattern2>
<dl-UL-TransmissionPeriodicity><ms2p5/></dl-UL-TransmissionPeriodicity>
<nrofDownlinkSlots>2</nrofDownlinkSlots>
<nrofDownlinkSymbols>8</nrofDownlinkSymbols>
<nrofUplinkSlots>2</nrofUplinkSlots>
<nrofUplinkSymbols>2</nrofUplinkSymbols>
</pattern2>
</tdd-UL-DL-ConfigurationCommon>
<ss-PBCH-BlockPower>15</ss-PBCH-BlockPower>
</servingCellConfigCommon>
<ue-TimersAndConstants>
<t300><ms1000/></t300>
<t301><ms200/></t301>
<t310><ms1000/></t310>
<n310><n10/></n310>
<t311><ms10000/></t311>
<n311><n1/></n311>
<t319><ms1000/></t319>
</ue-TimersAndConstants>
</systemInformationBlockType1>
</c1>
</message>
</BCCH-DL-SCH-Message>
[0m[1;31m[RRC] NR_BCCH_DL_SCH config sib1 here.
[0m
*******trying to config sib1 info to mac********
[0m[1;31m[RRC] rrc mac config sib1 tdd here.
[0m[0m[93m[PHY] [UE 0] PDSCH type 0 active in nr_slot_rx 19, harq_pid 0 (0), BWPStart 4, rb_start 0, nb_rb 48, symbol_start 1, nb_symbols 6, DMRS mask 4
[0mPDSCH Channel Estimation : ThreadId 1, eNB_offset 0 ch_offset 4096, symbol_offset 4096 OFDM size 2048, Ncp=0, Ns=19, k=1454 symbol 2
[0m[93m[PHY] in nr_pdsch_channel_estimation(), nushift 0, p 0, delta 0, config_type 0, rb_offset 0, k 1454, threadid 1
[0m[0m[PHY] PDSCH Channel estimation gNB id 0, PDSCH antenna port 0, slot 19, symbol 2
[0m[0m[1;31m[PHY] [UE][FATAL] nr_slot_rx 19: no active DLSCH
[0m[0m[MAC] Computing frequency (pointA 626724 => 3400860 KHz (freq_min 3300000 KHz, NR band 78 N_OFFs 620000))
[0m[0m[MAC] Computing frequency (pointA 626724 => 3400860 KHz (freq_min 3300000 KHz, NR band 78 N_OFFs 620000))
[0m[0m[MAC] NR band 78, duplex mode TDD, duplex spacing = 0 KHz
[0m[0m[PHY] ssb_mask 0xfe000000, buf 0xfe
[0m[0m[MAC] Setting TDD configuration period to 5
[0m[0m[PHY] TDD has been properly configurated
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 130.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 132.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 134.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 136.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 138.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 140.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 142.3 ------
[0mRx: 185.074 MB/s
[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 144.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 146.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 148.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 150.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 152.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 154.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 156.3 ------
[0m[0m[PHY] [UE0] Sending synch status to higher layers
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 158.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 160.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 162.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 164.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 166.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 168.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 170.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 172.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 174.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 176.3 ------
[0mTrying DCI candidate 1 of 3 number of candidates, CCE 0 (0), L 4 scrambling is 0
(176.5) Received dci indication (rar rnti 7f,dci format 0,n_CCE 0,payloadSize 39,payload 4bffe36ad3)
[0m[1;31m[PHY] [UE 0] AbsSubFrame 176.5, Mode PRACH: DCI 1 of 1 total DCIs found --> rnti 127 : format 0 with start cce 0 and CCE 0 payloadSize 39 with rnti 127
[0m[0m[MAC] >>>NR_IF_Module i=0, dl_info->dci_ind->number_of_dcis=1 thread_id 1 Time[ 176, 5 ]
[0m[0m[93m[MAC] N_RB = 48
[0m[0m[93m[MAC] dci_size = 39
[0m[0m[93m[MAC] fsize = 11
[0m[0m[93m[MAC] dci_pdu_rel15->frequency_domain_assignment.val = 1215
[0m[0m[93m[MAC] dci_pdu_rel15->time_domain_assignment.val = 15
[0m[0m[93m[MAC] dci_pdu_rel15->vrb_to_prb_mapping.val = 1
[0m[0m[93m[MAC] dci_pdu_rel15->mcs = 24
[0m[0m[93m[MAC] dci_pdu_rel15->tb_scaling = 3
[0m[0m[MAC] In nr_ue_process_dci: Processing received DCI format 1_0 (DL BWP 0) rnti 127
[0m[0m[93m[MAC] riv = 1215
[0m[0m[93m[MAC] n_RB_DLBWP = 48
[0m[0m[93m[MAC] number_rbs = 26
[0m[0m[93m[MAC] start_rb = 15
[0m[0m[1;31m[MAC] time_domain_ind 15 >= pdsch->TimeDomainAllocationList->list.count 10
[0m[0m[93m[MAC] [176.5] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!
[0m[0m[93m[PHY] [UE 0]To Handle x_dlsch Frame 176, nr_slot_rx 5: found 1 DCIs with thread_id 1 active(P 0, SI 0, ra 0, dlsch 0)
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 178.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 180.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 182.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 184.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 186.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 188.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 190.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 192.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 194.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 196.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 198.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 200.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 202.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 204.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 206.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 208.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 210.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 212.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 214.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 216.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 218.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 220.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 222.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 224.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 1
[0m[0m[PHY] ------ Decode MIB: frame.slot 226.3 ------
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0
[0m[0m[PHY] ****decode_MIB 1,slot_pbch 0