diff --git a/drivers/display/display_stm32_ltdc.c b/drivers/display/display_stm32_ltdc.c index d950f5b9dbfb8..ebcaad5ed02fc 100644 --- a/drivers/display/display_stm32_ltdc.c +++ b/drivers/display/display_stm32_ltdc.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -555,19 +556,8 @@ static DEVICE_API(display, stm32_ltdc_display_api) = { }; #if DT_INST_NODE_HAS_PROP(0, ext_sdram) - -#if DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(sdram1)) -#define FRAME_BUFFER_SECTION __stm32_sdram1_section -#elif DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(sdram2)) -#define FRAME_BUFFER_SECTION __stm32_sdram2_section -#elif DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(psram)) -#define FRAME_BUFFER_SECTION __stm32_psram_section -#else -#error "LTDC ext-sdram property in device tree does not reference SDRAM1 or SDRAM2 node or PSRAM "\ - "node" -#define FRAME_BUFFER_SECTION -#endif /* DT_SAME_NODE(DT_INST_PHANDLE(0, ext_sdram), DT_NODELABEL(sdram1)) */ - +#define FRAME_BUFFER_SECTION \ + Z_GENERIC_SECTION(LINKER_DT_NODE_REGION_NAME(DT_INST_PHANDLE(0, ext_sdram))) #else #define FRAME_BUFFER_SECTION #endif /* DT_INST_NODE_HAS_PROP(0, ext_sdram) */ diff --git a/drivers/memc/CMakeLists.txt b/drivers/memc/CMakeLists.txt index acf307ab58334..3b599b2325aba 100644 --- a/drivers/memc/CMakeLists.txt +++ b/drivers/memc/CMakeLists.txt @@ -26,7 +26,5 @@ zephyr_library_sources_ifdef(CONFIG_MEMC_SMARTBOND memc_smartbond_ zephyr_library_sources_ifdef(CONFIG_MEMC_STM32 memc_stm32.c) zephyr_library_sources_ifdef(CONFIG_MEMC_STM32_NOR_PSRAM memc_stm32_nor_psram.c) zephyr_library_sources_ifdef(CONFIG_MEMC_STM32_SDRAM memc_stm32_sdram.c) -zephyr_linker_sources_ifdef(CONFIG_MEMC_STM32_SDRAM SECTIONS memc_stm32_sdram.ld) zephyr_library_sources_ifdef(CONFIG_MEMC_STM32_XSPI_PSRAM memc_stm32_xspi_psram.c) -zephyr_linker_sources_ifdef(CONFIG_MEMC_STM32_XSPI_PSRAM SECTIONS memc_stm32_xspi_psram.ld) diff --git a/drivers/memc/memc_stm32_sdram.ld b/drivers/memc/memc_stm32_sdram.ld deleted file mode 100644 index 6fac24db31f5c..0000000000000 --- a/drivers/memc/memc_stm32_sdram.ld +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2020 Teslabs Engineering S.L. - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdram1), okay) -GROUP_START(SDRAM1) - - SECTION_PROLOGUE(_STM32_SDRAM1_SECTION_NAME, (NOLOAD),) - { - *(.stm32_sdram1) - *(".stm32_sdram1.*") - } GROUP_LINK_IN(SDRAM1) - -GROUP_END(SDRAM1) -#endif - -#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdram2), okay) -GROUP_START(SDRAM2) - - SECTION_PROLOGUE(_STM32_SDRAM2_SECTION_NAME, (NOLOAD),) - { - *(.stm32_sdram2) - *(".stm32_sdram2.*") - } GROUP_LINK_IN(SDRAM2) - -GROUP_END(SDRAM2) -#endif diff --git a/drivers/memc/memc_stm32_xspi_psram.ld b/drivers/memc/memc_stm32_xspi_psram.ld deleted file mode 100644 index 6ef15da284154..0000000000000 --- a/drivers/memc/memc_stm32_xspi_psram.ld +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (c) 2025 STMicroelectronics - * - * SPDX-License-Identifier: Apache-2.0 - */ -#if DT_NODE_HAS_STATUS(DT_NODELABEL(psram), okay) -GROUP_START(PSRAM) - - SECTION_PROLOGUE(_STM32_PSRAM_SECTION_NAME, (NOLOAD),) - { - *(.stm32_psram) - *(".stm32_psram.*") - } GROUP_LINK_IN(PSRAM) - -GROUP_END(PSRAM) -#endif diff --git a/dts/arm/st/c0/stm32c0.dtsi b/dts/arm/st/c0/stm32c0.dtsi index c2b3fa97a5f1c..8514470daa263 100644 --- a/dts/arm/st/c0/stm32c0.dtsi +++ b/dts/arm/st/c0/stm32c0.dtsi @@ -104,7 +104,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/f0/stm32f0.dtsi b/dts/arm/st/f0/stm32f0.dtsi index b84c58ad03fb3..a0a5040a144c6 100644 --- a/dts/arm/st/f0/stm32f0.dtsi +++ b/dts/arm/st/f0/stm32f0.dtsi @@ -35,7 +35,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/f1/stm32f1.dtsi b/dts/arm/st/f1/stm32f1.dtsi index 2b30899beba86..27155620a99e3 100644 --- a/dts/arm/st/f1/stm32f1.dtsi +++ b/dts/arm/st/f1/stm32f1.dtsi @@ -55,7 +55,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/f2/stm32f2.dtsi b/dts/arm/st/f2/stm32f2.dtsi index 18065fc7aab7c..ae1e088bf3ab9 100644 --- a/dts/arm/st/f2/stm32f2.dtsi +++ b/dts/arm/st/f2/stm32f2.dtsi @@ -37,7 +37,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/f3/stm32f3.dtsi b/dts/arm/st/f3/stm32f3.dtsi index fc2df62e67b5c..3858131334a12 100644 --- a/dts/arm/st/f3/stm32f3.dtsi +++ b/dts/arm/st/f3/stm32f3.dtsi @@ -34,7 +34,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/f4/stm32f4.dtsi b/dts/arm/st/f4/stm32f4.dtsi index c4b729ac0c9c8..6fbc8458e6c4f 100644 --- a/dts/arm/st/f4/stm32f4.dtsi +++ b/dts/arm/st/f4/stm32f4.dtsi @@ -55,7 +55,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/g0/stm32g0.dtsi b/dts/arm/st/g0/stm32g0.dtsi index 4dce12f36f6a6..576224475efb4 100644 --- a/dts/arm/st/g0/stm32g0.dtsi +++ b/dts/arm/st/g0/stm32g0.dtsi @@ -55,7 +55,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/g4/stm32g4.dtsi b/dts/arm/st/g4/stm32g4.dtsi index 6d7547fd58598..c6a95059678d1 100644 --- a/dts/arm/st/g4/stm32g4.dtsi +++ b/dts/arm/st/g4/stm32g4.dtsi @@ -53,7 +53,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/h5/stm32h503Xb.dtsi b/dts/arm/st/h5/stm32h503Xb.dtsi index 2ab6e3ae0a77f..22fc4d042dfcc 100644 --- a/dts/arm/st/h5/stm32h503Xb.dtsi +++ b/dts/arm/st/h5/stm32h503Xb.dtsi @@ -8,7 +8,9 @@ / { sram0: memory@20000000 { + compatible = "zephyr,memory-region", "mmio-sram"; reg = <0x20000000 DT_SIZE_K(32)>; + zephyr,memory-region = "SRAM0"; }; soc { diff --git a/dts/arm/st/h7/stm32h723.dtsi b/dts/arm/st/h7/stm32h723.dtsi index 7a691d4c1fefa..bc1e7ce69faa9 100644 --- a/dts/arm/st/h7/stm32h723.dtsi +++ b/dts/arm/st/h7/stm32h723.dtsi @@ -195,7 +195,8 @@ /* D1 domain, AXI SRAM (128KB with shared ITCM 192KB as `TCM_AXI_SHARED` is `000`) */ sram0: memory@24000000 { reg = <0x24000000 DT_SIZE_K(320)>; - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; /* D2 domain, AHB SRAM */ diff --git a/dts/arm/st/h7/stm32h742.dtsi b/dts/arm/st/h7/stm32h742.dtsi index 93eb5aa92255e..ab3db8ec61675 100644 --- a/dts/arm/st/h7/stm32h742.dtsi +++ b/dts/arm/st/h7/stm32h742.dtsi @@ -64,8 +64,9 @@ /* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */ sram0: memory@24000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; reg = <0x24000000 DT_SIZE_K(384)>; + zephyr,memory-region = "SRAM0"; }; /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */ diff --git a/dts/arm/st/h7/stm32h745.dtsi b/dts/arm/st/h7/stm32h745.dtsi index 039b7a2d62d0b..ba10970e76bfb 100644 --- a/dts/arm/st/h7/stm32h745.dtsi +++ b/dts/arm/st/h7/stm32h745.dtsi @@ -93,7 +93,8 @@ /* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */ sram0: memory@24000000 { reg = <0x24000000 DT_SIZE_K(512)>; - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */ diff --git a/dts/arm/st/h7/stm32h7a3.dtsi b/dts/arm/st/h7/stm32h7a3.dtsi index 030b89552b373..aa06c02a0a3f3 100644 --- a/dts/arm/st/h7/stm32h7a3.dtsi +++ b/dts/arm/st/h7/stm32h7a3.dtsi @@ -112,8 +112,9 @@ /* System data RAM accessible over AXI bus: AXI SRAM1 in CD domain */ sram0: memory@24000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; reg = <0x24000000 DT_SIZE_K(256)>; + zephyr,memory-region = "SRAM0"; }; /* System data RAM accessible over AXI bus: AXI SRAM2 in CD domain */ diff --git a/dts/arm/st/h7rs/stm32h7rs.dtsi b/dts/arm/st/h7rs/stm32h7rs.dtsi index 4aefbdc851fed..25971e003f5b6 100644 --- a/dts/arm/st/h7rs/stm32h7rs.dtsi +++ b/dts/arm/st/h7rs/stm32h7rs.dtsi @@ -50,8 +50,9 @@ /* System data RAM accessible over AXI bus: AXI SRAM1 in CD domain */ sram0: memory@24000000 { - compatible = "mmio-sram"; reg = <0x24000000 DT_SIZE_K(128)>; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */ diff --git a/dts/arm/st/l0/stm32l0.dtsi b/dts/arm/st/l0/stm32l0.dtsi index 1dc2c16e15b8d..4167edd033b9e 100644 --- a/dts/arm/st/l0/stm32l0.dtsi +++ b/dts/arm/st/l0/stm32l0.dtsi @@ -44,7 +44,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/l1/stm32l1.dtsi b/dts/arm/st/l1/stm32l1.dtsi index 8911443e0d1b6..a917334f25abe 100644 --- a/dts/arm/st/l1/stm32l1.dtsi +++ b/dts/arm/st/l1/stm32l1.dtsi @@ -54,7 +54,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/l4/stm32l4.dtsi b/dts/arm/st/l4/stm32l4.dtsi index 2dc20e93b4519..eda7ea9d6c416 100644 --- a/dts/arm/st/l4/stm32l4.dtsi +++ b/dts/arm/st/l4/stm32l4.dtsi @@ -62,7 +62,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/l4/stm32l471.dtsi b/dts/arm/st/l4/stm32l471.dtsi index 419e5c2857b6d..368b0c37695da 100644 --- a/dts/arm/st/l4/stm32l471.dtsi +++ b/dts/arm/st/l4/stm32l471.dtsi @@ -7,6 +7,11 @@ #include / { + sram1: memory@10000000 { + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM1"; + }; + clocks { pllsai2: pllsai2 { #clock-cells = <0>; diff --git a/dts/arm/st/l4/stm32l4p5.dtsi b/dts/arm/st/l4/stm32l4p5.dtsi index f7173342d7e1d..15ee5f0f0e1d9 100644 --- a/dts/arm/st/l4/stm32l4p5.dtsi +++ b/dts/arm/st/l4/stm32l4p5.dtsi @@ -18,10 +18,14 @@ }; sram1: memory@10000000 { + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM1"; reg = <0x10000000 DT_SIZE_K(64)>; }; sram2: memory@20030000 { + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM2"; reg = <0x20030000 DT_SIZE_K(128)>; }; diff --git a/dts/arm/st/l4/stm32l4r5.dtsi b/dts/arm/st/l4/stm32l4r5.dtsi index be76d8a2d9a91..352512bef45d9 100644 --- a/dts/arm/st/l4/stm32l4r5.dtsi +++ b/dts/arm/st/l4/stm32l4r5.dtsi @@ -21,6 +21,8 @@ }; sram2: memory@20040000 { + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM2"; reg = <0x20040000 DT_SIZE_K(384)>; }; diff --git a/dts/arm/st/l5/stm32l5.dtsi b/dts/arm/st/l5/stm32l5.dtsi index a7875d0fc0346..4102b9b5088fe 100644 --- a/dts/arm/st/l5/stm32l5.dtsi +++ b/dts/arm/st/l5/stm32l5.dtsi @@ -68,7 +68,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/mp1/stm32mp157.dtsi b/dts/arm/st/mp1/stm32mp157.dtsi index eb412055bac97..eda7922f65a4d 100644 --- a/dts/arm/st/mp1/stm32mp157.dtsi +++ b/dts/arm/st/mp1/stm32mp157.dtsi @@ -31,12 +31,14 @@ }; retram: memory0@0 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; reg = <0x00000000 DT_SIZE_K(64)>; + zephyr,memory-region = "RETRAM"; }; mcusram: memory1@10000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "MCUSRAM"; reg = <0x10000000 DT_SIZE_K(320)>; }; diff --git a/dts/arm/st/mp13/stm32mp13.dtsi b/dts/arm/st/mp13/stm32mp13.dtsi index 0b6fcd4805f25..60f69adb126fe 100644 --- a/dts/arm/st/mp13/stm32mp13.dtsi +++ b/dts/arm/st/mp13/stm32mp13.dtsi @@ -43,7 +43,8 @@ interrupt-parent = <&gic>; sysram: memory@2ffe0000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SYSRAM"; reg = <0x2FFE0000 DT_SIZE_K(128)>; }; @@ -257,12 +258,14 @@ }; ddr_code: memory@C0000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "DDR_CODE"; reg = <0xC0000000 0x10000000>; }; ddr_data: memory@D0000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "DDR_DATA"; reg = <0xD0000000 0x10000000>; }; diff --git a/dts/arm/st/mp2/stm32mp2_m33.dtsi b/dts/arm/st/mp2/stm32mp2_m33.dtsi index 1d52adb6c97ea..9bf80bf93e4ac 100644 --- a/dts/arm/st/mp2/stm32mp2_m33.dtsi +++ b/dts/arm/st/mp2/stm32mp2_m33.dtsi @@ -25,11 +25,13 @@ }; ddr_code: memory0@80100000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "DDR_CODE"; }; ddr_sys: memory1@80a00000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "DDR_SYS"; }; soc { diff --git a/dts/arm/st/n6/stm32n6.dtsi b/dts/arm/st/n6/stm32n6.dtsi index 6c9a39797c74c..c06a499b4cfce 100644 --- a/dts/arm/st/n6/stm32n6.dtsi +++ b/dts/arm/st/n6/stm32n6.dtsi @@ -39,11 +39,13 @@ }; axisram1: memory@34000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "AXISRAM1"; }; axisram2: memory@34180400 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "AXISRAM2"; }; clocks { diff --git a/dts/arm/st/u0/stm32u0.dtsi b/dts/arm/st/u0/stm32u0.dtsi index 1dbd3e219f427..d4b09f630dac3 100644 --- a/dts/arm/st/u0/stm32u0.dtsi +++ b/dts/arm/st/u0/stm32u0.dtsi @@ -59,7 +59,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/u3/stm32u3.dtsi b/dts/arm/st/u3/stm32u3.dtsi index 5ffc210607386..f143cdd62d046 100644 --- a/dts/arm/st/u3/stm32u3.dtsi +++ b/dts/arm/st/u3/stm32u3.dtsi @@ -33,7 +33,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/u5/stm32u5.dtsi b/dts/arm/st/u5/stm32u5.dtsi index 425c768b7a1bb..d2804836028ba 100644 --- a/dts/arm/st/u5/stm32u5.dtsi +++ b/dts/arm/st/u5/stm32u5.dtsi @@ -78,7 +78,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/wb/stm32wb.dtsi b/dts/arm/st/wb/stm32wb.dtsi index a8964241fcda3..5283fc9c12e3b 100644 --- a/dts/arm/st/wb/stm32wb.dtsi +++ b/dts/arm/st/wb/stm32wb.dtsi @@ -62,7 +62,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; sram1: memory@20030000 { diff --git a/dts/arm/st/wb0/stm32wb0.dtsi b/dts/arm/st/wb0/stm32wb0.dtsi index 12bc7719c9f39..ee66bd2ce67a5 100644 --- a/dts/arm/st/wb0/stm32wb0.dtsi +++ b/dts/arm/st/wb0/stm32wb0.dtsi @@ -38,7 +38,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/dts/arm/st/wba/stm32wba.dtsi b/dts/arm/st/wba/stm32wba.dtsi index d560e44b18a8d..94927a69be20d 100644 --- a/dts/arm/st/wba/stm32wba.dtsi +++ b/dts/arm/st/wba/stm32wba.dtsi @@ -74,7 +74,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; /* Defining this memory solves unaligned memory access issue */ diff --git a/dts/arm/st/wl/stm32wl.dtsi b/dts/arm/st/wl/stm32wl.dtsi index 967ffcc5254b4..dcf4cc12c1871 100644 --- a/dts/arm/st/wl/stm32wl.dtsi +++ b/dts/arm/st/wl/stm32wl.dtsi @@ -60,7 +60,8 @@ }; sram0: memory@20000000 { - compatible = "mmio-sram"; + compatible = "zephyr,memory-region", "mmio-sram"; + zephyr,memory-region = "SRAM0"; }; clocks { diff --git a/include/zephyr/linker/section_tags.h b/include/zephyr/linker/section_tags.h index e0124575b6667..5b51f0421c90f 100644 --- a/include/zephyr/linker/section_tags.h +++ b/include/zephyr/linker/section_tags.h @@ -45,9 +45,6 @@ #define __imx_boot_ivt_section Z_GENERIC_SECTION(_IMX_BOOT_IVT_SECTION_NAME) #define __imx_boot_dcd_section Z_GENERIC_SECTION(_IMX_BOOT_DCD_SECTION_NAME) #define __imx_boot_container_section Z_GENERIC_SECTION(_IMX_BOOT_CONTAINER_SECTION_NAME) -#define __stm32_sdram1_section Z_GENERIC_SECTION(_STM32_SDRAM1_SECTION_NAME) -#define __stm32_sdram2_section Z_GENERIC_SECTION(_STM32_SDRAM2_SECTION_NAME) -#define __stm32_psram_section Z_GENERIC_SECTION(_STM32_PSRAM_SECTION_NAME) #define __stm32_backup_sram_section Z_GENERIC_SECTION(_STM32_BACKUP_SRAM_SECTION_NAME) #endif /* CONFIG_ARM */ diff --git a/include/zephyr/linker/sections.h b/include/zephyr/linker/sections.h index ef9f4463bea5c..d58e206486e82 100644 --- a/include/zephyr/linker/sections.h +++ b/include/zephyr/linker/sections.h @@ -69,10 +69,6 @@ #define _IMX_BOOT_DCD_SECTION_NAME .boot_hdr.dcd_data #define _IMX_BOOT_CONTAINER_SECTION_NAME .boot_hdr.container -#define _STM32_SDRAM1_SECTION_NAME .stm32_sdram1 -#define _STM32_SDRAM2_SECTION_NAME .stm32_sdram2 -#define _STM32_PSRAM_SECTION_NAME .stm32_psram - #define _STM32_BACKUP_SRAM_SECTION_NAME .stm32_backup_sram #ifdef CONFIG_NOCACHE_MEMORY