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drivers: memc: {stm32_xspi_psram,stm32_ospi_psram}: make NCS boundary configurable in dt #96545

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Merged
kartben merged 3 commits into from
Oct 2, 2025
Merged

drivers: memc: {stm32_xspi_psram,stm32_ospi_psram}: make NCS boundary configurable in dt #96545

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bdce458
drivers: memc: stm32_xspi_psram: make NCS boundary configurable in dt
arthur-mmlw Sep 25, 2025
3e26ebf
drivers: memc: stm32_ospi_psram: make NCS boundary configurable in dt
arthur-mmlw Sep 25, 2025
88c2fcf
boards: st: Set csbounds explicitly instead of relying on default value
arthur-mmlw Sep 26, 2025
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1 change: 1 addition & 0 deletions boards/st/b_u585i_iot02a/b_u585i_iot02a-common.dtsi
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Expand Up @@ -151,6 +151,7 @@ stm32_lp_tick_source: &lptim1 {
max-frequency = <DT_FREQ_M(133)>;
fixed-latency;
burst-length = <3>;
st,csbound = <10>;
status = "okay";
};
};
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1 change: 1 addition & 0 deletions boards/st/stm32h7s78_dk/stm32h7s78_dk.dts
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Expand Up @@ -217,6 +217,7 @@
read-latency = <4>;
write-latency = <1>;
burst-length = <0>;
st,csbound = <11>;
status = "okay";
};
};
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1 change: 1 addition & 0 deletions boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi
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Expand Up @@ -336,6 +336,7 @@ zephyr_udc0: &usbotg_hs1 {
read-latency = <4>;
write-latency = <1>;
burst-length = <0>;
st,csbound = <11>;
status = "okay";
};
};
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2 changes: 1 addition & 1 deletion drivers/memc/memc_stm32_ospi_psram.c
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Expand Up @@ -435,7 +435,7 @@ static struct memc_stm32_ospi_psram_data memc_stm32_ospi_data = {
.WrapSize = HAL_OSPI_WRAP_NOT_SUPPORTED,
.SampleShifting = HAL_OSPI_SAMPLE_SHIFTING_NONE,
.DelayHoldQuarterCycle = HAL_OSPI_DHQC_ENABLE,
.ChipSelectBoundary = 10,
.ChipSelectBoundary = DT_INST_PROP(0, st_csbound),
.DelayBlockBypass = HAL_OSPI_DELAY_BLOCK_USED,
.MaxTran = 0,
.Refresh = 320,
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2 changes: 1 addition & 1 deletion drivers/memc/memc_stm32_xspi_psram.c
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Expand Up @@ -400,7 +400,7 @@ static struct memc_stm32_xspi_psram_data memc_stm32_xspi_data = {
.WrapSize = HAL_XSPI_WRAP_NOT_SUPPORTED,
.SampleShifting = HAL_XSPI_SAMPLE_SHIFT_NONE,
.DelayHoldQuarterCycle = HAL_XSPI_DHQC_ENABLE,
.ChipSelectBoundary = HAL_XSPI_BONDARYOF_16KB,
.ChipSelectBoundary = DT_INST_PROP(0, st_csbound),
.MaxTran = 0U,
.Refresh = 0x81U,
.MemorySelect = HAL_XSPI_CSSEL_NCS1,
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13 changes: 13 additions & 0 deletions dts/bindings/memory-controllers/st,stm32-ospi-psram.yaml
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Expand Up @@ -147,3 +147,16 @@ properties:
If enabled, the device will burst through the initial wrapped burst length
once, then continue to burst incrementally up to maximum column address
(1K) before wrapping around within the entire column address space.

st,csbound:
type: int
default: 3
description: |
Limit a transaction to a boundary of aligned addresses. The size of the
alignment is given by the value: 2^(csbound) bits.
A csbound value of 0 means the feature is disabled.
The default is the minimum recommended value in the Reference Manual. It
is recommended to set this value according to the length of the burst wrap
of the PSRAM device for the linear burst command.
enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13 changes: 13 additions & 0 deletions dts/bindings/memory-controllers/st,stm32-xspi-psram.yaml
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Expand Up @@ -146,3 +146,16 @@ properties:
once, then continue to burst incrementally up to maximum column address
(2K in X8 mode/1K in X16 mode) before wrapping around within the entire
column address space

st,csbound:
type: int
default: 3
description: |
Limit a transaction to a boundary of aligned addresses. The size of the
alignment is given by the value: 2^(csbound) bits.
A csbound value of 0 means the feature is disabled.
The default is the minimum recommended value in the Reference Manual. It
is recommended to set this value according to the length of the burst wrap
of the PSRAM device for the linear burst command.
enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]