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Update (2023.07.03)
23738: [C2][LA] enable misaligned vectors store/load 29261: LA intrinsics for compareUnsigned method in Integer and Long 29201: LA port of 8283186: Explicitly pass a third temp register to MacroAssembler::store_heap_oop 31010: LA port of 8304915: Create jdk.internal.util.Architecture enum and apply 30943: LA port of 8303588: [JVMCI] make JVMCI source directories conform with standard layout 30829: LA port of 8291555: Implement alternative fast-locking scheme 30358: Add support for ordering memory barriers 30777: testlibrary_tests/ir_framework/tests/TestDFlags.java fail with VerifyOops 30895: LA port of 8302815: Use new Math.clamp method in core libraries 30894: TestArrayStructs.java fails after JDK-8303604
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src/hotspot/cpu/loongarch/assembler_loongarch.hpp

Lines changed: 23 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1385,6 +1385,15 @@ class Assembler : public AbstractAssembler {
13851385
static int high6 (int x) { return high(x, 6); }
13861386

13871387

1388+
static ALWAYSINLINE void patch(address a, int length, uint32_t val) {
1389+
guarantee(val < (1ULL << length), "Field too big for insn");
1390+
guarantee(length > 0, "length > 0");
1391+
unsigned target = *(unsigned *)a;
1392+
target = (target >> length) << length;
1393+
target |= val;
1394+
*(unsigned *)a = target;
1395+
}
1396+
13881397
protected:
13891398
// help methods for instruction ejection
13901399

@@ -2188,18 +2197,25 @@ class Assembler : public AbstractAssembler {
21882197
void bceqz(ConditionalFlagRegister cj, Label& L) { bceqz(cj, target(L)); }
21892198
void bcnez(ConditionalFlagRegister cj, Label& L) { bcnez(cj, target(L)); }
21902199

2191-
// Now Membar_mask_bits is 0,Need to fix it after LA6000
21922200
typedef enum {
2193-
StoreStore = 0,
2194-
LoadStore = 0,
2195-
StoreLoad = 0,
2196-
LoadLoad = 0,
2197-
AnyAny = 0
2201+
// hint[4]
2202+
Completion = 0,
2203+
Ordering = (1 << 4),
2204+
2205+
// The bitwise-not of the below constants is corresponding to the hint. This is convenient for OR operation.
2206+
// hint[3:2] and hint[1:0]
2207+
LoadLoad = ((1 << 3) | (1 << 1)),
2208+
LoadStore = ((1 << 3) | (1 << 0)),
2209+
StoreLoad = ((1 << 2) | (1 << 1)),
2210+
StoreStore = ((1 << 2) | (1 << 0)),
2211+
AnyAny = ((3 << 2) | (3 << 0)),
21982212
} Membar_mask_bits;
21992213

22002214
// Serializes memory and blows flags
22012215
void membar(Membar_mask_bits hint) {
2202-
dbar(hint);
2216+
assert((hint & (3 << 0)) != 0, "membar mask unsupported!");
2217+
assert((hint & (3 << 2)) != 0, "membar mask unsupported!");
2218+
dbar(Ordering | (~hint & 0xf));
22032219
}
22042220

22052221
// LSX and LASX

src/hotspot/cpu/loongarch/c1_LIRAssembler_loongarch_64.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -387,7 +387,7 @@ int LIR_Assembler::emit_unwind_handler() {
387387
if (method()->is_synchronized()) {
388388
monitor_address(0, FrameMap::a0_opr);
389389
stub = new MonitorExitStub(FrameMap::a0_opr, true, 0);
390-
if (UseHeavyMonitors) {
390+
if (LockingMode == LM_MONITOR) {
391391
__ b(*stub->entry());
392392
} else {
393393
__ unlock_object(A5, A4, A0, *stub->entry());
@@ -2818,7 +2818,7 @@ void LIR_Assembler::emit_lock(LIR_OpLock* op) {
28182818
Register obj = op->obj_opr()->as_register(); // may not be an oop
28192819
Register hdr = op->hdr_opr()->as_register();
28202820
Register lock = op->lock_opr()->as_register();
2821-
if (UseHeavyMonitors) {
2821+
if (LockingMode == LM_MONITOR) {
28222822
if (op->info() != nullptr) {
28232823
add_debug_info_for_null_check_here(op->info());
28242824
__ null_check(obj, -1);

src/hotspot/cpu/loongarch/c1_MacroAssembler_loongarch_64.cpp

Lines changed: 68 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -40,9 +40,8 @@
4040
int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr, Label& slow_case) {
4141
const int aligned_mask = BytesPerWord -1;
4242
const int hdr_offset = oopDesc::mark_offset_in_bytes();
43-
assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
43+
assert_different_registers(hdr, obj, disp_hdr);
4444
int null_check_offset = -1;
45-
Label done;
4645

4746
verify_oop(obj);
4847

@@ -61,39 +60,44 @@ int C1_MacroAssembler::lock_object(Register hdr, Register obj, Register disp_hdr
6160

6261
// Load object header
6362
ld_d(hdr, Address(obj, hdr_offset));
64-
// and mark it as unlocked
65-
ori(hdr, hdr, markWord::unlocked_value);
66-
// save unlocked object header into the displaced header location on the stack
67-
st_d(hdr, Address(disp_hdr, 0));
68-
// test if object header is still the same (i.e. unlocked), and if so, store the
69-
// displaced header address in the object header - if it is not the same, get the
70-
// object header instead
71-
lea(SCR2, Address(obj, hdr_offset));
72-
cmpxchg(Address(SCR2, 0), hdr, disp_hdr, SCR1, true, false, done);
73-
// if the object header was the same, we're done
74-
// if the object header was not the same, it is now in the hdr register
75-
// => test if it is a stack pointer into the same stack (recursive locking), i.e.:
76-
//
77-
// 1) (hdr & aligned_mask) == 0
78-
// 2) sp <= hdr
79-
// 3) hdr <= sp + page_size
80-
//
81-
// these 3 tests can be done by evaluating the following expression:
82-
//
83-
// (hdr - sp) & (aligned_mask - page_size)
84-
//
85-
// assuming both the stack pointer and page_size have their least
86-
// significant 2 bits cleared and page_size is a power of 2
87-
sub_d(hdr, hdr, SP);
88-
li(SCR1, aligned_mask - os::vm_page_size());
89-
andr(hdr, hdr, SCR1);
90-
// for recursive locking, the result is zero => save it in the displaced header
91-
// location (null in the displaced hdr location indicates recursive locking)
92-
st_d(hdr, Address(disp_hdr, 0));
93-
// otherwise we don't care about the result and handle locking via runtime call
94-
bnez(hdr, slow_case);
95-
// done
96-
bind(done);
63+
if (LockingMode == LM_LIGHTWEIGHT) {
64+
fast_lock(obj, hdr, SCR1, SCR2, slow_case);
65+
} else if (LockingMode == LM_LEGACY) {
66+
Label done;
67+
// and mark it as unlocked
68+
ori(hdr, hdr, markWord::unlocked_value);
69+
// save unlocked object header into the displaced header location on the stack
70+
st_d(hdr, Address(disp_hdr, 0));
71+
// test if object header is still the same (i.e. unlocked), and if so, store the
72+
// displaced header address in the object header - if it is not the same, get the
73+
// object header instead
74+
lea(SCR2, Address(obj, hdr_offset));
75+
cmpxchg(Address(SCR2, 0), hdr, disp_hdr, SCR1, true, false, done);
76+
// if the object header was the same, we're done
77+
// if the object header was not the same, it is now in the hdr register
78+
// => test if it is a stack pointer into the same stack (recursive locking), i.e.:
79+
//
80+
// 1) (hdr & aligned_mask) == 0
81+
// 2) sp <= hdr
82+
// 3) hdr <= sp + page_size
83+
//
84+
// these 3 tests can be done by evaluating the following expression:
85+
//
86+
// (hdr - sp) & (aligned_mask - page_size)
87+
//
88+
// assuming both the stack pointer and page_size have their least
89+
// significant 2 bits cleared and page_size is a power of 2
90+
sub_d(hdr, hdr, SP);
91+
li(SCR1, aligned_mask - os::vm_page_size());
92+
andr(hdr, hdr, SCR1);
93+
// for recursive locking, the result is zero => save it in the displaced header
94+
// location (null in the displaced hdr location indicates recursive locking)
95+
st_d(hdr, Address(disp_hdr, 0));
96+
// otherwise we don't care about the result and handle locking via runtime call
97+
bnez(hdr, slow_case);
98+
// done
99+
bind(done);
100+
}
97101
increment(Address(TREG, JavaThread::held_monitor_count_offset()), 1);
98102
return null_check_offset;
99103
}
@@ -104,27 +108,39 @@ void C1_MacroAssembler::unlock_object(Register hdr, Register obj, Register disp_
104108
assert(hdr != obj && hdr != disp_hdr && obj != disp_hdr, "registers must be different");
105109
Label done;
106110

107-
// load displaced header
108-
ld_d(hdr, Address(disp_hdr, 0));
109-
// if the loaded hdr is null we had recursive locking
110-
// if we had recursive locking, we are done
111-
beqz(hdr, done);
111+
if (LockingMode != LM_LIGHTWEIGHT) {
112+
// load displaced header
113+
ld_d(hdr, Address(disp_hdr, 0));
114+
// if the loaded hdr is null we had recursive locking
115+
// if we had recursive locking, we are done
116+
beqz(hdr, done);
117+
}
118+
112119
// load object
113120
ld_d(obj, Address(disp_hdr, BasicObjectLock::obj_offset_in_bytes()));
114121
verify_oop(obj);
115-
// test if object header is pointing to the displaced header, and if so, restore
116-
// the displaced header in the object - if the object header is not pointing to
117-
// the displaced header, get the object header instead
118-
// if the object header was not pointing to the displaced header,
119-
// we do unlocking via runtime call
120-
if (hdr_offset) {
121-
lea(SCR1, Address(obj, hdr_offset));
122-
cmpxchg(Address(SCR1, 0), disp_hdr, hdr, SCR2, false, false, done, &slow_case);
123-
} else {
124-
cmpxchg(Address(obj, 0), disp_hdr, hdr, SCR2, false, false, done, &slow_case);
122+
if (LockingMode == LM_LIGHTWEIGHT) {
123+
ld_d(hdr, Address(obj, oopDesc::mark_offset_in_bytes()));
124+
// We cannot use tbnz here, the target might be too far away and cannot
125+
// be encoded.
126+
andi(AT, hdr, markWord::monitor_value);
127+
bnez(AT, slow_case);
128+
fast_unlock(obj, hdr, SCR1, SCR2, slow_case);
129+
} else if (LockingMode == LM_LEGACY) {
130+
// test if object header is pointing to the displaced header, and if so, restore
131+
// the displaced header in the object - if the object header is not pointing to
132+
// the displaced header, get the object header instead
133+
// if the object header was not pointing to the displaced header,
134+
// we do unlocking via runtime call
135+
if (hdr_offset) {
136+
lea(SCR1, Address(obj, hdr_offset));
137+
cmpxchg(Address(SCR1, 0), disp_hdr, hdr, SCR2, false, false, done, &slow_case);
138+
} else {
139+
cmpxchg(Address(obj, 0), disp_hdr, hdr, SCR2, false, false, done, &slow_case);
140+
}
141+
// done
142+
bind(done);
125143
}
126-
// done
127-
bind(done);
128144
decrement(Address(TREG, JavaThread::held_monitor_count_offset()), 1);
129145
}
130146

src/hotspot/cpu/loongarch/c1_Runtime1_loongarch_64.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -551,7 +551,7 @@ OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
551551
{ Label L;
552552
__ get_thread(SCR1);
553553
__ beq(TREG, SCR1, L);
554-
__ stop("StubAssembler::call_RT: rthread not callee saved?");
554+
__ stop("StubAssembler::call_RT: TREG not callee saved?");
555555
__ bind(L);
556556
}
557557
#endif

src/hotspot/cpu/loongarch/c2_CodeStubs_loongarch.cpp

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@
2626
#include "precompiled.hpp"
2727
#include "opto/c2_MacroAssembler.hpp"
2828
#include "opto/c2_CodeStubs.hpp"
29+
#include "runtime/objectMonitor.hpp"
2930
#include "runtime/sharedRuntime.hpp"
3031
#include "runtime/stubRoutines.hpp"
3132

@@ -61,4 +62,30 @@ void C2EntryBarrierStub::emit(C2_MacroAssembler& masm) {
6162
__ emit_int32(0); // nmethod guard value
6263
}
6364

65+
int C2HandleAnonOMOwnerStub::max_size() const {
66+
// Max size of stub has been determined by testing with 0, in which case
67+
// C2CodeStubList::emit() will throw an assertion and report the actual size that
68+
// is needed.
69+
return 24;
70+
}
71+
72+
void C2HandleAnonOMOwnerStub::emit(C2_MacroAssembler& masm) {
73+
__ bind(entry());
74+
Register mon = monitor();
75+
Register t = tmp();
76+
assert(t != noreg, "need tmp register");
77+
// Fix owner to be the current thread.
78+
__ st_d(TREG, Address(mon, ObjectMonitor::owner_offset_in_bytes()));
79+
80+
// Pop owner object from lock-stack.
81+
__ ld_wu(t, Address(TREG, JavaThread::lock_stack_top_offset()));
82+
__ addi_w(t, t, -oopSize);
83+
#ifdef ASSERT
84+
__ stx_d(R0, TREG, t);
85+
#endif
86+
__ st_w(t, Address(TREG, JavaThread::lock_stack_top_offset()));
87+
88+
__ b(continuation());
89+
}
90+
6491
#undef __

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