Skip to content
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.

Commit 99e6a28

Browse files
committedMay 30, 2024
Add f16/f128 handling in a couple places
1 parent f6e4703 commit 99e6a28

File tree

2 files changed

+4
-0
lines changed
  • compiler

2 files changed

+4
-0
lines changed
 

‎compiler/rustc_codegen_llvm/src/abi.rs

+2
Original file line numberDiff line numberDiff line change
@@ -121,8 +121,10 @@ impl LlvmType for Reg {
121121
match self.kind {
122122
RegKind::Integer => cx.type_ix(self.size.bits()),
123123
RegKind::Float => match self.size.bits() {
124+
16 => cx.type_f16(),
124125
32 => cx.type_f32(),
125126
64 => cx.type_f64(),
127+
128 => cx.type_f128(),
126128
_ => bug!("unsupported float: {:?}", self),
127129
},
128130
RegKind::Vector => cx.type_vector(cx.type_i8(), self.size.bytes()),

‎compiler/rustc_target/src/abi/call/mod.rs

+2
Original file line numberDiff line numberDiff line change
@@ -236,8 +236,10 @@ impl Reg {
236236
_ => panic!("unsupported integer: {self:?}"),
237237
},
238238
RegKind::Float => match self.size.bits() {
239+
16 => dl.f16_align.abi,
239240
32 => dl.f32_align.abi,
240241
64 => dl.f64_align.abi,
242+
128 => dl.f128_align.abi,
241243
_ => panic!("unsupported float: {self:?}"),
242244
},
243245
RegKind::Vector => dl.vector_align(self.size).abi,

0 commit comments

Comments
 (0)