Merge pull request #3324 from LMESTM/dev_i2c_common_code

Dev i2c common code

Author: 0xc0170

features/unsupported/tests/mbed/i2c_master_slave_asynch/main.cpp

@@ -32,14 +32,22 @@ I2C master(PB_9, PB_8);
 I2C master(D14, D15); // I2C_SDA, I2C_SCL
 #endif
 
-#if defined (TARGET_NUCLEO_F429ZI) || \
+#if defined (TARGET_NUCLEO_F072RB) || \
+    defined (TARGET_NUCLEO_F030R8) || \
+    defined (TARGET_NUCLEO_F103RB) || \
+    defined (TARGET_NUCLEO_F207ZG) || \
+    defined (TARGET_NUCLEO_F446ZE) || \
+    defined (TARGET_NUCLEO_F429ZI) || \
     defined (TARGET_DISCO_F429ZI) || \
-    defined (TARGET_NUCLEO_F446ZE)
+    defined (TARGET_NUCLEO_F767ZI) || \
+    defined (TARGET_NUCLEO_L053R8) || \
+    defined (TARGET_NUCLEO_L152RE) || \
+    defined (TARGET_NUCLEO_L476RG)
 I2CSlave slave(PB_11, PB_10);
-
+#elif defined(TARGET_NUCLEO_F303RE)
+I2CSlave slave(D2, D8);
 #else
 I2CSlave slave(D3, D6);
-
 #endif
 
 volatile int why;
@@ -95,7 +103,8 @@ int main()
 
     while (!master_complete) {
         if(slave.receive() == I2CSlave::ReadAddressed) {
-            slave.write(buf_slave, SIZE);
+            if(slave.write(buf_slave, SIZE))
+                notify_completion(false);
         }
     }
     if (why != I2C_EVENT_TRANSFER_COMPLETE) {

targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/objects.h

@@ -66,10 +66,6 @@ struct dac_s {
     uint32_t channel;
 };
 
-struct i2c_s {
-    I2CName  i2c;
-};
-
 #include "common_objects.h"
 #include "gpio_object.h"
 

targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/objects.h

@@ -60,10 +60,6 @@ struct analogin_s {
     uint32_t channel;
 };
 
-struct i2c_s {
-    I2CName  i2c;
-};
-
 #include "common_objects.h"
 #include "gpio_object.h"
 

targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/objects.h

@@ -60,10 +60,6 @@ struct analogin_s {
     uint32_t channel;
 };
 
-struct i2c_s {
-    I2CName  i2c;
-};
-
 #include "common_objects.h"
 #include "gpio_object.h"
 

targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/objects.h

@@ -60,10 +60,6 @@ struct analogin_s {
     uint32_t channel;
 };
 
-struct i2c_s {
-    I2CName  i2c;
-};
-
 struct can_s {
     CANName can;
     int index;

targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/objects.h

@@ -60,10 +60,6 @@ struct analogin_s {
     uint32_t channel;
 };
 
-struct i2c_s {
-    I2CName  i2c;
-};
-
 #include "common_objects.h"
 #include "gpio_object.h"
 

targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/objects.h

@@ -66,10 +66,6 @@ struct dac_s {
     uint32_t channel;
 };
 
-struct i2c_s {
-    I2CName  i2c;
-};
-
 struct can_s {
     CANName can;
     int index;

targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/objects.h

@@ -66,10 +66,6 @@ struct dac_s {
     uint32_t channel;
 };
 
-struct i2c_s {
-    I2CName  i2c;
-};
-
 struct can_s {
     CANName can;
     int index;

targets/TARGET_STM/TARGET_STM32F0/common_objects.h

@@ -82,6 +82,34 @@ struct serial_s {
 #endif
 };
 
+struct i2c_s {
+    /*  The 1st 2 members I2CName i2c
+     *  and I2C_HandleTypeDef handle should
+     *  be kept as the first members of this struct
+     *  to ensure i2c_get_obj to work as expected
+     */
+    I2CName  i2c;
+    I2C_HandleTypeDef handle;
+    uint8_t index;
+    int hz;
+    PinName sda;
+    PinName scl;
+    IRQn_Type event_i2cIRQ;
+    IRQn_Type error_i2cIRQ;
+    uint32_t XferOperation;
+    volatile uint8_t event;
+#if DEVICE_I2CSLAVE
+    uint8_t slave;
+    volatile uint8_t pending_slave_tx_master_rx;
+    volatile uint8_t pending_slave_rx_maxter_tx;
+#endif
+#if DEVICE_I2C_ASYNCH
+    uint32_t address;
+    uint8_t stop;
+    uint8_t available_events;
+#endif
+};
+
 #include "gpio_object.h"
 
 #ifdef __cplusplus

targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_i2c.c

@@ -2585,7 +2585,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
     /* Prepare transfer parameters */
     hi2c->pBuffPtr    = pData;
     hi2c->XferCount   = Size;
-    hi2c->XferOptions = XferOptions;
+    hi2c->XferOptions = (XferOptions & (~I2C_RELOAD_MODE));
     hi2c->XferISR     = I2C_Master_ISR_IT;
 
     /* If size > MAX_NBYTE_SIZE, use reload mode */
@@ -2598,15 +2598,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
     {
       hi2c->XferSize = hi2c->XferCount;
       xfermode = hi2c->XferOptions;
-      
-      /* If transfer direction not change, do not generate Restart Condition */
-      /* Mean Previous state is same as current state */
-      if(hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_TX)
-      {
-        xferrequest = I2C_NO_STARTSTOP;
-      }
     }
-    
 
     /* Send Slave Address and set NBYTES to write */
     I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest);
@@ -2659,7 +2651,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
     /* Prepare transfer parameters */
     hi2c->pBuffPtr    = pData;
     hi2c->XferCount   = Size;
-    hi2c->XferOptions = XferOptions;
+    hi2c->XferOptions = (XferOptions & (~I2C_RELOAD_MODE));
     hi2c->XferISR     = I2C_Master_ISR_IT;
 
     /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */
@@ -2672,13 +2664,6 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
     {
       hi2c->XferSize = hi2c->XferCount;
       xfermode = hi2c->XferOptions;
-
-      /* If transfer direction not change, do not generate Restart Condition */
-      /* Mean Previous state is same as current state */
-      if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
-      {
-        xferrequest = I2C_NO_STARTSTOP;
-      }
     }
 
     /* Send Slave Address and set NBYTES to read */