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| 1 | +/*###ICF### Section handled by ICF editor, don't touch! ****/ |
| 2 | +/*-Editor annotation file-*/ |
| 3 | +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_1.xml" */ |
| 4 | +/*-Specials-*/ |
| 5 | +define symbol __ICFEDIT_intvec_start__ = 0x00003000; |
| 6 | +/*-Memory Regions-*/ |
| 7 | +define symbol __ICFEDIT_region_IROM1_start__ = 0x00003000; /* FLASHA program start*/ |
| 8 | +define symbol __ICFEDIT_region_IROM1_end__ = 0x00051FFF; /* 316K = 320K - 4K(FIB table), FLASHA end */ |
| 9 | +define symbol __ICFEDIT_region_IROM2_start__ = 0x00102000; |
| 10 | +define symbol __ICFEDIT_region_IROM2_end__ = 0x00151FFF; /* 320K */ |
| 11 | +define symbol __ICFEDIT_region_EROM1_start__ = 0x0; |
| 12 | +define symbol __ICFEDIT_region_EROM1_end__ = 0x0; |
| 13 | +define symbol __ICFEDIT_region_EROM2_start__ = 0x0; |
| 14 | +define symbol __ICFEDIT_region_EROM2_end__ = 0x0; |
| 15 | +define symbol __ICFEDIT_region_EROM3_start__ = 0x0; |
| 16 | +define symbol __ICFEDIT_region_EROM3_end__ = 0x0; |
1 | 17 |
|
2 |
| -/* The memory space denoting the maximum possible amount of addressable memory */ |
3 |
| -define memory Mem with size = 4G; |
| 18 | +define symbol __ICFEDIT_region_IRAM1_start__ = 0x3FFFC000; /* RAMA start */ |
| 19 | +define symbol __ICFEDIT_region_IRAM1_end__ = 0x3FFFFFFF; /* RAMA end */ |
| 20 | +define symbol __ICFEDIT_region_IRAM2_start__ = 0x3FFF8000; /* RAMB start */ |
| 21 | +define symbol __ICFEDIT_region_IRAM2_end__ = 0x3FFFBFFF; /* RAMB end */ |
| 22 | +define symbol __ICFEDIT_region_IRAM3_start__ = 0x3FFF4000; /* RAMC start */ |
| 23 | +define symbol __ICFEDIT_region_IRAM3_end__ = 0x3FFF7FFF; /* RAMC end */ |
| 24 | +define symbol __ICFEDIT_region_ERAM1_start__ = 0x0; |
| 25 | +define symbol __ICFEDIT_region_ERAM1_end__ = 0x0; |
| 26 | +define symbol __ICFEDIT_region_ERAM2_start__ = 0x0; |
| 27 | +define symbol __ICFEDIT_region_ERAM2_end__ = 0x0; |
| 28 | +define symbol __ICFEDIT_region_ERAM3_start__ = 0x0; |
| 29 | +define symbol __ICFEDIT_region_ERAM3_end__ = 0x0; |
4 | 30 |
|
5 |
| -/* Memory regions in an address space */ |
6 |
| -define region FLASHA = Mem:[from 0x00003000 size 0x4D000]; /* 308K = 320K - 4K(FIB table) - 8K(Persistent) */ |
7 |
| -define region FLASHB = Mem:[from 0x00100000 size 0x50000]; |
8 |
| -define region RAMA = Mem:[from 0x3FFFC000 size 0x4000]; |
9 |
| -define region RAMB = Mem:[from 0x3FFF8000 size 0x4000]; |
10 |
| -/* G2H ZPRO requires RAMC to be enabled */ |
11 |
| -define region RAMC = Mem:[from 0x3FFF4000 + 0x90 size 0x4000 - 0x90]; /* 8_byte_aligned(35 vectors * 4 bytes each) = 0x90 */ |
12 |
| -define region RAM_ALL = Mem:[from 0x3FFF4000 + 0x90 size 0xC000 - 0x90]; /* 8_byte_aligned(35 vectors * 4 bytes each) = 0x90 */ |
| 31 | +/*-Sizes-*/ |
| 32 | +define symbol __ICFEDIT_size_cstack__ = 0x200; |
| 33 | +define symbol __ICFEDIT_size_heap__ = 0x4000; |
| 34 | +/**** End of ICF editor section. ###ICF###*/ |
13 | 35 |
|
14 |
| -/* Create a stack */ |
15 |
| -define block CSTACK with size = 0x200, alignment = 8 { }; |
16 | 36 |
|
17 |
| -/* No Heap is created for C library, all memory management should be handled by the application */ |
18 |
| - define block HEAP with alignment = 8, size = 0x3000 { }; |
| 37 | +define memory mem with size = 4G; |
| 38 | +define region FLASH_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__] |
| 39 | + | mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__]; |
19 | 40 |
|
20 |
| -/* Handle initialization */ |
21 |
| -do not initialize { section .noinit }; |
| 41 | +define region RAM_VECTOR_region = mem:[from __ICFEDIT_region_IRAM3_start__ to __ICFEDIT_region_IRAM3_start__ + 0x90 - 1]; |
22 | 42 |
|
23 |
| -/* Initialize RW sections, exclude zero-initialized sections */ |
24 |
| -initialize by copy with packing = none { readwrite }; |
| 43 | +define region RAM_region = mem:[from __ICFEDIT_region_IRAM3_start__ + 0x90 to __ICFEDIT_region_IRAM3_end__] |
| 44 | + | mem:[from __ICFEDIT_region_IRAM2_start__ to __ICFEDIT_region_IRAM2_end__] |
| 45 | + | mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__ - __ICFEDIT_size_cstack__ ]; |
| 46 | + |
| 47 | +define region CSTACK_region = mem:[from __ICFEDIT_region_IRAM1_end__ - __ICFEDIT_size_cstack__ + 1 to __ICFEDIT_region_IRAM1_end__]; |
| 48 | + |
| 49 | + |
| 50 | +/* Define overlays for MIB's, ths allows view of one MIB from a application level while |
| 51 | + * MAC and PHY only know about their own MIB */ |
| 52 | +define overlay MIBOVERLAY { section MIBSTARTSECTION }; |
| 53 | +define overlay MIBOVERLAY { section MIBSECTION }; |
| 54 | + |
| 55 | +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; |
| 56 | +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; |
| 57 | +define block RAM_VECTORS with alignment = 8, size = 0x90 { }; |
| 58 | + |
| 59 | +initialize by copy { readwrite }; |
| 60 | + |
| 61 | +if (isdefinedsymbol(__USE_DLIB_PERTHREAD)) |
| 62 | +{ |
| 63 | + // Required in a multi-threaded application |
| 64 | + initialize by copy with packing = none { section __DLIB_PERTHREAD }; |
| 65 | +} |
25 | 66 |
|
26 | 67 | /* Initialize the code in RAM, copied over from FLASH */
|
27 | 68 | initialize by copy with packing = none { readonly code section EXECINRAM };
|
28 |
| -/*keep { readonly code section .EXECINRAM* } except { readonly code section EXECINRAM };*/ |
29 | 69 |
|
30 |
| -/* Place startup code at a fixed address */ |
31 |
| -place at start of FLASHA { readonly section .intvec, readonly section SWVERSION,readonly section FIBTABLE,readonly section .cstartup }; |
| 70 | +/*initialize by copy { readwrite };*/ |
| 71 | +do not initialize { section .noinit }; |
| 72 | + |
32 | 73 |
|
33 |
| -/* Place code and data */ |
| 74 | +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section SWVERSION, readonly section FIBTABLE }; |
34 | 75 |
|
35 |
| -/* Place constants and initializers in FLASHA: .rodata and .data_init */ |
36 |
| -place in FLASHA { readonly }; |
| 76 | +place in FLASH_region { readonly section .cstartup, readonly }; |
37 | 77 |
|
38 |
| -/* Place .data, .bss, and .noinit */ |
39 |
| -/* and STACK */ |
40 |
| -/* The relocatable exception table needs to be aligned at 0x0 or multiple of 0x100, |
41 |
| - * hence, place it as first block in RAM. |
42 |
| - */ |
43 |
| -place at start of RAM_ALL { section RAM_VECTORS }; |
44 |
| -place in RAM_ALL { readonly code section EXECINRAM }; |
45 |
| -place at end of RAM_ALL { block CSTACK }; |
| 78 | +place at start of RAM_VECTOR_region {block RAM_VECTORS}; |
46 | 79 |
|
| 80 | +place in RAM_region { readwrite, block HEAP, section XHEAP, readonly code section EXECINRAM, overlay MIBOVERLAY, readwrite section MIBENDSECTION}; |
47 | 81 |
|
48 |
| -place in RAM_ALL { readwrite }; |
49 |
| -place in RAM_ALL { block HEAP }; |
| 82 | +place at end of CSTACK_region { block CSTACK }; |
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