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STM32 : enable MBED trace for QSPI
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-40
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1 file changed

+42
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targets/TARGET_STM/qspi_api.c

+42-40
Original file line numberDiff line numberDiff line change
@@ -1,29 +1,19 @@
1-
/* mbed Microcontroller Library
2-
* Copyright (c) 2017, ARM Limited
3-
* All rights reserved.
1+
/*
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* Copyright (c) 2017, Arm Limited and affiliates.
3+
* Copyright (c) 2017, STMicroelectronics.
4+
* SPDX-License-Identifier: Apache-2.0
45
*
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* Redistribution and use in source and binary forms, with or without
6-
* modification, are permitted provided that the following conditions are met:
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
10+
* http://www.apache.org/licenses/LICENSE-2.0
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* Unless required by applicable law or agreed to in writing, software
13+
* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
2717
*/
2818

2919
#if DEVICE_QSPI
@@ -35,7 +25,15 @@
3525
#include "pinmap.h"
3626
#include "PeripheralPins.h"
3727

38-
// activate / de-activate debug
28+
#include "mbed_trace.h"
29+
30+
#if defined(OCTOSPI1)
31+
#define TRACE_GROUP "ST_OSPI"
32+
#else
33+
#define TRACE_GROUP "ST_QSPI"
34+
#endif /* OCTOSPI1 */
35+
36+
// activate / de-activate extra debug
3937
#define qspi_api_c_debug 0
4038

4139
/* Max amount of flash size is 4Gbytes */
@@ -389,7 +387,7 @@ qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_
389387
static qspi_status_t _qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
390388
#endif
391389
{
392-
debug_if(qspi_api_c_debug, "qspi_init mode %u\n", mode);
390+
tr_info("qspi_init mode %u", mode);
393391

394392
// Reset handle internal state
395393
obj->handle.State = HAL_OSPI_STATE_RESET;
@@ -488,7 +486,7 @@ static qspi_status_t _qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap,
488486
}
489487

490488
if (HAL_OSPIM_Config(&obj->handle, &OSPIM_Cfg_Struct, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
491-
debug_if(qspi_api_c_debug, "HAL_OSPIM_Config error\n");
489+
tr_error("HAL_OSPIM_Config error");
492490
return QSPI_STATUS_ERROR;
493491
}
494492
#endif
@@ -535,7 +533,7 @@ qspi_status_t qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_
535533
static qspi_status_t _qspi_init_direct(qspi_t *obj, const qspi_pinmap_t *pinmap, uint32_t hz, uint8_t mode)
536534
#endif
537535
{
538-
debug_if(qspi_api_c_debug, "qspi_init mode %u\n", mode);
536+
tr_info("qspi_init mode %u", mode);
539537
// Enable interface clock for QSPI
540538
__HAL_RCC_QSPI_CLK_ENABLE();
541539

@@ -632,7 +630,7 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
632630
#if defined(OCTOSPI1)
633631
qspi_status_t qspi_free(qspi_t *obj)
634632
{
635-
debug_if(qspi_api_c_debug, "qspi_free\n");
633+
tr_info("qspi_free");
636634
if (HAL_OSPI_DeInit(&obj->handle) != HAL_OK) {
637635
return QSPI_STATUS_ERROR;
638636
}
@@ -664,6 +662,8 @@ qspi_status_t qspi_free(qspi_t *obj)
664662
#else /* OCTOSPI */
665663
qspi_status_t qspi_free(qspi_t *obj)
666664
{
665+
tr_info("qspi_free");
666+
667667
if (HAL_QSPI_DeInit(&obj->handle) != HAL_OK) {
668668
return QSPI_STATUS_ERROR;
669669
}
@@ -699,7 +699,7 @@ qspi_status_t qspi_free(qspi_t *obj)
699699
#if defined(OCTOSPI1)
700700
qspi_status_t qspi_frequency(qspi_t *obj, int hz)
701701
{
702-
debug_if(qspi_api_c_debug, "qspi_frequency hz %d\n", hz);
702+
tr_info("qspi_frequency hz %d", hz);
703703
qspi_status_t status = QSPI_STATUS_OK;
704704

705705
/* HCLK drives QSPI. QSPI clock depends on prescaler value:
@@ -721,7 +721,7 @@ qspi_status_t qspi_frequency(qspi_t *obj, int hz)
721721
obj->handle.Init.ClockPrescaler = div;
722722

723723
if (HAL_OSPI_Init(&obj->handle) != HAL_OK) {
724-
debug_if(qspi_api_c_debug, "HAL_OSPI_Init error\n");
724+
tr_error("HAL_OSPI_Init error");
725725
status = QSPI_STATUS_ERROR;
726726
}
727727

@@ -730,7 +730,7 @@ qspi_status_t qspi_frequency(qspi_t *obj, int hz)
730730
#else /* OCTOSPI */
731731
qspi_status_t qspi_frequency(qspi_t *obj, int hz)
732732
{
733-
debug_if(qspi_api_c_debug, "qspi_frequency hz %d\n", hz);
733+
tr_info("qspi_frequency hz %d", hz);
734734
qspi_status_t status = QSPI_STATUS_OK;
735735

736736
/* HCLK drives QSPI. QSPI clock depends on prescaler value:
@@ -774,11 +774,11 @@ qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void
774774
st_command.NbData = *length;
775775

776776
if (HAL_OSPI_Command(&obj->handle, &st_command, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
777-
debug_if(qspi_api_c_debug, "HAL_OSPI_Command error\n");
777+
tr_error("HAL_OSPI_Command error");
778778
status = QSPI_STATUS_ERROR;
779779
} else {
780780
if (HAL_OSPI_Transmit(&obj->handle, (uint8_t *)data, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
781-
debug_if(qspi_api_c_debug, "HAL_OSPI_Transmit error\n");
781+
tr_error("HAL_OSPI_Transmit error");
782782
status = QSPI_STATUS_ERROR;
783783
}
784784
}
@@ -788,6 +788,8 @@ qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void
788788
#else /* OCTOSPI */
789789
qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void *data, size_t *length)
790790
{
791+
debug_if(qspi_api_c_debug, "qspi_write size %u\n", *length);
792+
791793
QSPI_CommandTypeDef st_command;
792794
qspi_status_t status = qspi_prepare_command(command, &st_command);
793795
if (status != QSPI_STATUS_OK) {
@@ -823,11 +825,11 @@ qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data,
823825
st_command.NbData = *length;
824826

825827
if (HAL_OSPI_Command(&obj->handle, &st_command, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
826-
debug_if(qspi_api_c_debug, "HAL_OSPI_Command error\n");
828+
tr_error("HAL_OSPI_Command error");
827829
status = QSPI_STATUS_ERROR;
828830
} else {
829831
if (HAL_OSPI_Receive(&obj->handle, data, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
830-
debug_if(qspi_api_c_debug, "HAL_OSPI_Receive error\n");
832+
tr_error("HAL_OSPI_Receive error %d", obj->handle.ErrorCode);
831833
status = QSPI_STATUS_ERROR;
832834
}
833835
}
@@ -865,7 +867,8 @@ qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data,
865867
#if defined(OCTOSPI1)
866868
qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command, const void *tx_data, size_t tx_size, void *rx_data, size_t rx_size)
867869
{
868-
debug_if(qspi_api_c_debug, "qspi_command_transfer tx %u rx %u command %x\n", tx_size, rx_size, command->instruction.value);
870+
tr_info("qspi_command_transfer tx %u rx %u command %#04x", tx_size, rx_size, command->instruction.value);
871+
869872
qspi_status_t status = QSPI_STATUS_OK;
870873

871874
if ((tx_data == NULL || tx_size == 0) && (rx_data == NULL || rx_size == 0)) {
@@ -880,7 +883,7 @@ qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command,
880883
st_command.DataMode = HAL_OSPI_DATA_NONE; /* Instruction only */
881884
if (HAL_OSPI_Command(&obj->handle, &st_command, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) {
882885
status = QSPI_STATUS_ERROR;
883-
debug_if(qspi_api_c_debug, "HAL_OSPI_Command error\n");
886+
tr_error("HAL_OSPI_Command error");
884887
return status;
885888
}
886889
} else {
@@ -889,23 +892,22 @@ qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command,
889892
size_t tx_length = tx_size;
890893
status = qspi_write(obj, command, tx_data, &tx_length);
891894
if (status != QSPI_STATUS_OK) {
892-
debug_if(qspi_api_c_debug, "qspi_write error\n");
895+
tr_error("qspi_write error");
893896
return status;
894897
}
895898
}
896899

897900
if (rx_data != NULL && rx_size) {
898901
size_t rx_length = rx_size;
899902
status = qspi_read(obj, command, rx_data, &rx_length);
900-
// debug_if(qspi_api_c_debug, "qspi_read %d\n", status);
901903
}
902904
}
903905
return status;
904906
}
905907
#else /* OCTOSPI */
906908
qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command, const void *tx_data, size_t tx_size, void *rx_data, size_t rx_size)
907909
{
908-
debug_if(qspi_api_c_debug, "qspi_command_transfer tx %u rx %u command %x\n", tx_size, rx_size, command->instruction.value);
910+
tr_info("qspi_command_transfer tx %u rx %u command %#04x", tx_size, rx_size, command->instruction.value);
909911
qspi_status_t status = QSPI_STATUS_OK;
910912

911913
if ((tx_data == NULL || tx_size == 0) && (rx_data == NULL || rx_size == 0)) {

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