22 ******************************************************************************
33 * @file stm32f3xx_hal_adc_ex.c
44 * @author MCD Application Team
5- * @version V1.2.1
6- * @date 29-April-2015
5+ * @version V1.3.0
6+ * @date 01-July-2016
77 * @brief This file provides firmware functions to manage the following
88 * functionalities of the Analog to Digital Convertor (ADC)
99 * peripheral:
@@ -6941,8 +6941,11 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_
69416941 /* Check the parameters */
69426942 assert_param (IS_ADC_MULTIMODE_MASTER_INSTANCE (hadc -> Instance ));
69436943 assert_param (IS_ADC_MODE (multimode -> Mode ));
6944- assert_param (IS_ADC_DMA_ACCESS_MODE (multimode -> DMAAccessMode ));
6945- assert_param (IS_ADC_SAMPLING_DELAY (multimode -> TwoSamplingDelay ));
6944+ if (multimode -> Mode != ADC_MODE_INDEPENDENT )
6945+ {
6946+ assert_param (IS_ADC_DMA_ACCESS_MODE (multimode -> DMAAccessMode ));
6947+ assert_param (IS_ADC_SAMPLING_DELAY (multimode -> TwoSamplingDelay ));
6948+ }
69466949
69476950 /* Process locked */
69486951 __HAL_LOCK (hadc );
@@ -6964,31 +6967,22 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_
69646967 /* control registers) */
69656968 tmpADC_Common = ADC_COMMON_REGISTER (hadc );
69666969
6967- /* Configuration of ADC common group ADC1&ADC2, ADC3&ADC4 if available */
6968- /* (ADC2, ADC3, ADC4 availability depends on STM32 product) */
6969- /* - DMA access mode */
6970- MODIFY_REG (tmpADC_Common -> CCR ,
6971- ADC_CCR_MDMA |
6972- ADC_CCR_DMACFG ,
6973- multimode -> DMAAccessMode |
6974- ADC_CCR_MULTI_DMACONTREQ (hadc -> Init .DMAContinuousRequests ) );
6975-
6976- /* Parameters that can be updated only when ADC is disabled: */
6977- /* - Multimode mode selection */
6978- /* - Multimode delay */
6979- /* Note: If ADC is not in the appropriate state to modify these */
6980- /* parameters, their setting is bypassed without error reporting */
6981- /* (as it can be the expected behaviour in case of intended action */
6982- /* to update parameter above (which fulfills the ADC state */
6983- /* condition: no conversion on going on group regular) */
6984- /* on the fly). */
6985- if ((ADC_IS_ENABLE (hadc ) == RESET ) &&
6986- (ADC_IS_ENABLE (& tmphadcSharingSameCommonRegister ) == RESET ) )
6970+ /* If multimode is selected, configure all multimode paramaters. */
6971+ /* Otherwise, reset multimode parameters (can be used in case of */
6972+ /* transition from multimode to independent mode). */
6973+ if (multimode -> Mode != ADC_MODE_INDEPENDENT )
69876974 {
69886975 /* Configuration of ADC common group ADC1&ADC2, ADC3&ADC4 if available */
69896976 /* (ADC2, ADC3, ADC4 availability depends on STM32 product) */
6990- /* - set the selected multimode */
69916977 /* - DMA access mode */
6978+ MODIFY_REG (tmpADC_Common -> CCR ,
6979+ ADC_CCR_MDMA |
6980+ ADC_CCR_DMACFG ,
6981+ multimode -> DMAAccessMode |
6982+ ADC_CCR_MULTI_DMACONTREQ (hadc -> Init .DMAContinuousRequests ) );
6983+
6984+ /* Parameters that can be updated only when ADC is disabled: */
6985+ /* - Multimode mode selection */
69926986 /* - Set delay between two sampling phases */
69936987 /* Note: Delay range depends on selected resolution: */
69946988 /* from 1 to 12 clock cycles for 12 bits */
@@ -6997,11 +6991,34 @@ HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_
69976991 /* from 1 to 6 clock cycles for 6 bits */
69986992 /* If a higher delay is selected, it will be clamped to maximum delay */
69996993 /* range */
7000- MODIFY_REG (tmpADC_Common -> CCR ,
7001- ADC_CCR_MULTI |
7002- ADC_CCR_DELAY ,
7003- multimode -> Mode |
7004- multimode -> TwoSamplingDelay );
6994+ /* Note: If ADC is not in the appropriate state to modify these */
6995+ /* parameters, their setting is bypassed without error reporting */
6996+ /* (as it can be the expected behaviour in case of intended action */
6997+ /* to update parameter above (which fulfills the ADC state */
6998+ /* condition: no conversion on going on group regular) */
6999+ /* on the fly). */
7000+ if ((ADC_IS_ENABLE (hadc ) == RESET ) &&
7001+ (ADC_IS_ENABLE (& tmphadcSharingSameCommonRegister ) == RESET ) )
7002+ {
7003+ MODIFY_REG (tmpADC_Common -> CCR ,
7004+ ADC_CCR_MULTI |
7005+ ADC_CCR_DELAY ,
7006+ multimode -> Mode |
7007+ multimode -> TwoSamplingDelay );
7008+ }
7009+ }
7010+ else /* ADC_MODE_INDEPENDENT */
7011+ {
7012+ CLEAR_BIT (tmpADC_Common -> CCR , ADC_CCR_MDMA | ADC_CCR_DMACFG );
7013+
7014+ /* Parameters that can be updated only when ADC is disabled: */
7015+ /* - Multimode mode selection */
7016+ /* - Multimode delay */
7017+ if ((ADC_IS_ENABLE (hadc ) == RESET ) &&
7018+ (ADC_IS_ENABLE (& tmphadcSharingSameCommonRegister ) == RESET ) )
7019+ {
7020+ CLEAR_BIT (tmpADC_Common -> CCR , ADC_CCR_MULTI | ADC_CCR_DELAY );
7021+ }
70057022 }
70067023 }
70077024 /* If one of the ADC sharing the same common group is enabled, no update */
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