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theotherjimmytheotherjimmy
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Merge pull request #4793 from jeromecoutant/PR_F4_I2C
STM32 I2C : correct async issue
2 parents 2d8457e + c8cba15 commit f4de24b

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4 files changed

+100
-13
lines changed

4 files changed

+100
-13
lines changed

‎targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_i2c.c

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1462,7 +1462,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
14621462
/* Generate Start */
14631463
hi2c->Instance->CR1 |= I2C_CR1_START;
14641464
}
1465-
else
1465+
else if(Prev_State == I2C_STATE_MASTER_BUSY_RX) // MBED
14661466
{
14671467
/* Generate ReStart */
14681468
hi2c->Instance->CR1 |= I2C_CR1_START;
@@ -1564,7 +1564,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
15641564
/* Generate Start */
15651565
hi2c->Instance->CR1 |= I2C_CR1_START;
15661566
}
1567-
else
1567+
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) // MBED
15681568
{
15691569
/* Enable Acknowledge */
15701570
hi2c->Instance->CR1 |= I2C_CR1_ACK;
@@ -4008,7 +4008,7 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
40084008

40094009
/* Enable Pos */
40104010
hi2c->Instance->CR1 |= I2C_CR1_POS;
4011-
4011+
40124012
/* Disable BUF interrupt */
40134013
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
40144014
}
@@ -4078,6 +4078,12 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
40784078
{
40794079
/* Disable Acknowledge */
40804080
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4081+
4082+
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
4083+
{
4084+
/* Generate ReStart */
4085+
hi2c->Instance->CR1 |= I2C_CR1_START;
4086+
}
40814087
}
40824088
else
40834089
{

‎targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_i2c.c

Lines changed: 30 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1414,8 +1414,17 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
14141414
/* Generate Start */
14151415
if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
14161416
{
1417-
/* Generate Start or ReStart */
1417+
/* Generate Start condition if first transfer */
1418+
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
1419+
{
1420+
/* Generate Start */
14181421
hi2c->Instance->CR1 |= I2C_CR1_START;
1422+
}
1423+
else if(Prev_State == I2C_STATE_MASTER_BUSY_RX) // MBED
1424+
{
1425+
/* Generate ReStart */
1426+
hi2c->Instance->CR1 |= I2C_CR1_START;
1427+
}
14191428
}
14201429

14211430
/* Process Unlocked */
@@ -1504,11 +1513,23 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
15041513

15051514
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
15061515
{
1516+
/* Generate Start condition if first transfer */
1517+
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
1518+
{
15071519
/* Enable Acknowledge */
15081520
hi2c->Instance->CR1 |= I2C_CR1_ACK;
1509-
1510-
/* Generate Start or ReStart */
1521+
1522+
/* Generate Start */
15111523
hi2c->Instance->CR1 |= I2C_CR1_START;
1524+
}
1525+
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
1526+
{
1527+
/* Enable Acknowledge */
1528+
hi2c->Instance->CR1 |= I2C_CR1_ACK;
1529+
1530+
/* Generate ReStart */
1531+
hi2c->Instance->CR1 |= I2C_CR1_START;
1532+
}
15121533
}
15131534

15141535
/* Process Unlocked */
@@ -3996,6 +4017,12 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
39964017
{
39974018
/* Disable Acknowledge */
39984019
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4020+
4021+
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
4022+
{
4023+
/* Generate ReStart */
4024+
hi2c->Instance->CR1 |= I2C_CR1_START;
4025+
}
39994026
}
40004027
else
40014028
{

‎targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2c.c

Lines changed: 30 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1413,8 +1413,17 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
14131413
/* Generate Start */
14141414
if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
14151415
{
1416-
/* Generate Start or ReStart */
1416+
/* Generate Start condition if first transfer */
1417+
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
1418+
{
1419+
/* Generate Start */
14171420
hi2c->Instance->CR1 |= I2C_CR1_START;
1421+
}
1422+
else if(Prev_State == I2C_STATE_MASTER_BUSY_RX) // MBED
1423+
{
1424+
/* Generate ReStart */
1425+
hi2c->Instance->CR1 |= I2C_CR1_START;
1426+
}
14181427
}
14191428

14201429
/* Process Unlocked */
@@ -1503,10 +1512,23 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
15031512

15041513
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
15051514
{
1515+
/* Generate Start condition if first transfer */
1516+
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
1517+
{
1518+
/* Enable Acknowledge */
1519+
hi2c->Instance->CR1 |= I2C_CR1_ACK;
1520+
1521+
/* Generate Start */
1522+
hi2c->Instance->CR1 |= I2C_CR1_START;
1523+
}
1524+
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
1525+
{
15061526
/* Enable Acknowledge */
15071527
hi2c->Instance->CR1 |= I2C_CR1_ACK;
1508-
/* Generate Start or ReStart */
1528+
1529+
/* Generate ReStart */
15091530
hi2c->Instance->CR1 |= I2C_CR1_START;
1531+
}
15101532
}
15111533

15121534
/* Process Unlocked */
@@ -3993,6 +4015,12 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
39934015
{
39944016
/* Disable Acknowledge */
39954017
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
4018+
4019+
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
4020+
{
4021+
/* Generate ReStart */
4022+
hi2c->Instance->CR1 |= I2C_CR1_START;
4023+
}
39964024
}
39974025
else
39984026
{

‎targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_i2c.c

Lines changed: 31 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1337,7 +1337,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De
13371337

13381338
/* Enable Acknowledge */
13391339
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1340-
1340+
13411341
/* Generate Start */
13421342
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
13431343

@@ -1428,8 +1428,17 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
14281428
/* Generate Start */
14291429
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) || (hi2c->PreviousState == I2C_STATE_NONE))
14301430
{
1431-
/* Generate Start or ReStart */
1431+
/* Generate Start condition if first transfer */
1432+
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
1433+
{
1434+
/* Generate Start */
1435+
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
1436+
}
1437+
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
1438+
{
1439+
/* Generate ReStart */
14321440
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
1441+
}
14331442
}
14341443

14351444
/* Process Unlocked */
@@ -1518,10 +1527,23 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
15181527

15191528
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
15201529
{
1530+
/* Generate Start condition if first transfer */
1531+
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
1532+
{
1533+
/* Enable Acknowledge */
1534+
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1535+
1536+
/* Generate Start */
1537+
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
1538+
}
1539+
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
1540+
{
15211541
/* Enable Acknowledge */
15221542
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1523-
/* Generate Start or ReStart */
1543+
1544+
/* Generate ReStart */
15241545
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
1546+
}
15251547
}
15261548

15271549
/* Process Unlocked */
@@ -3866,11 +3888,15 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
38663888
{
38673889
/* Disable Acknowledge */
38683890
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3891+
3892+
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
3893+
{
3894+
/* Generate ReStart */
3895+
hi2c->Instance->CR1 |= I2C_CR1_START;
3896+
}
38693897
}
38703898
else
38713899
{
3872-
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
3873-
38743900
/* Generate Stop */
38753901
hi2c->Instance->CR1 |= I2C_CR1_STOP;
38763902
}

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