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Merge pull request #2 from mbedmicro/master
Update to latest mbed code with KSDK 2.0 update merged
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libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K22F/MK22F51212.h
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libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K22F/MK22F51212_features.h
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libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K22F/TOOLCHAIN_ARM_STD/MK22F51212.sct
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#! armcc -E | ||
/* | ||
** ################################################################### | ||
** Processors: MK22FN512CAP12 | ||
** MK22FN512VDC12 | ||
** MK22FN512VLH12 | ||
** MK22FN512VLL12 | ||
** MK22FN512VMP12 | ||
** | ||
** Compiler: Keil ARM C/C++ Compiler | ||
** Reference manual: K22P121M120SF7RM, Rev. 1, March 24, 2014 | ||
** Version: rev. 2.8, 2015-02-19 | ||
** Build: b151009 | ||
** | ||
** Abstract: | ||
** Linker file for the Keil ARM C/C++ Compiler | ||
** | ||
** Copyright (c) 2015 Freescale Semiconductor, Inc. | ||
** All rights reserved. | ||
** | ||
** Redistribution and use in source and binary forms, with or without modification, | ||
** are permitted provided that the following conditions are met: | ||
** | ||
** o Redistributions of source code must retain the above copyright notice, this list | ||
** of conditions and the following disclaimer. | ||
** | ||
** o Redistributions in binary form must reproduce the above copyright notice, this | ||
** list of conditions and the following disclaimer in the documentation and/or | ||
** other materials provided with the distribution. | ||
** | ||
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its | ||
** contributors may be used to endorse or promote products derived from this | ||
** software without specific prior written permission. | ||
** | ||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND | ||
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR | ||
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
** | ||
** http: www.freescale.com | ||
** mail: support@freescale.com | ||
** | ||
** ################################################################### | ||
*/ | ||
#define __ram_vector_table__ 1 | ||
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/* Heap 1/4 of ram and stack 1/8 */ | ||
#define __stack_size__ 0x4000 | ||
#define __heap_size__ 0x8000 | ||
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#if (defined(__ram_vector_table__)) | ||
#define __ram_vector_table_size__ 0x00000400 | ||
#else | ||
#define __ram_vector_table_size__ 0x00000000 | ||
#endif | ||
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#define m_interrupts_start 0x00000000 | ||
#define m_interrupts_size 0x00000400 | ||
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#define m_flash_config_start 0x00000400 | ||
#define m_flash_config_size 0x00000010 | ||
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#define m_text_start 0x00000410 | ||
#define m_text_size 0x0007FBF0 | ||
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#define m_interrupts_ram_start 0x1FFF0000 | ||
#define m_interrupts_ram_size __ram_vector_table_size__ | ||
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#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size) | ||
#define m_data_size (0x00010000 - m_interrupts_ram_size) | ||
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#define m_data_2_start 0x20000000 | ||
#define m_data_2_size 0x00010000 | ||
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/* Sizes */ | ||
#if (defined(__stack_size__)) | ||
#define Stack_Size __stack_size__ | ||
#else | ||
#define Stack_Size 0x0400 | ||
#endif | ||
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#if (defined(__heap_size__)) | ||
#define Heap_Size __heap_size__ | ||
#else | ||
#define Heap_Size 0x0400 | ||
#endif | ||
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LR_m_text m_interrupts_start m_text_size+m_interrupts_size+m_flash_config_size { ; load region size_region | ||
VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address | ||
* (RESET,+FIRST) | ||
} | ||
ER_m_flash_config m_flash_config_start m_flash_config_size { ; load address = execution address | ||
* (FlashConfig) | ||
} | ||
ER_m_text m_text_start m_text_size { ; load address = execution address | ||
* (InRoot$$Sections) | ||
.ANY (+RO) | ||
} | ||
RW_m_data m_data_start m_data_size { ; RW data | ||
.ANY (+RW +ZI) | ||
} | ||
RW_m_data_2 m_data_2_start m_data_2_size-Stack_Size-Heap_Size { ; RW data | ||
.ANY (+RW +ZI) | ||
} | ||
RW_IRAM1 ((ImageLimit(RW_m_data_2) == m_data_2_start) ? ImageLimit(RW_m_data) : +0) EMPTY Heap_Size { ; Heap region growing up | ||
} | ||
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size { | ||
} | ||
} | ||
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