[pcieutil] Add 'pcie-aer' sub-command to display AER stats #1169

ArunSaravananBalachandran · 2020-10-13T11:22:20Z

- What I did

Add new "pcie-aer" sub-command in pcieutil to display the AER stats.
"pcieutil pcie-aer" has four sub-commands - 'all', 'correctable', 'fatal' and 'non-fatal'.

'all' command displays the AER stats for all severities.
'correctable', 'fatal' and 'non-fatal' commands display the AER stats of respective severity.
'device', 'no-zero' options for pcie-aer sub commands

root@sonic:/home/admin# pcieutil pcie-aer
Usage: pcieutil pcie-aer [OPTIONS] COMMAND [ARGS]...

  Display PCIe AER status

Options:
  --help  Show this message and exit.

Commands:
  all          Show all PCIe AER attributes
  correctable  Show PCIe AER correctable attributes
  fatal        Show PCIe AER fatal attributes
  non-fatal    Show PCIe AER non-fatal attributes
root@sonic:/home/admin#
root@sonic:/home/admin# pcieutil pcie-aer all --help
Usage: pcieutil pcie-aer all [OPTIONS]

  Show all PCIe AER attributes

Options:
  -d, --device <BUS>:<DEV>.<FN>  Display stats only for the specified device
  -nz, --no-zero                 Display non-zero AER stats
  --help                         Show this message and exit.
root@sonic:/home/admin#

Depends on: sonic-net/sonic-platform-daemons#100

- How I did it

Add new functions in pcieutil, to implement sub-commands for retrieving AER stats from STATE_DB and output it in tabular format.

- How to verify it

- Previous command output (if the output of a command-line utility has changed)

- New command output (if the output of a command-line utility has changed)

root@sonic:/home/admin# pcieutil pcie-aer all
+---------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| AER - CORRECTABLE   |   00:01.0 |   00:02.0 |   00:03.0 |   00:04.0 |   00:0f.0 |   00:13.0 |   00:14.0 |   00:14.1 |   00:14.2 |   01:00.0 |   01:00.1 |
|                     |    0x1f10 |    0x1f11 |    0x1f12 |    0x1f13 |    0x1f16 |    0x1f15 |    0x1f41 |    0x1f41 |    0x1f41 |    0xb960 |    0xb960 |
+=====================+===========+===========+===========+===========+===========+===========+===========+===========+===========+===========+===========+
| RxErr               |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+---------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| BadTLP              |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+---------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| BadDLLP             |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+---------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| Rollover            |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+---------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| Timeout             |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+---------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| NonFatalErr         |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+---------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| CorrIntErr          |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+---------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| HeaderOF            |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+---------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| TOTAL_ERR_COR       |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+---------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+

+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| AER - FATAL     |   00:01.0 |   00:02.0 |   00:03.0 |   00:04.0 |   00:0f.0 |   00:13.0 |   00:14.0 |   00:14.1 |   00:14.2 |   01:00.0 |   01:00.1 |
|                 |    0x1f10 |    0x1f11 |    0x1f12 |    0x1f13 |    0x1f16 |    0x1f15 |    0x1f41 |    0x1f41 |    0x1f41 |    0xb960 |    0xb960 |
+=================+===========+===========+===========+===========+===========+===========+===========+===========+===========+===========+===========+
| Undefined       |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| DLP             |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| SDES            |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| TLP             |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| FCP             |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| CmpltTO         |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| CmpltAbrt       |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| UnxCmplt        |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| RxOF            |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| MalfTLP         |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| ECRC            |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| UnsupReq        |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| ACSViol         |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| UncorrIntErr    |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| BlockedTLP      |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| AtomicOpBlocked |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| TLPBlockedErr   |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| TOTAL_ERR_FATAL |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+-----------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+

+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| AER - NONFATAL     |   00:01.0 |   00:02.0 |   00:03.0 |   00:04.0 |   00:0f.0 |   00:13.0 |   00:14.0 |   00:14.1 |   00:14.2 |   01:00.0 |   01:00.1 |
|                    |    0x1f10 |    0x1f11 |    0x1f12 |    0x1f13 |    0x1f16 |    0x1f15 |    0x1f41 |    0x1f41 |    0x1f41 |    0xb960 |    0xb960 |
+====================+===========+===========+===========+===========+===========+===========+===========+===========+===========+===========+===========+
| Undefined          |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| DLP                |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| SDES               |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| TLP                |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| FCP                |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| CmpltTO            |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| CmpltAbrt          |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| UnxCmplt           |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| RxOF               |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| MalfTLP            |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| ECRC               |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| UnsupReq           |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| ACSViol            |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| UncorrIntErr       |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| BlockedTLP         |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| AtomicOpBlocked    |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| TLPBlockedErr      |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
| TOTAL_ERR_NONFATAL |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |         0 |
+--------------------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+

root@sonic:/home/admin#

lgtm-com · 2020-10-13T11:28:44Z

This pull request fixes 1 alert when merging ce8cacd into 3a7457c - view on LGTM.com

fixed alerts:

1 for Unused import

pcieutil/main.py

lguohan

please add unit tests.

ArunSaravananBalachandran · 2020-11-19T12:15:57Z

please add unit tests.

Sure. Will add a mock class for PcieUtil (sonic_platform_base/sonic_pcie) to provide get_pcie_check method

ArunSaravananBalachandran · 2020-11-24T06:26:12Z

please add unit tests.

Have added unit tests for pcie-aer commands

abalac@29b150df8489:/sonic/src/sonic-utilities$ pytest-3 tests/pcieutil_test.py -vvvv
=========================================================================================== test session starts ============================================================================================
platform linux -- Python 3.7.3, pytest-3.10.1, py-1.7.0, pluggy-0.8.0 -- /usr/bin/python3
cachedir: .pytest_cache
rootdir: /sonic/src/sonic-utilities/tests, inifile: pytest.ini
plugins: cov-2.6.0
collected 3 items

tests/pcieutil_test.py::TestPcieUtil::test_aer_correctable PASSED                                                                                                                                    [ 33%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_non_fatal PASSED                                                                                                                                      [ 66%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_fatal PASSED                                                                                                                                          [100%]

========================================================================================= 3 passed in 0.04 seconds =========================================================================================
abalac@29b150df8489:/sonic/src/sonic-utilities$

…stats

- Include UT cases for device, no-zero options

lgtm-com · 2020-12-10T08:53:42Z

This pull request introduces 1 alert when merging 586bc75 into 57a0b41 - view on LGTM.com

new alerts:

1 for Unnecessary pass

ArunSaravananBalachandran · 2020-12-10T09:31:14Z

Commits have to added to include '-nz/--no-zero', '-d/--device' options for PCIe AER subcommands and their UT cases.

abalac@b1eff4cfd345:/sonic/src/sonic-utilities$ pytest-3 tests/pcieutil_test.py -vv
=========================================================================================== test session starts ============================================================================================
platform linux -- Python 3.7.3, pytest-3.10.1, py-1.7.0, pluggy-0.8.0 -- /usr/bin/python3
cachedir: .pytest_cache
rootdir: /sonic/src/sonic-utilities/tests, inifile: pytest.ini
plugins: cov-2.6.0
collected 6 items

tests/pcieutil_test.py::TestPcieUtil::test_aer_non_all PASSED                                                                                                                                        [ 16%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_correctable PASSED                                                                                                                                    [ 33%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_fatal PASSED                                                                                                                                          [ 50%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_non_fatal PASSED                                                                                                                                      [ 66%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_option_non_zero PASSED                                                                                                                                [ 83%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_option_device PASSED                                                                                                                                  [100%]

========================================================================================= 6 passed in 0.08 seconds =========================================================================================
abalac@b1eff4cfd345:/sonic/src/sonic-utilities$

…ption) - Add '-v/--verbose' option for PCIe AER subcommands

sujinmkang

This looks good to me.

sujinmkang · 2021-01-14T16:34:37Z

@ArunSaravananBalachandran What is unit test coverage ?

ArunSaravananBalachandran · 2021-01-18T06:22:16Z

@sujinmkang, unit test coverage and test cases are as below:

----------- coverage: platform linux, python 3.7.3-final-0 -----------
Name                                          Stmts   Miss  Cover
-----------------------------------------------------------------
pcieutil/__init__.py                              0      0   100%
pcieutil/main.py                                166     65    61%

abalac@0c47984c1da7:/sonic/src/sonic-utilities$ pytest-3 tests/pcieutil_test.py -vv
=========================================================================================== test session starts ============================================================================================
platform linux -- Python 3.7.3, pytest-3.10.1, py-1.7.0, pluggy-0.8.0 -- /usr/bin/python3
cachedir: .pytest_cache
rootdir: /sonic/src/sonic-utilities/tests, inifile: pytest.ini
plugins: cov-2.6.0
collected 6 items

tests/pcieutil_test.py::TestPcieUtil::test_aer_all PASSED                                                                                                                                            [ 16%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_correctable PASSED                                                                                                                                    [ 33%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_fatal PASSED                                                                                                                                          [ 50%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_non_fatal PASSED                                                                                                                                      [ 66%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_option_verbose PASSED                                                                                                                                 [ 83%]
tests/pcieutil_test.py::TestPcieUtil::test_aer_option_device PASSED                                                                                                                                  [100%]

========================================================================================= 6 passed in 0.08 seconds =========================================================================================
abalac@0c47984c1da7:/sonic/src/sonic-utilities$

sujinmkang · 2021-01-18T18:42:02Z

@lguohan
Unit test covered the AER part. We can have follow up PR for the rest of coverage. Can you approve this PR?

Unit test has been added and covered for the PR portion.

…#1169) - What I did Add new "pcie-aer" sub-command in pcieutil to display the AER stats. "pcieutil pcie-aer" has four sub-commands - 'all', 'correctable', 'fatal' and 'non-fatal'. 'all' command displays the AER stats for all severities. 'correctable', 'fatal' and 'non-fatal' commands display the AER stats of respective severity. 'device', 'no-zero' options for pcie-aer sub commands ``` root@sonic:/home/admin# pcieutil pcie-aer Usage: pcieutil pcie-aer [OPTIONS] COMMAND [ARGS]... Display PCIe AER status Options: --help Show this message and exit. Commands: all Show all PCIe AER attributes correctable Show PCIe AER correctable attributes fatal Show PCIe AER fatal attributes non-fatal Show PCIe AER non-fatal attributes root@sonic:/home/admin# root@sonic:/home/admin# pcieutil pcie-aer all --help Usage: pcieutil pcie-aer all [OPTIONS] Show all PCIe AER attributes Options: -d, --device <BUS>:<DEV>.<FN> Display stats only for the specified device -nz, --no-zero Display non-zero AER stats --help Show this message and exit. root@sonic:/home/admin# ``` Depends on: sonic-net/sonic-platform-daemons#100 - How I did it Add new functions in pcieutil, to implement sub-commands for retrieving AER stats from STATE_DB and output it in tabular format.

[pcieutil] Add 'pcie-aer' sub-command to display AER stats

ce8cacd

sujinmkang self-requested a review November 3, 2020 03:51

sujinmkang reviewed Nov 3, 2020

View reviewed changes

pcieutil/main.py Outdated Show resolved Hide resolved

lguohan previously requested changes Nov 13, 2020

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Merge branch 'master' into pcie_aer

37e29da

ArunSaravananBalachandran force-pushed the pcie_aer branch from 4ea2664 to 37e29da Compare November 24, 2020 05:46

Add UT for pcieutil pcie-aer commands

40fb504

ArunSaravananBalachandran and others added 3 commits November 24, 2020 15:13

Add '-nz/--no-zero' option to display only devices with non zero AER …

310d79f

…stats

Merge branch 'master' into pcie_aer

35183f9

- Add '-d/--device' option for displaying AER stats of specified device

586bc75

- Include UT cases for device, no-zero options

Fix LGTM alert

497123c

ArunSaravananBalachandran and others added 2 commits January 13, 2021 10:10

Merge branch 'master' into pcie_aer

dc12c02

- Display only 'non-zero' stats by default (Removed '-nz/--no-zero' o…

a48fe18

…ption) - Add '-v/--verbose' option for PCIe AER subcommands

sujinmkang approved these changes Jan 14, 2021

View reviewed changes

ArunSaravananBalachandran requested a review from lguohan January 18, 2021 06:17

sujinmkang merged commit 41e62c6 into sonic-net:master Jan 26, 2021

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[pcieutil] Add 'pcie-aer' sub-command to display AER stats #1169

[pcieutil] Add 'pcie-aer' sub-command to display AER stats #1169

ArunSaravananBalachandran commented Oct 13, 2020 •

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sujinmkang commented Jan 18, 2021

[pcieutil] Add 'pcie-aer' sub-command to display AER stats #1169

[pcieutil] Add 'pcie-aer' sub-command to display AER stats #1169

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