We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
These are quite difficult to replace with macros and very useful to preserve registers.
They are defined in 65C02
The text was updated successfully, but these errors were encountered:
Arlet implementation notes from http://forum.6502.org/viewtopic.php?p=15834#p15834:
In the first place, the opcode mask needs to include the new opcode here http://github.com/Arlet/verilog-6502/blob/c51aa17b6b1a4de23184815fd404b4670186f8ae/cpu.v#L877
Secondly, it needs an extra opcode mask to set src_reg to SEL_X register here https://github.com/Arlet/verilog-6502/blob/c51aa17b6b1a4de23184815fd404b4670186f8ae/cpu.v#L1016
Of course, with all opcode extensions you have to watch out that the new opcode doesn't overlap with a "don't care" in one of the existing patterns.
Sorry, something went wrong.
No branches or pull requests
These are quite difficult to replace with macros and very useful to preserve registers.
They are defined in 65C02
The text was updated successfully, but these errors were encountered: