Raise SIGSEGV instead of SIGPROT for hybrid #2145

bsdjhb · 2024-07-09T13:34:43Z

cheribsdtest: Test signal for invalid memory accesses in hybrid
arm64: Raise SIGSEGV for bounds violations outside of UVA for hybrid
riscv: Raise SIGSEGV for bounds violations against PCC/DDC in hybrid

The signal for the DDC case isn't fully correct since the instruction would need to be decoded to compute the effective address and access mode (read vs write).

bsdjhb · 2024-07-09T13:36:05Z

bin/cheribsdtest/cheribsdtest_signal.c

+    .ct_flags = CT_FLAG_SIGNAL | CT_FLAG_SI_CODE | CT_FLAG_SI_TRAPNO,
+    .ct_signum = SIGSEGV,
+    .ct_si_code = SEGV_MAPERR,
+    .ct_si_trapno = TRAPNO_STORE_PF)


This test fails on RISC-V for this series since the kernel patch always uses the load page fault cause for si_trapno.

bsdjhb · 2024-07-09T13:39:24Z

The arm64 fix is straightforward since arm64 supplies FAR for a capability abort. For RISC-V it is messier and the approach here is a simple fixup. Arguably it is fine for this to be SIGPROT, but in that case we need to document it as a non-obvious side effect for hybrid binaries.

Security fixes: CTSRD-CHERI#2135 rar: Fix OOB in rar e8 filter (CVE-2024-26256) CTSRD-CHERI#2145 zip: Fix out of boundary access Important bugfixes: CTSRD-CHERI#2131 7zip: Limit amount of properties CTSRD-CHERI#2110 bsdtar: Fix error handling around strtol() usages CTSRD-CHERI#2116 passphrase: Never allow empty passwords CTSRD-CHERI#2124 rar: Fix "File CRC Error" when extracting specific rar4 archives CTSRD-CHERI#2123 xar: Avoid infinite link loop CTSRD-CHERI#2108 zip: Update AppleDouble support for directories CTSRD-CHERI#2071 zstd: Implement core detection Obained from: libarchive Libarchive commit: 313aa1fa10b657de791e3202c168a6c833bc3543

Libarchive 3.7.4 + three fixes from master Security fixes: CTSRD-CHERI#2135 rar: Fix OOB in rar e8 filter (CVE-2024-26256) CTSRD-CHERI#2145 zip: Fix out of boundary access CTSRD-CHERI#2148 rar: Fix OOB in rar delta filter CTSRD-CHERI#2149 rar: Fix OOB in rar audio filter Important bugfixes: CTSRD-CHERI#2131 7zip: Limit amount of properties CTSRD-CHERI#2110 bsdtar: Fix error handling around strtol() usages CTSRD-CHERI#2116 passphrase: Never allow empty passwords CTSRD-CHERI#2124 rar: Fix "File CRC Error" when extracting specific rar4 archives CTSRD-CHERI#2123 xar: Avoid infinite link loop CTSRD-CHERI#2150 xar: Fix another infinite loop and expat error handling CTSRD-CHERI#2108 zip: Update AppleDouble support for directories CTSRD-CHERI#2071 zstd: Implement core detectiongit PR: 278588 (exp-run) MFC after: 1 day

bsdjhb added 3 commits July 9, 2024 06:29

cheribsdtest: Test signal for invalid memory accesses in hybrid

d9f1f4d

arm64: Raise SIGSEGV for bounds violations outside of UVA for hybrid

08f5572

riscv: Raise SIGSEGV for bounds violations against PCC/DDC in hybrid

564aee1

The signal for the DDC case isn't fully correct since the instruction would need to be decoded to compute the effective address and access mode (read vs write).

bsdjhb commented Jul 9, 2024

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bsdjhb linked an issue Jul 9, 2024 that may be closed by this pull request

Change raised signal from SIGPROT to SIGSEGV when indexing outside the ddc bound on a hybrid binary #2143

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bsdjhb mentioned this pull request Sep 24, 2024

add extra information into exception reporting riscv/riscv-cheri#373

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Raise SIGSEGV instead of SIGPROT for hybrid #2145

Raise SIGSEGV instead of SIGPROT for hybrid #2145

bsdjhb commented Jul 9, 2024

bsdjhb Jul 9, 2024

bsdjhb commented Jul 9, 2024

Raise SIGSEGV instead of SIGPROT for hybrid #2145

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Raise SIGSEGV instead of SIGPROT for hybrid #2145

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bsdjhb commented Jul 9, 2024