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kx10_imp.c
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/* kx10_imp.c: IMP, interface message processor.
Copyright (c) 2018-2020, Richard Cornwell based on code provided by
Lars Brinkhoff and Danny Gasparovski.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
RICHARD CORNWELL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
This emulates the MIT-AI/ML/MC Host/IMP interface.
*/
#include "kx10_defs.h"
#include "sim_ether.h"
#if NUM_DEVS_IMP > 0
#define IMP_DEVNUM 0460
#define BBN_IMP_DEVNUM 0550
#define WA_IMP_DEVNUM 0400
#define DEVNUM imp_dib.dev_num
#define UNIT_V_DHCP (UNIT_V_UF + 0) /* DHCP enable flag */
#define UNIT_DHCP (1 << UNIT_V_DHCP)
#define UNIT_V_DTYPE (UNIT_V_UF + 1) /* Type of IMP interface */
#define UNIT_M_DTYPE 3
#define UNIT_DTYPE (UNIT_M_DTYPE << UNIT_V_DTYPE)
#define GET_DTYPE(x) (((x) >> UNIT_V_DTYPE) & UNIT_M_DTYPE)
#define TYPE_MIT 0 /* MIT Style KAIMP ITS */
#define TYPE_BBN 1 /* BBN style interface TENEX */
#define TYPE_WAITS 2 /* IMP connected to waits system. */
#define TYPE_UNI 0 /* Unibus byte order */
#define TYPE_SIMP 1 /* PDP10 string byte order */
#if KS
/* IMP11 interface */
/* CSR values */
#define CSR_GO 0000001 /* Go transfer */
#define CSR_RST 0000002 /* Reset interface */
#define CSR_UBA 0000060 /* Unibus upper address */
#define CSR_IE 0000100 /* Interrupt enable */
#define CSR_RDY 0000200 /* Device ready */
#define CSR_MRE 0001000 /* Master error */
#define CSR_NXM 0040000 /* Non existant memory */
#define CSR_ERR 0100000 /* Error present */
/* Input CSR 0767600 */
#define CSR_HRC 0000004 /* Host Ready Relay Control */
#define CSR_SE 0000010 /* Store enable */
#define CSR_IBF 0000400 /* Input Buffer full */
#define CSR_INR 0002000 /* IMP not ready */
#define CSR_HR 0004000 /* Host Ready */
#define CSR_EOM 0020000 /* End of Message */
/* Input data buffer 0767602 */
/* Input Bus Address 0767604 */
/* Input Word Count 0767606 */
/* Output CSR 07676010 */
#define CSR_ELB 0000004 /* Send EOM indication to IMP */
#define CSR_BB 0000010 /* Bus Back */
#define CSR_OBE 0000400 /* OUtput Buffer Empty */
#define CSR_WC0 0020000 /* Output Word Count 0 */
/* Output data buffer 0767612 */
/* Output Bus Address 0767614 */
/* Output Word Count 0767616 */
/* Bits in STATUS */
#define IMPID 010 /* Input done. */
#define IMPIB 040 /* Input busy. */
#define IMPOD 0100 /* Output done. */
#define IMPOB 0400 /* Output busy. */
#define IMPERR 01000 /* IMP error. */
#define IMPR 02000 /* IMP ready. */
#define IMPIC 04000 /* IMP interrupt condition. */
#define IMPHER 010000 /* Host error. */
#define IMPHR 020000 /* Host ready. */
#define IMPIHE 040000 /* Inhibit interrupt on host error. */
#define IMPLW 0100000 /* Last IMP word. */
#else
/* ITS IMP Bits */
/* CONI */
#define IMPID 010 /* Input done. */
#define IMPI32 020 /* Input in 32 bit mode. */
#define IMPIB 040 /* Input busy. */
#define IMPOD 0100 /* Output done. */
#define IMPO32 0200 /* Output in 32-bit mode. */
#define IMPOB 0400 /* Output busy. */
#define IMPERR 01000 /* IMP error. */
#define IMPR 02000 /* IMP ready. */
#define IMPIC 04000 /* IMP interrupt condition. */
#define IMPHER 010000 /* Host error. */
#define IMPHR 020000 /* Host ready. */
#define IMPIHE 040000 /* Inhibit interrupt on host error. */
#define IMPLW 0100000 /* Last IMP word. */
/* CONO */
#define IMPIDC 010 /* Clear input done */
#define IMI32S 020 /* Set 32-bit output */
#define IMI32C 040 /* Clear 32-bit output */
#define IMPODC 0100 /* Clear output done */
#define IMO32S 0200 /* Set 32-bit input */
#define IMO32C 0400 /* Clear 32-bit input */
#define IMPODS 01000 /* Set output done */
#define IMPIR 04000 /* Enable interrupt on IMP ready */
#define IMPHEC 010000 /* Clear host error */
#define IMIIHE 040000 /* Inhibit interrupt on host error */
#define IMPLHW 0200000 /* Set last host word. */
/* BBN IMP BITS */
/* CONO bits */
#define IMP_EN_IN 00000010 /* Enable input PIA channel */
#define IMP_EN_OUT 00000200 /* Enable output PIA channel */
#define IMP_EN_END 00004000 /* Enable end PIA channel */
#define IMP_END_IN 00010000 /* End of input */
#define IMP_END_OUT 00020000 /* End of output */
#define IMP_STOP 00040000 /* Stop the imp */
#define IMP_PDP_DN 00100000 /* PDP-10 is down */
#define IMP_CLR 00200000 /* Clear imp down flag */
#define IMP_RST 00400000 /* Reset IMP */
/* CONI bits */
#define IMP_IFULL 00000010 /* Input full */
#define IMP_OEMPY 00000200 /* Output empty */
#define IMP_ENDIN 00014000 /* End of input */
#define IMP_DN 00020000 /* IMP down */
#define IMP_WAS_DN 00040000 /* IMP was down */
#define IMP_PWR 00200000 /* IMP Rdy */
/* WAITS IMP BITS */
/* CONO bits */
#define IMP_ODPIEN 0000010 /* Enable change of output done PIA, also set byte size */
#define IMP_IDPIEN 0000020 /* Enable change of input done PIA, also set byte size */
#define IMP_IEPIEN 0000040 /* Change end of input PIA */
#define IMP_FINO 0000100 /* Last bit of output */
#define IMP_STROUT 0000200 /* Start output */
#define IMP_CLRWT 0002000 /* Clear waiting to input bit */
#define IMP_CLRST 0004000 /* Clear stop after input bit */
#define IMP_O32 0010000 /* Set output to 32bit */
#define IMP_I32 0020000 /* Set input to 32bit */
#define IMP_STRIN 0040000 /* Start input */
#define IMP_TEST 0100000 /* Test mode */
/* CONI bits */
#define IMP_ODONE 0004000 /* Output done */
#define IMP_IEND 0010000 /* Input end. */
#define IMP_IDONE 0020000 /* Input done */
#define IMP_ERR 0040000 /* Imp error */
#define IMP_RDY 0200000 /* Imp ready */
#define IMP_OCHN 0000007
#define IMP_ICHN 0000070
#define IMP_ECHN 0000700
/* CONI timeout. If no CONI instruction is executed for 3-5 seconds,
the interface will raise the host error signal. */
#define CONI_TIMEOUT 3000000
#endif
#define STATUS u3
#define OPOS u4 /* Output bit position */
#define IPOS u5 /* Input bit position */
#define ILEN u6 /* Size of input buffer in bits */
#define IMP_ARPTAB_SIZE 64
#define IMP_ARP_MAX_AGE 100
uint32 mask[] = {
0xFFFFFFFF, 0xFFFFFFFE, 0xFFFFFFFC, 0xFFFFFFF8,
0xFFFFFFF0, 0xFFFFFFE0, 0xFFFFFFC0, 0xFFFFFF80,
0xFFFFFF00, 0xFFFFFE00, 0xFFFFFC00, 0xFFFFF800,
0xFFFFF000, 0xFFFFE000, 0xFFFFC000, 0xFFFF8000,
0xFFFF0000, 0xFFFE0000, 0xFFFC0000, 0xFFF80000,
0xFFF00000, 0xFFE00000, 0xFFC00000, 0xFF800000,
0xFF000000, 0xFE000000, 0xFC000000, 0xF8000000,
0xF0000000, 0xE0000000, 0xC0000000, 0x80000000,
0x00000000};
typedef uint32 in_addr_T;
PACKED_BEGIN
struct imp_eth_hdr {
ETH_MAC dest;
ETH_MAC src;
uint16 type;
} PACKED_END;
#define ETHTYPE_ARP 0x0806
#define ETHTYPE_IP 0x0800
/*
* Structure of an internet header, naked of options.
*/
PACKED_BEGIN
struct ip {
uint8 ip_v_hl; /* version,header length */
uint8 ip_tos; /* type of service */
uint16 ip_len; /* total length */
uint16 ip_id; /* identification */
uint16 ip_off; /* fragment offset field */
#define IP_DF 0x4000 /* don't fragment flag */
#define IP_MF 0x2000 /* more fragments flag */
#define IP_OFFMASK 0x1fff /* mask for fragmenting bits */
uint8 ip_ttl; /* time to live */
uint8 ip_p; /* protocol */
uint16 ip_sum; /* checksum */
in_addr_T ip_src;
in_addr_T ip_dst; /* source and dest address */
} PACKED_END;
#define TCP_PROTO 6
PACKED_BEGIN
struct tcp {
uint16 tcp_sport; /* Source port */
uint16 tcp_dport; /* Destination port */
uint32 seq; /* Sequence number */
uint32 ack; /* Ack number */
uint16 flags; /* Flags */
#define TCP_FL_FIN 0x01
#define TCP_FL_SYN 0x02
#define TCP_FL_RST 0x04
#define TCP_FL_PSH 0x08
#define TCP_FL_ACK 0x10
#define TCP_FL_URG 0x20
uint16 window; /* Window size */
uint16 chksum; /* packet checksum */
uint16 urgent; /* Urgent pointer */
} PACKED_END;
#define UDP_PROTO 17
PACKED_BEGIN
struct udp {
uint16 udp_sport; /* Source port */
uint16 udp_dport; /* Destination port */
uint16 len; /* Length */
uint16 chksum; /* packet checksum */
} PACKED_END;
PACKED_BEGIN
struct udp_hdr {
in_addr_T ip_src;
in_addr_T ip_dst; /* source and dest address */
uint8 zero;
uint8 proto; /* Protocol */
uint16 hlen; /* Length of header and data */
} PACKED_END;
#define ICMP_PROTO 1
PACKED_BEGIN
struct icmp {
uint8 type; /* Type of packet */
uint8 code; /* Code */
uint16 chksum; /* packet checksum */
} PACKED_END;
PACKED_BEGIN
struct ip_hdr {
struct imp_eth_hdr ethhdr;
struct ip iphdr;
} PACKED_END;
#define ARP_REQUEST 1
#define ARP_REPLY 2
#define ARP_HWTYPE_ETH 1
PACKED_BEGIN
struct arp_hdr {
struct imp_eth_hdr ethhdr;
uint16 hwtype;
uint16 protocol;
uint8 hwlen;
uint8 protolen;
uint16 opcode;
ETH_MAC shwaddr;
in_addr_T sipaddr;
ETH_MAC dhwaddr;
in_addr_T dipaddr;
uint8 padding[18];
} PACKED_END;
struct arp_entry {
in_addr_T ipaddr;
ETH_MAC ethaddr;
int16 age;
#define ARP_DONT_AGE -1
};
/* DHCP client states */
#define DHCP_STATE_OFF 0
#define DHCP_STATE_REQUESTING 1
#define DHCP_STATE_INIT 2
#define DHCP_STATE_REBOOTING 3
#define DHCP_STATE_REBINDING 4
#define DHCP_STATE_RENEWING 5
#define DHCP_STATE_SELECTING 6
#define DHCP_STATE_INFORMING 7
#define DHCP_STATE_CHECKING 8
#define DHCP_STATE_PERMANENT 9 /* not yet implemented */
#define DHCP_STATE_BOUND 10
#define DHCP_STATE_RELEASING 11 /* not yet implemented */
#define DHCP_STATE_BACKING_OFF 12
/* DHCP op codes */
#define DHCP_BOOTREQUEST 1
#define DHCP_BOOTREPLY 2
/* DHCP message types */
#define DHCP_DISCOVER 1
#define DHCP_OFFER 2
#define DHCP_REQUEST 3
#define DHCP_DECLINE 4
#define DHCP_ACK 5
#define DHCP_NAK 6
#define DHCP_RELEASE 7
#define DHCP_INFORM 8
/** DHCP hardware type, currently only ethernet is supported */
#define DHCP_HTYPE_ETH 1
#define DHCP_MAGIC_COOKIE 0x63825363UL
#define DHCP_INFINITE_LEASE 0xFFFFFFFF
#define DHCP_UDP_PORT_CLIENT 68
#define DHCP_UDP_PORT_SERVER 67
/* This is a list of options for BOOTP and DHCP, see RFC 2132 for descriptions */
/* BootP options */
#define DHCP_OPTION_PAD 0
#define DHCP_OPTION_SUBNET_MASK 1 /* RFC 2132 3.3 */
#define DHCP_OPTION_ROUTER 3
#define DHCP_OPTION_DNS_SERVER 6
#define DHCP_OPTION_HOSTNAME 12
#define DHCP_OPTION_IP_TTL 23
#define DHCP_OPTION_MTU 26
#define DHCP_OPTION_BROADCAST 28
#define DHCP_OPTION_TCP_TTL 37
#define DHCP_OPTION_NTP 42
#define DHCP_OPTION_END 255
/* DHCP options */
#define DHCP_OPTION_REQUESTED_IP 50 /* RFC 2132 9.1, requested IP address */
#define DHCP_OPTION_LEASE_TIME 51 /* RFC 2132 9.2, time in seconds, in 4 bytes */
#define DHCP_OPTION_OVERLOAD 52 /* RFC 2132 9.3, use file and/or sname field for options */
#define DHCP_OPTION_MESSAGE_TYPE 53 /* RFC 2132 9.6, important for DHCP */
#define DHCP_OPTION_MESSAGE_TYPE_LEN 1
#define DHCP_OPTION_SERVER_ID 54 /* RFC 2132 9.7, server IP address */
#define DHCP_OPTION_PARAMETER_REQUEST_LIST 55 /* RFC 2132 9.8, requested option types */
#define DHCP_OPTION_MAX_MSG_SIZE 57 /* RFC 2132 9.10, message size accepted >= 576 */
#define DHCP_OPTION_MAX_MSG_SIZE_LEN 2
#define DHCP_OPTION_T1 58 /* T1 renewal time */
#define DHCP_OPTION_T2 59 /* T2 rebinding time */
#define DHCP_OPTION_US 60
#define DHCP_OPTION_CLIENT_ID 61
#define DHCP_OPTION_TFTP_SERVERNAME 66
#define DHCP_OPTION_BOOTFILE 67
/* possible combinations of overloading the file and sname fields with options */
#define DHCP_OVERLOAD_NONE 0
#define DHCP_OVERLOAD_FILE 1
#define DHCP_OVERLOAD_SNAME 2
#define DHCP_OVERLOAD_SNAME_FILE 3
#define DHCP_CHADDR_LEN 16
#define DHCP_SNAME_LEN 64
#define DHCP_FILE_LEN 128
PACKED_BEGIN
struct dhcp {
uint8 op; /* Operation */
uint8 htype; /* Header type */
uint8 hlen; /* Ether Header len */
uint8 hops; /* ops? */
uint32 xid; /* id number */
uint16 secs;
uint16 flags;
in_addr_T ciaddr; /* Client IP address */
in_addr_T yiaddr; /* Your IP address */
in_addr_T siaddr; /* Server IP address */
in_addr_T giaddr; /* Gateway IP address */
uint8 chaddr[DHCP_CHADDR_LEN];
uint8 sname[DHCP_SNAME_LEN];
uint8 file[DHCP_FILE_LEN];
uint32 cookie; /* magic cookie */
uint8 options[100]; /* Space for options */
} PACKED_END;
struct imp_packet {
struct imp_packet *next; /* Link to packets */
ETH_PACK packet;
in_addr_T dest; /* Destination IP address */
uint16 msg_id; /* Message ID */
int life; /* How many ticks to wait */
} imp_buffer[8];
struct imp_map {
uint16 sport; /* Port to fix */
uint16 dport; /* Port to fix */
uint16 cls_tim; /* Close timer */
uint32 adj; /* Amount to adjust */
uint32 lseq; /* Sequence number last adjusted */
};
struct imp_stats {
int recv; /* received packets */
int dropped; /* received packets dropped */
int xmit; /* transmitted packets */
int fail; /* transmit failed */
int runt; /* runts */
int reset; /* reset count */
int giant; /* oversize packets */
int setup; /* setup packets */
int loop; /* loopback packets */
int recv_overrun; /* receiver overruns */
};
struct imp_device {
ETH_PCALLBACK rcallback; /* read callback routine */
ETH_PCALLBACK wcallback; /* write callback routine */
ETH_MAC macs[2]; /* Hardware MAC addresses */
#define mac macs[0]
#define bcast macs[1]
struct imp_packet *sendq; /* Send queue */
struct imp_packet *freeq; /* Free queue */
in_addr_T ip; /* Local IP address */
in_addr_T ip_mask; /* Local IP mask */
in_addr_T hostip; /* IP address of local host */
in_addr_T gwip; /* Gateway IP address */
int maskbits; /* Mask length */
struct imp_map port_map[64]; /* Ports to adjust */
in_addr_T dhcpip; /* DHCP server address */
uint8 dhcp_state; /* State of DHCP */
uint32 dhcp_lease; /* DHCP lease time */
int dhcp_renew; /* DHCP renew time */
int dhcp_rebind; /* DHCP rebind time */
int dhcp_wait_time; /* seconds waiting for response */
int dhcp_retry_after; /* timeout time */
int init_state; /* Initialization state */
uint32 dhcp_xid; /* Transaction ID */
int padding; /* Type zero padding */
uint64 obuf; /* Output buffer */
uint64 ibuf; /* Input buffer */
int obits; /* Output bits */
int ibits; /* Input bits */
struct imp_stats stats;
uint8 sbuffer[ETH_FRAME_SIZE]; /* Temp send buffer */
uint8 rbuffer[ETH_FRAME_SIZE]; /* Temp receive buffer */
ETH_DEV etherface;
ETH_QUE ReadQ;
int imp_error;
int host_error;
int rfnm_count; /* Number of pending RFNM packets */
int pia; /* PIA channels */
struct arp_entry arp_table[IMP_ARPTAB_SIZE];
} imp_data;
extern int32 tmxr_poll;
static CONST ETH_MAC broadcast_ethaddr = {0xff,0xff,0xff,0xff,0xff,0xff};
static CONST in_addr_T broadcast_ipaddr = {0xffffffff};
#if KS
int imp_wr(DEVICE *dptr, t_addr addr, uint16 data, int32 access);
int imp_rd(DEVICE *dptr, t_addr addr, uint16 *data, int32 access);
uint16 imp_vect(struct pdp_dib *dibp);
#else
t_stat imp_devio(uint32 dev, uint64 *data);
t_addr imp_devirq(uint32 dev, t_addr addr);
#endif
t_stat imp_srv(UNIT *);
t_stat imp_eth_srv(UNIT *);
t_stat imp_tim_srv(UNIT *);
t_stat imp_reset (DEVICE *dptr);
t_stat imp_set_mpx (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat imp_show_mpx (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat imp_show_mac (FILE* st, UNIT* uptr, int32 val, CONST void* desc);
t_stat imp_set_mac (UNIT* uptr, int32 val, CONST char* cptr, void* desc);
t_stat imp_show_ip (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat imp_set_ip (UNIT* uptr, int32 val, CONST char* cptr, void* desc);
t_stat imp_show_gwip (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat imp_set_gwip (UNIT* uptr, int32 val, CONST char* cptr, void* desc);
t_stat imp_show_hostip (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat imp_set_hostip (UNIT* uptr, int32 val, CONST char* cptr, void* desc);
t_stat imp_show_dhcpip (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat imp_show_arp (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat imp_set_arp (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
void imp_timer_task(struct imp_device *imp);
void imp_send_rfmn(struct imp_device *imp);
void imp_packet_in(struct imp_device *imp);
void imp_send_packet (struct imp_device *imp_data, int len);
void imp_free_packet(struct imp_device *imp, struct imp_packet *p);
struct imp_packet * imp_get_packet(struct imp_device *imp);
void imp_arp_update(struct imp_device *imp, in_addr_T ipaddr, ETH_MAC *ethaddr, int age);
void imp_arp_arpin(struct imp_device *imp, ETH_PACK *packet);
void imp_arp_arpout(struct imp_device *imp, in_addr_T ipaddr);
struct arp_entry * imp_arp_lookup(struct imp_device *imp, in_addr_T ipaddr);
void imp_packet_out(struct imp_device *imp, ETH_PACK *packet);
void imp_packet_debug(struct imp_device *imp, const char *action, ETH_PACK *packet);
void imp_write(struct imp_device *imp, ETH_PACK *packet);
void imp_do_dhcp_client(struct imp_device *imp, ETH_PACK *packet);
void imp_dhcp_timer(struct imp_device *imp);
void imp_dhcp_discover(struct imp_device *imp);
void imp_dhcp_request(struct imp_device *imp, in_addr_T dhcpip);
void imp_dhcp_release(struct imp_device *imp);
void imp_arp_age(struct imp_device *imp);
t_stat imp_attach (UNIT * uptr, CONST char * cptr);
t_stat imp_detach (UNIT * uptr);
t_stat imp_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, CONST char *cptr);
const char *imp_description (DEVICE *dptr);
static char *ipv4_inet_ntoa(struct in_addr ip);
static int ipv4_inet_aton(const char *str, struct in_addr *inp);
#if KS
uint16 imp_icsr;
uint16 imp_idb;
uint32 imp_iba;
uint16 imp_iwcnt;
uint16 imp_ocsr;
uint16 imp_odb;
uint32 imp_oba;
uint16 imp_owcnt;
#endif
int imp_mpx_lvl = 0;
double last_coni;
UNIT imp_unit[] = {
{UDATA(imp_srv, UNIT_IDLE+UNIT_ATTABLE+UNIT_DHCP, 0)}, /* 0 */
{UDATA(imp_eth_srv, UNIT_IDLE+UNIT_DIS, 0)}, /* 1 */
{UDATA(imp_tim_srv, UNIT_IDLE+UNIT_DIS, 0)}, /* 2 */
};
#if KS
DIB imp_dib = {0767600, 017, 0250, 6, 3, &imp_rd, &imp_wr, 0, 0, 0};
#else
DIB imp_dib = {IMP_DEVNUM, 1, &imp_devio,
#if KL
&imp_devirq,
#else
NULL
#endif
};
#endif
MTAB imp_mod[] = {
{ MTAB_XTD|MTAB_VDV|MTAB_VALR|MTAB_NC, 0, "MAC", "MAC=xx:xx:xx:xx:xx:xx",
&imp_set_mac, &imp_show_mac, NULL, "MAC address" },
#if MPX_DEV
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "MPX", "MPX",
&imp_set_mpx, &imp_show_mpx, NULL, "ITS Interrupt Channel #"},
#endif
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "IP", "IP=ddd.ddd.ddd.ddd/dd",
&imp_set_ip, &imp_show_ip, NULL, "IP address" },
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "GW", "GW=ddd.ddd.ddd.ddd",
&imp_set_gwip, &imp_show_gwip, NULL, "Gateway address" },
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "HOST", "HOST=ddd.ddd.ddd.ddd",
&imp_set_hostip, &imp_show_hostip, NULL, "HOST IP address" },
{ MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "ETH", NULL, NULL,
ð_show, NULL, "Display attachedable devices" },
{ UNIT_DHCP, 0, NULL, "NODHCP", NULL, NULL, NULL,
"Don't aquire address from DHCP"},
{ UNIT_DHCP, UNIT_DHCP, "DHCP", "DHCP", NULL, NULL, NULL,
"Use DHCP to set IP address"},
{ MTAB_XTD|MTAB_VDV, 0, "DHCPIP", NULL,
NULL, &imp_show_dhcpip, NULL, "DHCP info" },
#if KS
{ UNIT_DTYPE, (TYPE_UNI << UNIT_V_DTYPE), "UNI", "UNI", NULL, NULL, NULL,
"Standard Unibus transfers"},
{ UNIT_DTYPE, (TYPE_SIMP << UNIT_V_DTYPE), "SIMP", "SIMP", NULL, NULL, NULL,
"PDP10 byte order transfers"},
#else
{ UNIT_DTYPE, (TYPE_MIT << UNIT_V_DTYPE), "MIT", "MIT", NULL, NULL, NULL,
"ITS/MIT style interface"},
{ UNIT_DTYPE, (TYPE_BBN << UNIT_V_DTYPE), "BBN", "BBN", NULL, NULL, NULL,
"Tenex/BBN style interface"},
{ UNIT_DTYPE, (TYPE_WAITS << UNIT_V_DTYPE), "WAITS", "WAITS", NULL, NULL, NULL,
"WAITS style interface"},
#endif
{ MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "ARP", NULL,
NULL, &imp_show_arp, NULL, "ARP IP address->MAC address table" },
{ MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, NULL, "ARP=ddd.ddd.ddd.ddd=XX:XX:XX:XX:XX:XX",
&imp_set_arp, NULL, NULL, "Create a static ARP Entry" },
#if KS
{MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "addr", "addr", &uba_set_addr, uba_show_addr,
NULL, "Sets address of IMP11" },
{MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "vect", "vect", &uba_set_vect, uba_show_vect,
NULL, "Sets vect of IMP11" },
{MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "br", "br", &uba_set_br, uba_show_br,
NULL, "Sets br of IMP11" },
{MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "ctl", "ctl", &uba_set_ctl, uba_show_ctl,
NULL, "Sets uba of IMP11" },
#endif
{ 0 }
};
/* Simulator debug controls */
DEBTAB imp_debug[] = {
{"CMD", DEBUG_CMD, "Show command execution to devices"},
{"DATA", DEBUG_DATA, "Show data transfers"},
{"DETAIL", DEBUG_DETAIL, "Show details about device"},
{"EXP", DEBUG_EXP, "Show exception information"},
{"CONI", DEBUG_CONI, "Show coni instructions"},
{"CONO", DEBUG_CONO, "Show cono instructions"},
{"DATAIO", DEBUG_DATAIO, "Show datai and datao instructions"},
{"IRQ", DEBUG_IRQ, "Show IRQ requests"},
#define DEBUG_DHCP (DEBUG_IRQ<<1)
{"DHCP", DEBUG_DHCP, "Show DHCP activities"},
#define DEBUG_ARP (DEBUG_DHCP<<1)
{"ARP", DEBUG_ARP, "Show ARP activities"},
#define DEBUG_TCP (DEBUG_ARP<<1)
{"TCP", DEBUG_TCP, "Show TCP packet activities"},
#define DEBUG_UDP (DEBUG_TCP<<1)
{"UDP", DEBUG_UDP, "Show UDP packet activities"},
#define DEBUG_ICMP (DEBUG_UDP<<1)
{"ICMP", DEBUG_ICMP, "Show ICMP packet activities"},
#define DEBUG_ETHER (DEBUG_ICMP<<1)
{"ETHER", DEBUG_ETHER, "Show ETHER activities"},
{0, 0}
};
REG imp_reg[] = {
{SAVEDATA(DATA, imp_data) },
{0}
};
DEVICE imp_dev = {
"IMP", imp_unit, imp_reg, imp_mod,
3, 8, 0, 1, 8, 36,
NULL, NULL, &imp_reset, NULL, &imp_attach, &imp_detach,
&imp_dib, DEV_DISABLE | DEV_DIS | DEV_DEBUG | DEV_ETHER, 0, imp_debug,
NULL, NULL, &imp_help, NULL, NULL, &imp_description
};
#define IMP_OCHN 0000007
#define IMP_ICHN 0000070
#define IMP_ECHN 0000700
#if KS
static void check_interrupts (UNIT *uptr)
{
DEVICE *dptr = &imp_dev;
struct pdp_dib *dibp = (DIB *)dptr->ctxt;
if ((uptr->STATUS & IMPID) != 0 && imp_icsr & CSR_IE) {
uba_set_irq(dibp, dibp->uba_vect);
}
}
int
imp_wr(DEVICE *dptr, t_addr addr, uint16 data, int32 access)
{
struct pdp_dib *dibp = (DIB *)dptr->ctxt;
UNIT *uptr = imp_unit;
addr &= dibp->uba_mask;
sim_debug(DEBUG_DETAIL, dptr, "IMP11 write %06o %06o %o\n",
addr, data, access);
switch (addr & 016) {
case 000: /* Input CSR */
if (access == BYTE) {
if (addr & 1)
data = data | (imp_icsr & 0377);
else
data = (imp_icsr & 0177400) | data;
}
if (data & CSR_RST) {
imp_icsr = CSR_INR|CSR_RDY;
imp_iba = 0;
imp_iwcnt = 0;
uba_clr_irq(dibp, dibp->uba_vect);
}
data &= (CSR_GO|CSR_RST|CSR_UBA|CSR_IE|CSR_HRC|CSR_SE);
imp_icsr &= ~(CSR_GO|CSR_RST|CSR_UBA|CSR_IE|CSR_HRC|CSR_SE|CSR_ERR
|CSR_NXM|CSR_MRE);
imp_icsr |= data;
if (data & CSR_HRC) {
imp_icsr |= CSR_HR;
} else {
imp_icsr &= ~CSR_HR;
imp_icsr |= CSR_INR;
}
if (data & CSR_GO) {
imp_icsr &= ~CSR_RDY;
uptr->STATUS &= ~(IMPID|IMPLW);
uba_clr_irq(dibp, dibp->uba_vect);
}
sim_debug(DEBUG_DETAIL, dptr, "IMP11 icsr %06o\n", imp_icsr);
break;
case 002: /* Input Data Buffer */
if (access == BYTE) {
if (addr & 1)
data = data | (imp_idb & 0377);
else
data = (imp_idb & 0177400) | data;
}
imp_idb = data;
break;
case 004: /* Input Bus Address */
imp_iba = (data & 0177777);
imp_icsr &= ~(CSR_ERR);
break;
case 006: /* Input Word Count */
imp_iwcnt = (data & 0177777);
break;
case 010: /* Output CSR */
if (access == BYTE) {
if (addr & 1)
data = data | (imp_ocsr & 0377);
else
data = (imp_ocsr & 0177400) | data;
}
if (data & CSR_RST) {
imp_ocsr |= CSR_RDY;
imp_oba = 0;
imp_owcnt = 0;
uba_clr_irq(dibp, dibp->uba_vect + 4);
}
data &= (CSR_GO|CSR_RST|CSR_UBA|CSR_IE|CSR_BB|CSR_ELB);
imp_ocsr &= ~(CSR_GO|CSR_RST|CSR_UBA|CSR_IE|CSR_BB|CSR_ELB|CSR_ERR
|CSR_NXM|CSR_MRE);
imp_ocsr |= data;
if (data & CSR_GO) {
imp_ocsr &= ~CSR_RDY;
uptr->STATUS &= ~(IMPOD);
uba_clr_irq(dibp, dibp->uba_vect + 4);
}
sim_debug(DEBUG_DETAIL, dptr, "IMP11 ocsr %06o\n", imp_ocsr);
break;
case 012: /* Output Data Buffer */
if (access == BYTE) {
if (addr & 1)
data = data | (imp_odb & 0377);
else
data = (imp_odb & 0177400) | data;
}
imp_odb = data;
break;
case 014: /* Output Bus Address */
imp_oba = (data & 0177777);
imp_ocsr &= ~(CSR_ERR);
break;
case 016: /* Output Word Count */
imp_owcnt = (data & 0177777);
break;
}
if (imp_ocsr & CSR_GO || imp_icsr & CSR_GO)
sim_activate(uptr, 100);
return 0;
}
int
imp_rd(DEVICE *dptr, t_addr addr, uint16 *data, int32 access)
{
struct pdp_dib *dibp = (DIB *)dptr->ctxt;
UNIT *uptr = imp_unit;
addr &= dibp->uba_mask;
switch (addr & 016) {
case 000: /* Input CSR */
*data = imp_icsr;
if ((uptr->STATUS & (IMPID)) != 0)
*data |= CSR_IBF;
if ((uptr->STATUS & (IMPLW)) != 0)
*data |= CSR_EOM;
break;
case 002: /* Input Data Buffer */
*data = imp_idb;
break;
case 004: /* Input Bus Address */
*data = imp_iba;
break;
case 006: /* Input Word Count */
*data = imp_iwcnt;
break;
case 010: /* Output CSR */
*data = imp_ocsr;
if ((uptr->STATUS & (IMPOD)) != 0)
*data |= CSR_OBE;
break;
case 012: /* Output Data Buffer */
*data = imp_odb;
break;
case 014: /* Output Bus Address */
*data = imp_oba;
break;
case 016: /* Output Word Count */
*data = imp_owcnt;
break;
}
sim_debug(DEBUG_DETAIL, dptr, "IMP11 read %06o %06o %o\n",
addr, *data, access);
return 0;
}
#else
static void check_interrupts (UNIT *uptr)
{
clr_interrupt (DEVNUM);
if ((uptr->STATUS & (IMPERR | IMPIC)) == IMPERR)
set_interrupt(DEVNUM, imp_data.pia >> 6);
if ((uptr->STATUS & (IMPR | IMPIC)) == (IMPR | IMPIC))
set_interrupt(DEVNUM, imp_data.pia >> 6);
if ((uptr->STATUS & (IMPHER | IMPIHE)) == IMPHER)
set_interrupt(DEVNUM, imp_data.pia >> 6);
if (uptr->STATUS & IMPID) {
if (uptr->STATUS & IMPLW)
set_interrupt(DEVNUM, imp_data.pia);
else
set_interrupt_mpx(DEVNUM, imp_data.pia, imp_mpx_lvl);
}
if (uptr->STATUS & IMPOD)
set_interrupt_mpx(DEVNUM, imp_data.pia >> 3, imp_mpx_lvl + 1);
}
t_stat imp_devio(uint32 dev, uint64 *data)
{
DEVICE *dptr = &imp_dev;
UNIT *uptr = imp_unit;
switch(dev & 07) {
case CONO:
sim_debug(DEBUG_CONO, dptr, "IMP %03o CONO %06o PC=%o\n", dev,
(uint32)*data, PC);
switch (GET_DTYPE(uptr->flags)) {
case TYPE_MIT:
imp_data.pia = *data & 7;
imp_data.pia = (imp_data.pia << 6) | (imp_data.pia << 3) | imp_data.pia;
if (*data & IMPIDC) /* Clear input done. */
uptr->STATUS &= ~IMPID;
if (*data & IMI32S) /* Set 32-bit input. */
uptr->STATUS |= IMPI32;
if (*data & IMI32C) /* Clear 32-bit input */
uptr->STATUS &= ~IMPI32;
if (*data & IMPODC) /* Clear output done. */
uptr->STATUS &= ~IMPOD;
if (*data & IMO32C) /* Clear 32-bit output. */
uptr->STATUS &= ~IMPO32;
if (*data & IMO32S) /* Set 32-bit output. */
uptr->STATUS |= IMPO32;
if (*data & IMPODS) /* Set output done. */
uptr->STATUS |= IMPOD;
if (*data & IMPIR) { /* Enable interrupt on IMP ready. */
uptr->STATUS |= IMPIC;
uptr->STATUS &= ~IMPERR;
}
if (*data & IMPHEC) { /* Clear host error. */
/* Only if there has been a CONI lately. */
if (last_coni - sim_gtime() < CONI_TIMEOUT)
uptr->STATUS &= ~IMPHER;
}
if (*data & IMIIHE) /* Inhibit interrupt on host error. */
uptr->STATUS |= IMPIHE;
if (*data & IMPLHW) /* Last host word. */
uptr->STATUS |= IMPLHW;
check_interrupts(uptr);
break;
case TYPE_BBN:
case TYPE_WAITS:
if (*data & IMP_ODPIEN) {
imp_data.pia &= ~07;
imp_data.pia |= *data & 07;
uptr->STATUS &= ~(IMPO32|IMPLHW|IMPOD);
if (*data & IMP_O32)
uptr->STATUS |= IMPO32;
}
if (*data & IMP_IDPIEN) {
imp_data.pia &= ~070;
imp_data.pia |= (*data & 07) << 3;
uptr->STATUS &= ~(IMPI32|IMPID);
if (*data & IMP_I32)
uptr->STATUS |= IMPI32;
}
if (*data & IMP_IEPIEN) {
imp_data.pia &= ~0700;
imp_data.pia |= (*data & 07) << 6;
}
if (*data & IMP_FINO) {
if (uptr->STATUS & IMPOD) {
imp_send_packet (&imp_data, uptr->OPOS >> 3);
/* Allow room for ethernet header for later */
memset(imp_data.sbuffer, 0, ETH_FRAME_SIZE);
uptr->OPOS = 0;
uptr->STATUS &= ~(IMPLHW);
} else
uptr->STATUS |= IMPLHW;
}
if (*data & IMP_STROUT)
uptr->STATUS &= ~(IMPOD|IMPLHW);
if (*data & IMP_CLRWT) { /* Not sure about this yet. */
uptr->STATUS &= ~IMPID;
}
if (*data & IMP_CLRST) /* Not sure about this yet. */
uptr->STATUS &= ~IMPID;
if (*data & IMP_STRIN) {
uptr->STATUS &= ~IMPID;
uptr->ILEN = 0;
}
check_interrupts(uptr);
break;
}
break;
case CONI:
switch (GET_DTYPE(uptr->flags)) {
case TYPE_MIT:
last_coni = sim_gtime();
*data = (uint64)(uptr->STATUS | (imp_data.pia & 07));
break;
case TYPE_BBN:
case TYPE_WAITS:
*data = (uint64)(imp_data.pia & 0777);
if (uptr->STATUS & IMPOD)
*data |= IMP_ODONE;
if (uptr->STATUS & IMPID)
*data |= IMP_IDONE;
if (uptr->STATUS & IMPR)
*data |= IMP_RDY;
if (uptr->STATUS & IMPLW)
*data |= IMP_IEND;
if (uptr->STATUS & (IMPERR|IMPHER))
*data |= IMP_ERR;
break;
}
sim_debug(DEBUG_CONI, dptr, "IMP %03o CONI %012llo PC=%o\n", dev,
*data, PC);
break;
case DATAO:
uptr->STATUS |= IMPOB;
uptr->STATUS &= ~IMPOD;
imp_data.obuf = *data;
imp_data.obits = (uptr->STATUS & IMPO32) ? 32 : 36;
sim_debug(DEBUG_DATAIO, dptr, "IMP %03o DATO %012llo %d %08x PC=%o\n",
dev, *data, imp_data.obits, (uint32)(*data >> 4), PC);
sim_activate(uptr, 100);
break;
case DATAI:
*data = imp_data.ibuf;
uptr->STATUS &= ~(IMPID|IMPLW);
sim_debug(DEBUG_DATAIO, dptr, "IMP %03o DATI %012llo %08x PC=%o\n",
dev, *data, (uint32)(*data >> 4), PC);
if (uptr->ILEN != 0)
uptr->STATUS |= IMPIB;
sim_activate(uptr, 100);
break;
}
check_interrupts (uptr);
return SCPE_OK;
}
#if KL
/* Handle KL style interrupt vectors for ITS */
t_addr