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KA10: Fixed Chaosnet devices to work properly under ITS.
1 parent da6dcef commit cd40b30

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2 files changed

+39
-31
lines changed

2 files changed

+39
-31
lines changed

‎PDP10/ka10_ch10.c

+22-18
Original file line numberDiff line numberDiff line change
@@ -105,9 +105,10 @@ static char peer[256];
105105
int address;
106106
static uint64 ch10_status;
107107
static int rx_count;
108+
static int rx_pos;
108109
static int tx_count;
109-
static uint8 rx_buffer[512+100];
110-
static uint8 tx_buffer[512+100];
110+
static uint8 rx_buffer[514+100];
111+
static uint8 tx_buffer[514+100];
111112

112113
TMLN ch10_lines[1] = { {0} };
113114
TMXR ch10_tmxr = { 1, NULL, 0, ch10_lines};
@@ -226,7 +227,7 @@ t_stat ch10_transmit ()
226227
int i = CHUDP_HEADER + tx_count;
227228
uint16 chk;
228229

229-
if (tx_count > (512 - CHUDP_HEADER)) {
230+
if (tx_count > (514 - CHUDP_HEADER)) {
230231
sim_debug (DBG_PKT, &ch10_dev, "Pack size failed, %d bytes.\n", (int)tx_count);
231232
ch10_status |= PLE;
232233
return SCPE_INCOMP;
@@ -243,7 +244,7 @@ t_stat ch10_transmit ()
243244
len = CHUDP_HEADER + (size_t)tx_count;
244245
r = tmxr_put_packet_ln (&ch10_lines[0], (const uint8 *)&tx_buffer, len);
245246
if (r == SCPE_OK) {
246-
sim_debug (DBG_PKT, &ch10_dev, "Sent UDP packet, %d bytes.\n", (int)len);
247+
sim_debug (DBG_PKT, &ch10_dev, "Sent UDP packet, %d bytes. %04x checksum\n", (int)len, chk);
247248
tmxr_poll_tx (&ch10_tmxr);
248249
} else {
249250
sim_debug (DBG_ERR, &ch10_dev, "Sending UDP failed: %d.\n", r);
@@ -275,11 +276,12 @@ void ch10_receive (void)
275276
return;
276277

277278
if ((RXD & ch10_status) == 0) {
278-
count = (count + 1) & 0776;
279-
memcpy (rx_buffer + (512 - count), p, count);
279+
count = (count + 1) & 01776;
280280
rx_count = count;
281+
memcpy (rx_buffer, p, rx_count);
282+
rx_pos = 0;
281283
sim_debug (DBG_TRC, &ch10_dev, "Rx count, %d\n", rx_count);
282-
ch10_validate (p + CHUDP_HEADER, count - CHUDP_HEADER);
284+
ch10_validate (rx_buffer + CHUDP_HEADER, rx_count - CHUDP_HEADER);
283285
ch10_status |= RXD;
284286
ch10_lines[0].rcve = FALSE;
285287
sim_debug (DBG_TRC, &ch10_dev, "Rx off\n");
@@ -296,6 +298,7 @@ void ch10_clear (void)
296298
ch10_status = TXD;
297299
rx_count = 0;
298300
tx_count = 0;
301+
rx_pos = 0;
299302

300303
tx_buffer[0] = 1; /* CHUDP header */
301304
tx_buffer[1] = 1;
@@ -349,7 +352,7 @@ t_stat ch10_devio(uint32 dev, uint64 *data)
349352
break;
350353
case DATAO:
351354
ch10_status &= ~TXD;
352-
if (tx_count < 512) {
355+
if (tx_count < 514) {
353356
int i = CHUDP_HEADER + tx_count;
354357
if (ch10_status & SWAP) {
355358
tx_buffer[i] = (*data >> 20) & 0xff;
@@ -382,22 +385,23 @@ t_stat ch10_devio(uint32 dev, uint64 *data)
382385
*data = 0;
383386
sim_debug (DBG_ERR, &ch10_dev, "Read empty buffer\n");
384387
} else {
385-
int i = 512-rx_count;
386388
ch10_status &= ~RXD;
387389
if (ch10_status & SWAP) {
388-
*data = ((uint64)(rx_buffer[i]) & 0xff) << 20;
389-
*data |= ((uint64)(rx_buffer[i+1]) & 0xff) << 28;
390-
*data |= ((uint64)(rx_buffer[i+2]) & 0xff) << 4;
391-
*data |= ((uint64)(rx_buffer[i+3]) & 0xff) << 12;
390+
*data = ((uint64)(rx_buffer[rx_pos]) & 0xff) << 20;
391+
*data |= ((uint64)(rx_buffer[rx_pos+1]) & 0xff) << 28;
392+
*data |= ((uint64)(rx_buffer[rx_pos+2]) & 0xff) << 4;
393+
*data |= ((uint64)(rx_buffer[rx_pos+3]) & 0xff) << 12;
392394
} else {
393-
*data = ((uint64)(rx_buffer[i]) & 0xff) << 28;
394-
*data |= ((uint64)(rx_buffer[i+1]) & 0xff) << 20;
395-
*data |= ((uint64)(rx_buffer[i+2]) & 0xff) << 12;
396-
*data |= ((uint64)(rx_buffer[i+3]) & 0xff) << 4;
395+
*data = ((uint64)(rx_buffer[rx_pos]) & 0xff) << 28;
396+
*data |= ((uint64)(rx_buffer[rx_pos+1]) & 0xff) << 20;
397+
*data |= ((uint64)(rx_buffer[rx_pos+2]) & 0xff) << 12;
398+
*data |= ((uint64)(rx_buffer[rx_pos+3]) & 0xff) << 4;
397399
}
398400
rx_count-=4;
399401
sim_debug (DBG_DAT, &ch10_dev, "Read buffer word %d:%02x %02x %02x %02x %012llo %012llo\n",
400-
rx_count, rx_buffer[i], rx_buffer[i+1], rx_buffer[i+2], rx_buffer[i+3], *data, ch10_status);
402+
rx_count, rx_buffer[rx_pos], rx_buffer[rx_pos+1], rx_buffer[rx_pos+2], rx_buffer[rx_pos+3],
403+
*data, ch10_status);
404+
rx_pos+=4;
401405
}
402406
}
403407

‎PDP10/ks10_ch11.c

+17-13
Original file line numberDiff line numberDiff line change
@@ -97,9 +97,10 @@ static char peer[256];
9797
static int address;
9898
static uint16 ch11_csr;
9999
static int rx_count;
100+
static int rx_pos;
100101
static int tx_count;
101-
static uint8 rx_buffer[512+100];
102-
static uint8 tx_buffer[512+100];
102+
static uint8 rx_buffer[514+100];
103+
static uint8 tx_buffer[514+100];
103104

104105
TMLN ch11_lines[1] = { {0} };
105106
TMXR ch11_tmxr = { 1, NULL, 0, ch11_lines};
@@ -111,6 +112,7 @@ UNIT ch11_unit[] = {
111112
REG ch11_reg[] = {
112113
{ ORDATA(CSR, ch11_csr, 16)},
113114
{ GRDATAD(RXCNT, rx_count, 16, 16, 0, "Receive word count"), REG_FIT|REG_RO},
115+
{ GRDATAD(RXPOS, rx_pos, 16, 16, 0, "Receive Position"), REG_FIT|REG_RO},
114116
{ GRDATAD(TXCNT, tx_count, 16, 16, 0, "Transmit word count"), REG_FIT|REG_RO},
115117
{ BRDATAD(RXBUF, rx_buffer, 16, 8, sizeof rx_buffer, "Receive packet buffer"), REG_FIT},
116118
{ BRDATAD(TXBUF, tx_buffer, 16, 8, sizeof tx_buffer, "Transmit packet buffer"), REG_FIT},
@@ -179,6 +181,7 @@ ch11_write(DEVICE *dptr, t_addr addr, uint16 data, int32 access)
179181
sim_debug (DBG_REG, &ch11_dev, "Clear RX\n");
180182
ch11_csr &= ~CSR_RDN;
181183
rx_count = 0;
184+
rx_pos = 0;
182185
ch11_lines[0].rcve = TRUE;
183186
uba_clr_irq(dibp, dibp->uba_vect);
184187
}
@@ -219,7 +222,6 @@ int
219222
ch11_read(DEVICE *dptr, t_addr addr, uint16 *data, int32 access)
220223
{
221224
struct pdp_dib *dibp = (DIB *)dptr->ctxt;
222-
int i;
223225

224226
addr &= dibp->uba_mask;
225227
*data = 0;
@@ -237,19 +239,19 @@ ch11_read(DEVICE *dptr, t_addr addr, uint16 *data, int32 access)
237239
*data = 0;
238240
sim_debug (DBG_ERR, &ch11_dev, "Read empty buffer\n");
239241
} else {
240-
i = 512-rx_count;
241242
ch11_csr &= ~CSR_RDN;
242243
uba_clr_irq(dibp, dibp->uba_vect);
243-
*data = ((uint64)(rx_buffer[i]) & 0xff) << 8;
244-
*data |= ((uint64)(rx_buffer[i+1]) & 0xff);
245-
rx_count-=2;
244+
*data = ((uint64)(rx_buffer[rx_pos]) & 0xff) << 8;
245+
*data |= ((uint64)(rx_buffer[rx_pos+1]) & 0xff);
246246
sim_debug (DBG_DAT, &ch11_dev, "Read buffer word %d:%02x %02x %06o %06o\n",
247-
rx_count, rx_buffer[i], rx_buffer[i+1], *data, ch11_csr);
247+
rx_count, rx_buffer[rx_pos], rx_buffer[rx_pos+1], *data, ch11_csr);
248+
rx_count-=2;
249+
rx_pos+=2;
248250
}
249251
break;
250252

251253
case 006: /* Bit count */
252-
*data = ((512 - rx_count) - 1) & 07777;
254+
*data = ((rx_count * 8) - 1) & 07777;
253255
break;
254256
case 012: /* Start transmission */
255257
sim_debug (DBG_REG, &ch11_dev, "XMIT TX\n");
@@ -340,7 +342,7 @@ ch11_transmit (struct pdp_dib *dibp)
340342
len = CHUDP_HEADER + (size_t)tx_count;
341343
r = tmxr_put_packet_ln (&ch11_lines[0], (const uint8 *)&tx_buffer, len);
342344
if (r == SCPE_OK) {
343-
sim_debug (DBG_PKT, &ch11_dev, "Sent UDP packet, %d bytes.\n", (int)len);
345+
sim_debug (DBG_PKT, &ch11_dev, "Sent UDP packet, %d bytes. %04x checksum.\n", (int)len, chk);
344346
tmxr_poll_tx (&ch11_tmxr);
345347
} else {
346348
sim_debug (DBG_ERR, &ch11_dev, "Sending UDP failed: %d.\n", r);
@@ -372,9 +374,10 @@ ch11_receive (struct pdp_dib *dibp)
372374
return;
373375

374376
if ((CSR_RDN & ch11_csr) == 0) {
375-
count = (count + 1) & 0776;
376-
memcpy (rx_buffer + (512 - count), p, count);
377-
rx_count = count;
377+
count = (count + 1) & 01776;
378+
memcpy (rx_buffer, p + CHUDP_HEADER, count);
379+
rx_count = count - CHUDP_HEADER;
380+
rx_pos = 0;
378381
sim_debug (DBG_TRC, &ch11_dev, "Rx count, %d\n", rx_count);
379382
ch11_validate (p + CHUDP_HEADER, count - CHUDP_HEADER);
380383
ch11_csr |= CSR_RDN;
@@ -397,6 +400,7 @@ ch11_clear (struct pdp_dib *dibp)
397400
ch11_csr = CSR_TDN;
398401
rx_count = 0;
399402
tx_count = 0;
403+
rx_pos = 0;
400404

401405
tx_buffer[0] = 1; /* CHUDP header */
402406
tx_buffer[1] = 1;

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