Skip to content

Commit c7a9f29

Browse files
derekbrueningderekbruening
authored
i#2260 web: Add wiki content to doxygen docs (#2409)
Adds all of the Github wiki content to new doxygen docs pages integrated into the web site. Updates references to wiki pages in other files in the repository. Issue: #2260
1 parent 0b9f5e7 commit c7a9f29

16 files changed

+1768
-30
lines changed

‎.github/ISSUE_TEMPLATE/bug_report.md

+2-2
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ Steps to reproduce the behavior:
1818
2. Precise command line for running the application.
1919
3. Exact output or incorrect behavior.
2020

21-
Please also answer these questions drawn from https://github.com/DynamoRIO/drmemory/wiki/Debugging#narrowing-down-the-source-of-the-problem :
21+
Please also answer these questions drawn from https://drmemory.org/page_help.html#sec_narrow :
2222
- Does the problem go away when running in light mode (pass `-light` to Dr. Memory)?
2323
- Does the problem go away when running with the options `-leaks_only -no_count_leaks -no_track_allocs`?
2424
- Does the problem go away when running under plain DynamoRIO? Do this by running `dynamorio/bin32/drrun -- <application and args>` or `dynamorio/bin64/drrun -- <application and args>` depending on the bitwidth of your applicaiton. (Ignore warnings about "incomplete installation".)
@@ -38,7 +38,7 @@ paste output here
3838
**Versions**
3939
- What version of Dr. Memory are you using?
4040
- Does the latest build from
41-
https://github.com/DynamoRIO/drmemory/wiki/Latest-Build solve the problem?
41+
https://drmemory.org/page_download.html#sec_latest_build solve the problem?
4242
- What operating system version are you running on? ("Windows 10" is *not* sufficient: give the release number.)
4343
- Is your application 32-bit or 64-bit?
4444

‎CONTRIBUTING.md

+6-15
Original file line numberDiff line numberDiff line change
@@ -1,20 +1,11 @@
11
# Contributing to Dr. Memory
22

33
We welcome contributions to Dr. Memory. See our [list of project ideas for
4-
contributors](http://drmemory.org/projects.html) and also [our list that
5-
includes DynamoRIO
6-
projects](https://github.com/DynamoRIO/drmemory/wiki/Projects).
4+
contributors](http://drmemory.org/projects.html).
75

8-
If you would like to contribute code to Dr. Memory, you will need to first sign a
9-
[Contributor License Agreement](https://developers.google.com/open-source/cla/individual).
10-
11-
Our wiki contains further information on policies, how to check out the
12-
code, and how to add new code:
13-
14-
- [Contribution policies and suggestions](https://github.com/DynamoRIO/drmemory/wiki/Contributing)
15-
- [Git workflow](https://github.com/DynamoRIO/drmemory/wiki/Workflow)
16-
- [Code style guide](https://github.com/DynamoRIO/drmemory/wiki/Code-Style)
17-
- [Code reviews](https://github.com/DynamoRIO/drmemory/wiki/Code-Reviews)
6+
[Our web site](https://drmemory.org/page_contribute.html)
7+
contains further information on policies, how to check out the
8+
code, and how to add new code.
189

1910
## Reporting issues
2011

@@ -38,15 +29,15 @@ Memory)? What about when running with the options "-leaks_only
3829
-no_count_leaks -no_track_allocs"?
3930
4031
Does the problem go away when using the most recent build from
41-
https://github.com/DynamoRIO/drmemory/wiki/Latest-Build?
32+
https://drmemory.org/Latest-Build?
4233
4334
Try the debug version of Dr. Memory and of its underlying engine DynamoRIO
4435
by passing "-debug -dr_debug -pause_at_assert" to drmemory.exe. Are any
4536
messages reported?
4637
4738
Please provide any additional information below. Please also see the
4839
"Narrowing Down the Source of the Problem" section
49-
of https://github.com/DynamoRIO/drmemory/wiki/Debugging.
40+
of https://drmemory.org/Debugging.
5041
```
5142

5243
### Including code in issues

‎README

+3-4
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
# **********************************************************
2-
# Copyright (c) 2010-2016 Google, Inc. All rights reserved.
2+
# Copyright (c) 2010-2021 Google, Inc. All rights reserved.
33
# Copyright (c) 2008-2009 VMware, Inc. All rights reserved.
44
# **********************************************************
55

@@ -88,8 +88,7 @@ help on using Dr. Memory.
8888
Dr. Memory's source code and issue tracker live at
8989
https://github.com/DynamoRIO/drmemory
9090

91-
If you would like to submit a patch, you will need to first sign a
92-
Contributor License Agreement. See
93-
https://github.com/DynamoRIO/drmemory/wiki/Contributing for more information.
91+
We welcome contributions to Dr. Memory. Please see our
92+
instructions for contributing at https://drmemory.org/page_contribute.html.
9493

9594
===========================================================================

‎README.md

+1-2
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,7 @@ Dr. Memory operates on unmodified application binaries running on Windows,
1313
Linux, Mac, or Android on commodity IA-32, AMD64, and ARM hardware.
1414

1515
Dr. Memory is released under an LGPL license and binary packages are
16-
[available for
17-
download](https://github.com/DynamoRIO/drmemory/wiki/Downloads).
16+
[available for download](https://drmemory.org/page_download.html).
1817

1918
Dr. Memory is built on the [DynamoRIO dynamic instrumentation tool
2019
plaform](http://dynamorio.org).

‎docs/CMake_doxyfile.cmake

+2-2
Original file line numberDiff line numberDiff line change
@@ -217,9 +217,9 @@ endif ()
217217
if (TOOL_DR_MEMORY)
218218
string(REGEX REPLACE
219219
"using.dox"
220-
"using.dox errors.dox reports.dox light.dox chinese.dox fuzzer.dox coverage.dox tools.dox ${headers} debugging.dox"
220+
"download.dox using.dox errors.dox reports.dox light.dox chinese.dox fuzzer.dox coverage.dox tools.dox ${headers} debugging.dox"
221221
string "${string}")
222-
string(REGEX REPLACE "drfuzz.dox" "drfuzz.dox license.dox" string "${string}")
222+
string(REGEX REPLACE "drfuzz.dox" "drfuzz.dox license.dox contribute.dox build.dox projects.dox new_release.dox test.dox design_docs.dox arm_port.dox" string "${string}")
223223
else ()
224224
string(REGEX REPLACE
225225
"main.dox" "main.dox ${headers}" string "${string}")

‎drmemory/docs/arm_port.dox

+198
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,198 @@
1+
/* **********************************************************
2+
* Copyright (c) 2010-2021 Google, Inc. All rights reserved.
3+
* **********************************************************/
4+
5+
/* Dr. Memory: the memory debugger
6+
*
7+
* This library is free software; you can redistribute it and/or
8+
* modify it under the terms of the GNU Lesser General Public
9+
* License as published by the Free Software Foundation;
10+
* version 2.1 of the License, and no later version.
11+
12+
* This library is distributed in the hope that it will be useful,
13+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
14+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15+
* Library General Public License for more details.
16+
17+
* You should have received a copy of the GNU Lesser General Public
18+
* License along with this library; if not, write to the Free Software
19+
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20+
*/
21+
22+
/**
23+
****************************************************************************
24+
****************************************************************************
25+
\page page_arm_port ARM Port
26+
27+
# ARM Port Design Document
28+
29+
## Pattern Mode
30+
31+
### Instrumentation to compare a memory value to an immediate
32+
33+
We can't easily use our x86 instrumentation:
34+
35+
cmp <memval>, 0xf1fdf1fd
36+
37+
We may have to do sthg like:
38+
39+
spill r0
40+
spill r1
41+
ldr r0, <memval>
42+
movw 0xf1fd, r1
43+
movt 0xf1fd, r1
44+
cmp r0, r1
45+
restore r0
46+
restore r1
47+
48+
#### Thumb mode: can repeat single byte
49+
50+
The expanded-immeds do allow:
51+
52+
cmp r0, 0xf100f100
53+
54+
Or
55+
56+
cmp r0, 0x00fd00fd
57+
58+
Or
59+
60+
cmp r0, 0xf1f1f1f1
61+
62+
For Thumb, anyway.
63+
64+
Probably it's worth changing the pattern to avoid extra spills and instrs.
65+
66+
What it looks like with 0xf1f1f1f1:
67+
68+
+22 m4 @0x5291e120 <label>
69+
+22 m4 @0x5291db00 f8ca c084 str %r12 -> +0x00000084(%r10)[4byte]
70+
+26 m4 @0x5291e088 f8d3 c004 ldr +0x04(%r3)[4byte] -> %r12
71+
+30 m4 @0x5291e03c f1bc 3ff1 cmp %r12 $0xf1f1f1f1
72+
+34 m4 @0x5291dfa4 e7fe b.ne @0x5291e0d4[4byte]
73+
+36 m4 @0x5291df58 de00 udf $0x00000000
74+
+38 m4 @0x5291e0d4 <label>
75+
+38 L3 f843 1f04 str %r1 $0x00000004 %r3 -> +0x04(%r3)[4byte] %r3
76+
77+
With flags save:
78+
79+
+12 m4 @0x550b2408 f8ca 0084 str %r0 -> +0x00000084(%r10)[4byte]
80+
+16 m4 @0x550b2920 f3ef 8000 mrs %cpsr -> %r0
81+
+20 m4 @0x550b2454 f8ca 0080 str %r0 -> +0x00000080(%r10)[4byte]
82+
+24 m4 @0x550b1e98 f8d1 00e4 ldr +0x000000e4(%r1)[4byte] -> %r0
83+
+28 m4 @0x550b24a0 f1b0 3ff1 cmp %r0 $0xf1f1f1f1
84+
+32 m4 @0x550b231c e7fe b.ne @0x550b26fc[4byte]
85+
+34 m4 @0x550b22d0 de00 udf $0x00000000
86+
+36 m4 @0x550b26fc <label>
87+
+36 L3 f8c1 20e4 str.hi %r2 -> +0x000000e4(%r1)[4byte]
88+
+40 m4 @0x550b1bd8 f8da 0080 ldr +0x00000080(%r10)[4byte] -> %r0
89+
+44 m4 @0x550b252c f380 8c00 msr $0x0c %r0 -> %cpsr
90+
+48 m4 @0x550b26a8 f8da 0084 ldr +0x00000084(%r10)[4byte] -> %r0
91+
92+
#### To avoid spilling flags, try sub+cbnz in thumb mode
93+
94+
Our scratch reg must be r0-r7 for cbnz though.
95+
96+
And we'd have to add an IT block for sub (but cbnz cannot be inside it).
97+
98+
So maybe we should only do it when the flags are live? Thus
99+
adding more complexity to the fault identification code.
100+
101+
#### ARM mode: cannot repeat an immmed byte! Use OP_sub x4?
102+
103+
But what about ARM? ARM immediates in GPR instrs are just an 8-bit value
104+
rotated: no repeating. Even the SIMD and VFP immeds aren't much help,
105+
except maybe the cmode=1111 combined with cmode=1100? Subtract one and
106+
then the other?
107+
108+
We could use mvn if most bits are 1's: sthg like 0xfff1ffff, but we still
109+
need to spill a reg, and if we do that we may as well use movw,movt.
110+
111+
#### Do 4 subtracts?
112+
113+
Faster than a spill, though not if we have a (2nd) dead reg.
114+
115+
So we'd do:
116+
117+
sub r0, 0xf1000000
118+
sub r0, 0x00f10000
119+
sub r0, 0x0000f100
120+
sub r0, 0x000000f1
121+
cmp r0, 0 (cbnz is Thumb-only)
122+
jne skip
123+
udf
124+
skip:
125+
126+
We could use 0xf1fdf1fd here -- but maybe simplest to still limit to
127+
single-byte for consistency w/ Thumb?
128+
129+
Vs the movw,movt: 2 extra instrs if reg dead, same # and no mem access if
130+
live. Can we ask drreg whether dead or not?
131+
=>
132+
add drreg_is_register_dead()
133+
134+
However, having 2 different versions complicates the fault handling.
135+
136+
Double-checking the compiler doesn't have some trick:
137+
138+
if (argc == 0xf1fdf1fd)
139+
return 1;
140+
=>
141+
gcc thumb -O3:
142+
8372: f24f 13fd movw r3, #61949 ; 0xf1fd
143+
8376: f2cf 13fd movt r3, #61949 ; 0xf1fd
144+
837a: 4298 cmp r0, r3
145+
gcc arm -O3:
146+
8374: e30f31fd movw r3, #61949 ; 0xf1fd
147+
8378: e34f31fd movt r3, #61949 ; 0xf1fd
148+
837c: e1500003 cmp r0, r3
149+
150+
Real example:
151+
152+
+4 m4 @0x4f8c5be8 e58a1084 str %r1 -> +0x00000084(%r10)[4byte]
153+
+8 m4 @0x4f8c60a8 e10f1000 mrs %cpsr -> %r1
154+
+12 m4 @0x4f8c5c34 e58a1080 str %r1 -> +0x00000080(%r10)[4byte]
155+
+16 m4 @0x4f8c6134 e5901000 ldr (%r0)[4byte] -> %r1
156+
+20 m4 @0x4f8c6180 e24114f1 sub %r1 $0xf1000000 -> %r1
157+
+24 m4 @0x4f8c5ff4 e24118f1 sub %r1 $0x00f10000 -> %r1
158+
+28 m4 @0x4f8c5b10 e2411cf1 sub %r1 $0x0000f100 -> %r1
159+
+32 m4 @0x4f8c5f28 e24110f1 sub %r1 $0x000000f1 -> %r1
160+
+36 m4 @0x4f8c5f68 e3510000 cmp %r1 $0x00000000
161+
+40 m4 @0x4f8c5b50 1afffffe b.ne @0x4f8c60f4[4byte]
162+
+44 m4 @0x4f8c6250 e7f000f0 udf $0x00000000
163+
+48 m4 @0x4f8c60f4 e7f000f0 <label>
164+
+48 L3 e5900000 ldr (%r0)[4byte] -> %r0
165+
+52 m4 @0x4f8c6290 e59a1080 ldr +0x00000080(%r10)[4byte] -> %r1
166+
+56 m4 @0x4f8c62dc e12cf001 msr $0x0c %r1 -> %cpsr
167+
+60 m4 @0x4f8c6334 e59a1084 ldr +0x00000084(%r10)[4byte] -> %r1
168+
169+
#### Switch to thumb mode just for the cmp?
170+
171+
Breaks DR's rules: would mess up decode_fragment.
172+
173+
Instead of inlining, could jump to separate gencode (need 15 forms one for
174+
each scratch reg) -- if already in cache maybe ok that it's not local.
175+
176+
#### Load immed from TLS slot
177+
178+
If TLS in data cache and have L1 hit, may be as fast as movw,movt, and
179+
it's shorter code.
180+
181+
#### Go w/ unified ARM+Thumb same approach for simpler code?
182+
183+
#### Permanently steal another reg?
184+
185+
Very complex w/ interactions w/ r10 though
186+
187+
#### Put the optimizations under an option and under option switch to single-byte pattern val
188+
189+
#### For 2 spills, have drreg use ldm or ldrd?
190+
191+
For 2 spills, is ldm or ldrd faster? Qin's initial tests showed no faster
192+
than separate ldr x2, so even though instr density is better, if it makes drreg
193+
really complex it's prob not worth doing.
194+
195+
196+
****************************************************************************
197+
****************************************************************************
198+
*/

0 commit comments

Comments
 (0)