reg_get_value_ex() unimplemented for ARM/AArch64; SIMD IR in general lacking for AArch64

[YValeri]

I was building a new samples to replace an instruction with a call to a client function, and i came across multiple issues regarding the DynamoRIO API and Arm/AArch64 support :

• When compiling a basic program that just does an addition, the assembly uses the D registers, which are the SIMD/FP registers for Arm/AArch64. Therefore, i wanted to use XINST_CREATE_load/store_simd. However, these macros are using the "ldr/str" instructions, and for some reason, i get an encoding error when using those. I was told by @AssadHashmi that the reason is those macros shouldn't be using ldr/str, but ld1/st1 and variants. So the XINST macros are incorrect.

• When changing the macros for ld1/st1 and variants, and adding the not-XINST macros for these new instructions, nothing changes because the opcodes are not defined. The instructions are defined in codec.txt, but not anywhere else. So the macros/opcodes for simd are not defined.

• I tried to add/modify these for myself, however i came across the problem of how to add new opcodes. There is a tutorial for this in the arm specific folder, file opcodes.h, but it is a bit badly explained (the tutorial tells you to run scripts on particular files, change other files according to the input that isn't different from the original file at all, ...). So in my opinion, the tutorial to add opcodes should be revamped and better explained.

• I wanted at some point to get the value of the SIMD/FP registers. There is a perfect function for this, get_reg_value_ex, but it doesn't work for Arm/AArch64 (there is just a assert false in the function). It would be very helpful to define the Arm/AArch64 part for this function, as it is the essential part of my new client.

The client works just fine for x86, but these problems make it impossible to use on Arm/AArch64.
I don't know if there are any plans to actually take care of these issues, but thanks to people who will try.

[derekbruening]

Re: SIMD opcodes: the 32-bit ARM and 64-bit AArch64 IR/encoder/decoder are completely different. It sounds like they were being conflated here. The ARM encoder/decoder is completely finished, and its XINST_CREATE_load_simd() (the original issue: https://groups.google.com/forum/#!topic/dynamorio-users/F5Lu4iNtiJk) is correct. I believe all of the comments above, other than reg_get_value_ex(), are only about AArch64. #2626 is an umbrella issue covering missing pieces in the AArch64 encoder/decoder.

reg_get_value_ex: that does seem to be missing for both arches.

[derekbruening]

Xref #1551 the umbrella issue for missing ARM pieces, but at this point it is better to file separate issues.

[derekbruening]

Manually adding a link which was omitted from this commit: bb78eb5