Merged main:b0b8e83e668a into amd-gfx:b9f9dea74514

Local branch amd-gfx b9f9dea Merged main:675231eb09ca into amd-gfx:a6e32de5b204
Remote branch main b0b8e83 [mlir] Fix use-after-free bugs in {RankedTensorType|VectorType}::Builder (llvm#68969)

Author: SC llvm team

bolt/test/X86/checkvma-large-section.test

@@ -19,7 +19,7 @@ ProgramHeaders:
     Flags: [ PF_R, PF_W ]
     FirstSec: .large_sec
     LastSec: .large_sec
-    VAddr: 0x4a0279a8
+    VAddr: 0x80000000
   - Type: PT_GNU_RELRO
     Flags: [ PF_R ]
 Sections:
@@ -28,8 +28,8 @@ Sections:
     Content: 00
     AddressAlign: 0x1
   - Name: .large_sec
-    Type: SHT_PROGBITS
+    Type: SHT_NOBITS
     Flags: [ SHF_WRITE, SHF_ALLOC ]
-    Address: 0x4a0279a8
-    Size: 0xdf8bb1a0
+    Address: 0x80000000
+    Size: 0x80000000
 ...

clang/include/clang/Basic/TargetOptions.h

@@ -83,7 +83,7 @@ class TargetOptions {
   enum CodeObjectVersionKind {
     COV_None,
     COV_2 = 200, // Unsupported.
-    COV_3 = 300, // Unsupported.
+    COV_3 = 300,
     COV_4 = 400,
     COV_5 = 500,
   };

clang/include/clang/Driver/Options.td

@@ -4682,9 +4682,9 @@ defm amdgpu_ieee : BoolOption<"m", "amdgpu-ieee",
 def mcode_object_version_EQ : Joined<["-"], "mcode-object-version=">, Group<m_Group>,
   HelpText<"Specify code object ABI version. Defaults to 4. (AMDGPU only)">,
   Visibility<[ClangOption, CC1Option]>,
-  Values<"none,4,5">,
+  Values<"none,3,4,5">,
   NormalizedValuesScope<"TargetOptions">,
-  NormalizedValues<["COV_None", "COV_4", "COV_5"]>,
+  NormalizedValues<["COV_None", "COV_3", "COV_4", "COV_5"]>,
   MarshallingInfoEnum<TargetOpts<"CodeObjectVersion">, "COV_4">;
 
 defm cumode : SimpleMFlag<"cumode",

clang/lib/AST/Interp/IntegralAP.h

@@ -29,7 +29,6 @@ namespace interp {
 using APInt = llvm::APInt;
 using APSInt = llvm::APSInt;
 template <unsigned Bits, bool Signed> class Integral;
-class Boolean;
 
 template <bool Signed> class IntegralAP final {
 private:
@@ -104,10 +103,6 @@ template <bool Signed> class IntegralAP final {
     assert(Copy.isSigned() == Signed);
     return IntegralAP<Signed>(Copy);
   }
-  static IntegralAP from(const Boolean &B) {
-    assert(false);
-    return IntegralAP::zero();
-  }
 
   static IntegralAP zero() {
     assert(false);

clang/lib/Driver/ToolChains/CommonArgs.cpp

@@ -2338,7 +2338,7 @@ getAMDGPUCodeObjectArgument(const Driver &D, const llvm::opt::ArgList &Args) {
 
 void tools::checkAMDGPUCodeObjectVersion(const Driver &D,
                                          const llvm::opt::ArgList &Args) {
-  const unsigned MinCodeObjVer = 4;
+  const unsigned MinCodeObjVer = 3;
   const unsigned MaxCodeObjVer = 5;
 
   if (auto *CodeObjArg = getAMDGPUCodeObjectArgument(D, Args)) {

clang/lib/Sema/SemaTemplateInstantiate.cpp

@@ -2662,7 +2662,9 @@ TypeSourceInfo *Sema::SubstFunctionDeclType(TypeSourceInfo *T,
   } else {
     Result = Instantiator.TransformType(TLB, TL);
   }
-  if (Result.isNull())
+  // When there are errors resolving types, clang may use IntTy as a fallback,
+  // breaking our assumption that function declarations have function types.
+  if (Result.isNull() || !Result->isFunctionType())
     return nullptr;
 
   return TLB.getTypeSourceInfo(Context, Result);

clang/test/AST/Interp/intap.cpp

@@ -42,6 +42,9 @@ namespace i128 {
                                          // ref-note {{outside the range}}
   constexpr int128_t Two = (int128_t)1 << 1ul;
   static_assert(Two == 2, "");
+  static_assert(Two, "");
+  constexpr bool CastedToBool = Two;
+  static_assert(CastedToBool, "");
 
   constexpr uint128_t AllOnes = ~static_cast<uint128_t>(0);
   static_assert(AllOnes == UINT128_MAX, "");

clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c

@@ -1,46 +1,73 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3
 // REQUIRES: aarch64-registered-target
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s
 
 #include <arm_sme_draft_spec_subject_to_change.h>
 
-// CHECK-C-LABEL: @test_svcntsb(
-// CHECK-CXX-LABEL: @_Z12test_svcntsbv(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
-// CHECK-NEXT:    ret i64 [[TMP0]]
+// CHECK-C-LABEL: define dso_local i64 @test_svcntsb(
+// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+// CHECK-C-NEXT:  entry:
+// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
+// CHECK-C-NEXT:    ret i64 [[TMP0]]
+//
+// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntsbv(
+// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+// CHECK-CXX-NEXT:  entry:
+// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
+// CHECK-CXX-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t test_svcntsb() {
   return svcntsb();
 }
 
-// CHECK-C-LABEL: @test_svcntsh(
-// CHECK-CXX-LABEL: @_Z12test_svcntshv(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsh()
-// CHECK-NEXT:    ret i64 [[TMP0]]
+// CHECK-C-LABEL: define dso_local i64 @test_svcntsh(
+// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] {
+// CHECK-C-NEXT:  entry:
+// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsh()
+// CHECK-C-NEXT:    ret i64 [[TMP0]]
+//
+// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntshv(
+// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] {
+// CHECK-CXX-NEXT:  entry:
+// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsh()
+// CHECK-CXX-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t test_svcntsh() {
   return svcntsh();
 }
 
-// CHECK-C-LABEL: @test_svcntsw(
-// CHECK-CXX-LABEL: @_Z12test_svcntswv(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsw()
-// CHECK-NEXT:    ret i64 [[TMP0]]
+// CHECK-C-LABEL: define dso_local i64 @test_svcntsw(
+// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] {
+// CHECK-C-NEXT:  entry:
+// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsw()
+// CHECK-C-NEXT:    ret i64 [[TMP0]]
+//
+// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntswv(
+// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] {
+// CHECK-CXX-NEXT:  entry:
+// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsw()
+// CHECK-CXX-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t test_svcntsw() {
   return svcntsw();
 }
 
-// CHECK-C-LABEL: @test_svcntsd(
-// CHECK-CXX-LABEL: @_Z12test_svcntsdv(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsd()
-// CHECK-NEXT:    ret i64 [[TMP0]]
+// CHECK-C-LABEL: define dso_local i64 @test_svcntsd(
+// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] {
+// CHECK-C-NEXT:  entry:
+// CHECK-C-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsd()
+// CHECK-C-NEXT:    ret i64 [[TMP0]]
+//
+// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntsdv(
+// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] {
+// CHECK-CXX-NEXT:  entry:
+// CHECK-CXX-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsd()
+// CHECK-CXX-NEXT:    ret i64 [[TMP0]]
 //
 uint64_t test_svcntsd() {
   return svcntsd();
 }
+//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+// CHECK: {{.*}}