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Components Research

These components may or may mot be useful. These are notes I took when surveying what's out there.

Data sheets, books and papers

Texas Instruments classic data books as PDF

Only incompatibility is LS driving HC inputs - see "Logic Levels and chip types doc": "The input high logic level of HC is the only source of incompatibility. 54HC/74HC can drive TTL easily and its input low level is TTL compatible. Again referring to Table 1, the logic output of the TTL type device will be recognized to be a valid logic low (0) level, so there is no incompatibility here. Table 2 shows that the specified output drive of HC is capable of driving many LS-TTL inputs, so there is no incompatibility here either (although one should be aware of possible fanout restrictions similar to that encountered when designing with TTL)."

Phillips - Logic User Guide 1997 VHC = HC but faster

Generating Clocks, Delays and Pulses

http://course.ece.cmu.edu/~ee100/docs/Chapter8.pdf

But see also my page on timing considerations - "Clocks" and "Don't mess with the clock".

Also https://youtu.be/lO_9Zz5jzAA?t=3841

Registers

  • Latches: Outputs follow inputs while latch enable is not enabled.
  • Registers : Output assume input value when clocked

Quest: Where is the 8 bit register with +ve edge, /WE and tristate!! The 4 bit 74LS173, has clock, OE, WE = but only 4 bits (16 pin package)

Chip Org Trig Input Enable Tristate Pinout Other Desc
74HC574 8 +ve /OE bus 8 bit reg - edge triggered - tristate
74HC273 8 +ve bus /RESET 8 bit reg - convenient pin out at sides
74HC377 8 +ve /E pairs 8 bit reg - convenient pin out at sides - includes write enable

Other 8 Bit Curiosities

Chip Org Trig Input Enable Tristate Pinout Other Desc
74HC646 8 bi-dir +ve no - see note /OE wrap direction same internals as 74HC652 but fewer input options as uses a "direction" pattern on pins - interestng chip but this other datasheet carries an important caveat.. "The user should note that because the clocks are not gated with the Direction and Output Enable pins, data at the A and B ports may be clocked into the storage flip–flops at any time" - so no Write enable facility.
74HC652 8 +ve multifunction bi-dir yes bus latching/reflecting same internals as 74HC647 but more flexible input options - but high feature but no way to disable clocking in of data

4BIT

  • 74HC173 - These 4 bit registers have it all; +ve edge, write enable and output tristate.

OTHERS

  • 74ALVCH16821 20Bit (2x10) TSOP like a wide low voltage 74574 (can leave unused disconnected) - Has Clk ad OE but not LE.

  • 74FCT162823 - 18bit register - Clk, ClkEn, OE, Reset (SSOP-56, TSSOP-56)

  • 74FCT162374 - 16bit register - Clk, OE - no LE (SSOP-48, TSSOP-48)

Latches

  • 74HC573 - Octal D-type transparent latch; 3-state; LE - bus pinout

  • 74HC373 - Octal D-type transparent latch; 3-state; LE - paired pinout

  • 74HC259 - 8x1bit addressable latch; LE; RESET

Also ...

  • 74FCT2573 - fast version (10ns slowest transition) of 74HCT573 (30ns slowest transition)

Read back latch ...

  • SN74ALS992 9 bit ++ features. LE=H makes it transparent, LE=L latches

Others

74FCT16373 (IDT74FCT16373AT) - 16 bit latch - TSOP

Register Files

Chip Org Trig Input Enable Tristate Pinout Other Desc
74HC670 & HCT 4x4 transparent /W or /R /GR wrap 4x4 register file with simulataneous read/write - but not synchronous so probably need to add edge detect to it. Not common but Mouser has 74HCT670 in DIP package
MC14580 4bit-in, 2x4-out +ve WE yes each side wrap 4x4 three port register file - perfect shape for a register file behind an ALU, but haven't looked closely at the clocking. However data sheet indicates that it is very slow 1.2us for some ops. Useful for low complexity circuit that's not trying to be fast.
74ALC870 dual 16x4 universal level function when writing sides register file - multifunction - high capability - impossible to find
MC10H145 16x4 level /WE wrap /CS driver output low small fast RAM - on EBay
9338 1bit-in, 2x1bit out +ve wrap Tripe port, two stage, slave enable to delay propagation 8 bit multple port register available at Utsource - 5v
74F410 16x4 latched +ve /WE /OE bus /CS chip select Looks like everything for a 4bit reg! 5v VCC, output hi 2.4v/2.7v, so less than 74HC 3.2v but ok for 74HCT 2.0v (at UTsource
74LS170 4x4 transparent level /WE /R wrap open collector so can level shift output like 74670 but open collector
Other interesing chips include : 74172
DM85S68N 16x4 clocked in, async out +ve /WE OD (output sidable) /OS (output store) ??? DM85S/DM75S - 5v - interesting shape but only one but annoying timings as address must have address in place before OS signal

Presettable Counter Regsters

NB 74160/74162 seem hard to find

  • 74HCT161 4-bit presettable synchronous binary counter; with Asynchronous reset (Error in data sheet - these are not decade counters)

  • 74HCT163 4-bit presettable synchronous binary counter; with Synchronous reset (Error in data sheet - these are not decade counters)

  • 74HC160/74HC161/74HC162/74HC163 - 74LS160/74LS160 are BCD and 74LS161 and 74LS163 are binary

  • 74LS160A/74LS161A/74LS162A/74LS163A - 74LS160/74LS162 are BCD and 74LS161/74LS163 are binary & the 'A' variant has fewer electrical restrictions

Binary Counter combined Register - Shared In/Out - curiosity

Other counters

  • 74LS193 - 4 bit +ve edge - up/down binary counter + register with load and clear, carry + borrow - but no OE

  • 74LS163 - 4 bit +ve edge - up only binary counter + register with load and clear, carry - but no OE

  • 74LS169 - 4bit - up/down reset - no load - bus pinout

  • 74LS697 Async clear - 4 bit updown + register - +ve - tristate - loadable counter

  • 74HC699 Sync clear - 4 bit up-down U+/D - register /LD - tristate /G - loadable counter - separate +ve register clock RCK and counter clock CCK

  • 74F269 - 8 bit up/down - +ve edge - enable - loadable - SO24 package

  • 74AS869 - 8 bit updown - preset / direction - carry - not tristate

Shift registers

Buffers

  • 74HCT245 Octal transceiver - 3 state & direction, bus pinout.

  • 74HCT244 Octal Buffer - 3 state - paired pinout - 20 pin

  • 74LVC16240 - 16 bit 5v tolerant low voltage buffer - might be useful at some point? 3.6v VCC (6.5v absolute max), input voltage up to 5.5v, output voltage Vcc, but withstand 5.5v when Z. TSOP48

ALU

VGA

RAM / ROM

  • IDT6116 DIP 24 and fast and cheap £3.50 at mouser

  • DIP48 4k8x dual port ram with no arbitration and seems to support port to port without complication ? IDT7134LA20PDG - perhaps the ones that have BUSY are the same if I ignore the BUSY. On EBAY and alos Mouser £14

  • 1kx8 DUAL PORT SRAM 7130LA35PDG £7.98 Farnell

  • DIP U635H256CSC25 32kx8 NVRAM cheap - use for program memory as a lot faster than EEPROM and SRAM is autoloaded from internal NV memory on power on. Seen on ebay for $7.99

  • DIP 32x8 NVSRAM M48Z35-70PC1

  • SOIC STK14C and STK15C NVRAM 32x8 seen at Farnell, the STK14C88 & STK16C88 are apparently better if the power down is very fast

  • STK12C68 64kx8 NVRAM

  • 64kx16 MRAM - £11.38 - https://www.mouser.co.uk/datasheet/2/144/MR0A16A_Datasheet-1511324.pdf - non volatile 35ns - less hassle than EEPROM and faster but needs an adapter to DIP - use in place of 32k RAM / 32k ROM - and more expensive too though. Because of separate 2x8 bit tristate output enable it can work as 64kx16 or 128kx8. ??? Data sheet says 4v

Adapters

44 pin TSOP II to 44 pin DIP - https://www.digikey.com/product-detail/en/chip-quik-inc/PA0217/PA0217-ND/5014801

Pay more ad get free soldering - https://www.epboard.com/eproducts/protoadapter1.htm#TSOPI_TSOPIItoPGAAdapter

Breadboard

Ben Eater discusses this board and also fakes. There is also a great YT video by someone else that compares the various bread board brands.

Mine come from Mouser, a distributor for Bus Board. But mine look different to those Ben used. Mine have "BusBoard.com" in a small font at one end, as shown on the manufacturer's website. Ben's do not have the URL but Ben's do seem to match the image shown on Mouser and also on the BB830 data sheet on Mouser.

Presumably the design of the board has changed slightly since 2016; lets hope the change is cosmetic and doesn't impact the quality of the boards. This diversity in appearance might make it more difficult to identify genuine parts.

Verilog

https://github.com/lisper/cpus-cadr/tree/master/hw