Skip to content

Latest commit

 

History

History
64 lines (53 loc) · 1.65 KB

README.md

File metadata and controls

64 lines (53 loc) · 1.65 KB

SAP 1 Emulator

From Digital Computer Electonics By Albert Malvino

Description

SAP 1 (Simple As Possible) is a very basic model of microprocessor. It has only 5 basic instructions.

  • 3 with 1 operand
  • 2 with implicit operands

Instruction Set

Mnemonics Operation Op Code Description
LDA ACC 🠔 RAM[MAR] 0b0000 Load RAM data into accumulator
ADD ACC 🠔 ACC + B 0b0001 Add RAM data to accumulator
SUB ACC 🠔 ACC – B 0b0010 Subtract RAM data from accumulator
OUT OUT 🠔 ACC 0b1100 Load accumulator data into output register
HLT CLK 🠔 0 0b1111 Stop processing

Features

  • Simple As Possible
  • 16 Bytes Read Only Memory
  • 8 Bit Bus
Register
  1. Accumulator
  2. B Register
  3. Out Register
  4. Instruction Register (IR)
  5. Memory Address Register (MAR)

Architecture

SAP Block Diagram

Usage

For now the RAM is hardcoded in SAP1.cpp in form of vectors. Those instructions can be changed and then the solution can be built in Visual Studio to get executable binary.

 vector<byte> inst;
    inst.push_back(0x09);
    inst.push_back(0x1A);
    inst.push_back(0xEF);
    inst.push_back(0XFF);
    inst.push_back(0xFF);
    inst.push_back(0XFF);
    inst.push_back(0xFF);
    inst.push_back(0XFF);
    inst.push_back(0xFF);
    inst.push_back(0X04);
    inst.push_back(0x05);
    inst.push_back(0XFF);
    inst.push_back(0xFF);
    inst.push_back(0XFF);
    inst.push_back(0XFF);
    inst.push_back(0xFF);

To Do

  • Adding More Comments ¯\( ͡° ͜ʖ ͡°)
  • Loading RAM from external file in Inetl hex format.
  • Add T- states