Merge pull request sonic-net#55 from viclin-ec/202311.0

[Platform] Add support for as4625-54p/54t platform

Author: bryan1978

device/accton/x86_64-accton_as4625_54p-r0/Accton-AS4625-54P/hr4-as4625-48x1G+6x10G.config.bcm

@@ -0,0 +1,386 @@
+stable_size=0x4f00000
+
+#polarity/lanemap is using TH2 style.
+#core_clock_frequency=496
+core_clock_frequency=266
+#core_clock_frequency=893
+#dpp_clock_ratio=2:3
+
+core_clock_to_pm_clock_factor=2
+
+oversubscribe_mode=2
+#port_gmii_mode_1=1 #Q mode
+
+ptp_ts_pll_fref=50000000
+ptp_bs_fref_0=50000000
+ptp_bs_fref_1=50000000
+
+pbmp_xport_xe=0x1FFE00FFFFFFFFFFFF
+
+parity_enable=0
+mem_cache_enable=1
+
+l2_mem_entries=32768
+l3_mem_entries=49152
+fpem_mem_entries=16384
+l2xmsg_mode=1
+port_flex_enable=1
+
+
+l3_alpm_enable=2
+ipv6_lpm_128b_enable=1
+ifp_inports_support_enable=1
+
+num_ipv6_lpm_128b_entries=512
+
+
+dport_map_port_25=1
+dport_map_port_26=2
+dport_map_port_27=3
+dport_map_port_28=4
+dport_map_port_29=5
+dport_map_port_30=6
+dport_map_port_31=7
+dport_map_port_32=8
+portmap_25=25:1
+portmap_26=26:1
+portmap_27=27:1
+portmap_28=28:1
+portmap_29=29:1
+portmap_30=30:1
+portmap_31=31:1
+portmap_32=32:1
+port_phy_addr_25=0x00
+port_phy_addr_26=0x01
+port_phy_addr_27=0x02
+port_phy_addr_28=0x03
+port_phy_addr_29=0x04
+port_phy_addr_30=0x05
+port_phy_addr_31=0x06
+port_phy_addr_32=0x07
+phy_port_primary_and_offset_25=0x1900
+phy_port_primary_and_offset_26=0x1901
+phy_port_primary_and_offset_27=0x1902
+phy_port_primary_and_offset_28=0x1903
+phy_port_primary_and_offset_29=0x1904
+phy_port_primary_and_offset_30=0x1905
+phy_port_primary_and_offset_31=0x1906
+phy_port_primary_and_offset_32=0x1907
+phy_chain_rx_lane_map_physical{25.0}=0x3210
+phy_chain_rx_lane_map_physical{26.0}=0x3210
+phy_chain_rx_lane_map_physical{27.0}=0x3210
+phy_chain_rx_lane_map_physical{28.0}=0x3210
+phy_chain_rx_lane_map_physical{29.0}=0x3210
+phy_chain_rx_lane_map_physical{30.0}=0x3210
+phy_chain_rx_lane_map_physical{31.0}=0x3210
+phy_chain_rx_lane_map_physical{32.0}=0x3210
+phy_chain_tx_lane_map_physical{25.0}=0x3210
+phy_chain_tx_lane_map_physical{26.0}=0x3210
+phy_chain_tx_lane_map_physical{27.0}=0x3210
+phy_chain_tx_lane_map_physical{28.0}=0x3210
+phy_chain_tx_lane_map_physical{29.0}=0x3210
+phy_chain_tx_lane_map_physical{30.0}=0x3210
+phy_chain_tx_lane_map_physical{31.0}=0x3210
+phy_chain_tx_lane_map_physical{32.0}=0x3210
+phy_chain_rx_polarity_flip_physical{25.0}=0x0
+phy_chain_rx_polarity_flip_physical{26.0}=0x0
+phy_chain_rx_polarity_flip_physical{27.0}=0x0
+phy_chain_rx_polarity_flip_physical{28.0}=0x0
+phy_chain_rx_polarity_flip_physical{29.0}=0x0
+phy_chain_rx_polarity_flip_physical{30.0}=0x0
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x0
+phy_chain_tx_polarity_flip_physical{25.0}=0x0
+phy_chain_tx_polarity_flip_physical{26.0}=0x0
+phy_chain_tx_polarity_flip_physical{27.0}=0x0
+phy_chain_tx_polarity_flip_physical{28.0}=0x0
+phy_chain_tx_polarity_flip_physical{29.0}=0x0
+phy_chain_tx_polarity_flip_physical{30.0}=0x0
+phy_chain_tx_polarity_flip_physical{31.0}=0x0
+phy_chain_tx_polarity_flip_physical{32.0}=0x0
+
+
+dport_map_port_33=9
+dport_map_port_34=10
+dport_map_port_35=11
+dport_map_port_36=12
+dport_map_port_37=13
+dport_map_port_38=14
+dport_map_port_39=15
+dport_map_port_40=16
+portmap_33=33:1
+portmap_34=34:1
+portmap_35=35:1
+portmap_36=36:1
+portmap_37=37:1
+portmap_38=38:1
+portmap_39=39:1
+portmap_40=40:1
+port_phy_addr_33=0x20
+port_phy_addr_34=0x21
+port_phy_addr_35=0x22
+port_phy_addr_36=0x23
+port_phy_addr_37=0x24
+port_phy_addr_38=0x25
+port_phy_addr_39=0x26
+port_phy_addr_40=0x27
+phy_port_primary_and_offset_33=0x2100
+phy_port_primary_and_offset_34=0x2101
+phy_port_primary_and_offset_35=0x2102
+phy_port_primary_and_offset_36=0x2103
+phy_port_primary_and_offset_37=0x2104
+phy_port_primary_and_offset_38=0x2105
+phy_port_primary_and_offset_39=0x2106
+phy_port_primary_and_offset_40=0x2107
+phy_chain_rx_lane_map_physical{33.0}=0x3210
+phy_chain_rx_lane_map_physical{34.0}=0x3210
+phy_chain_rx_lane_map_physical{35.0}=0x3210
+phy_chain_rx_lane_map_physical{36.0}=0x3210
+phy_chain_rx_lane_map_physical{37.0}=0x3210
+phy_chain_rx_lane_map_physical{38.0}=0x3210
+phy_chain_rx_lane_map_physical{39.0}=0x3210
+phy_chain_rx_lane_map_physical{40.0}=0x3210
+phy_chain_tx_lane_map_physical{33.0}=0x3210
+phy_chain_tx_lane_map_physical{34.0}=0x3210
+phy_chain_tx_lane_map_physical{35.0}=0x3210
+phy_chain_tx_lane_map_physical{36.0}=0x3210
+phy_chain_tx_lane_map_physical{37.0}=0x3210
+phy_chain_tx_lane_map_physical{38.0}=0x3210
+phy_chain_tx_lane_map_physical{39.0}=0x3210
+phy_chain_tx_lane_map_physical{40.0}=0x3210
+phy_chain_rx_polarity_flip_physical{33.0}=0x0
+phy_chain_rx_polarity_flip_physical{34.0}=0x0
+phy_chain_rx_polarity_flip_physical{35.0}=0x0
+phy_chain_rx_polarity_flip_physical{36.0}=0x0
+phy_chain_rx_polarity_flip_physical{37.0}=0x0
+phy_chain_rx_polarity_flip_physical{38.0}=0x0
+phy_chain_rx_polarity_flip_physical{39.0}=0x0
+phy_chain_rx_polarity_flip_physical{40.0}=0x0
+phy_chain_tx_polarity_flip_physical{33.0}=0x0
+phy_chain_tx_polarity_flip_physical{34.0}=0x0
+phy_chain_tx_polarity_flip_physical{35.0}=0x0
+phy_chain_tx_polarity_flip_physical{36.0}=0x0
+phy_chain_tx_polarity_flip_physical{37.0}=0x0
+phy_chain_tx_polarity_flip_physical{38.0}=0x0
+phy_chain_tx_polarity_flip_physical{39.0}=0x0
+phy_chain_tx_polarity_flip_physical{40.0}=0x0
+
+
+
+#MQ16_1
+#port_gmii_mode_17=1 #Q mode
+dport_map_port_41=17
+dport_map_port_42=18
+dport_map_port_43=19
+dport_map_port_44=20
+dport_map_port_45=21
+dport_map_port_46=22
+dport_map_port_47=23
+dport_map_port_48=24
+portmap_41=41:1
+portmap_42=42:1
+portmap_43=43:1
+portmap_44=44:1
+portmap_45=49:1
+portmap_46=50:1
+portmap_47=51:1
+portmap_48=52:1
+port_phy_addr_41=0x40
+port_phy_addr_42=0x41
+port_phy_addr_43=0x42
+port_phy_addr_44=0x43
+port_phy_addr_45=0x44
+port_phy_addr_46=0x45
+port_phy_addr_47=0x46
+port_phy_addr_48=0x47
+phy_port_primary_and_offset_41=0x2900
+phy_port_primary_and_offset_42=0x2901
+phy_port_primary_and_offset_43=0x2902
+phy_port_primary_and_offset_44=0x2903
+phy_port_primary_and_offset_45=0x2904
+phy_port_primary_and_offset_46=0x2905
+phy_port_primary_and_offset_47=0x2906
+phy_port_primary_and_offset_48=0x2907
+phy_chain_rx_lane_map_physical{41.0}=0x3210
+phy_chain_rx_lane_map_physical{42.0}=0x3210
+phy_chain_rx_lane_map_physical{43.0}=0x3210
+phy_chain_rx_lane_map_physical{44.0}=0x3210
+phy_chain_rx_lane_map_physical{45.0}=0x3210
+phy_chain_rx_lane_map_physical{46.0}=0x3210
+phy_chain_rx_lane_map_physical{47.0}=0x3210
+phy_chain_rx_lane_map_physical{48.0}=0x3210
+phy_chain_tx_lane_map_physical{41.0}=0x3210
+phy_chain_tx_lane_map_physical{42.0}=0x3210
+phy_chain_tx_lane_map_physical{43.0}=0x3210
+phy_chain_tx_lane_map_physical{44.0}=0x3210
+phy_chain_tx_lane_map_physical{45.0}=0x3210
+phy_chain_tx_lane_map_physical{46.0}=0x3210
+phy_chain_tx_lane_map_physical{47.0}=0x3210
+phy_chain_tx_lane_map_physical{48.0}=0x3210
+phy_chain_rx_polarity_flip_physical{41.0}=0x0
+phy_chain_rx_polarity_flip_physical{42.0}=0x0
+phy_chain_rx_polarity_flip_physical{43.0}=0x0
+phy_chain_rx_polarity_flip_physical{44.0}=0x0
+phy_chain_rx_polarity_flip_physical{45.0}=0x0
+phy_chain_rx_polarity_flip_physical{46.0}=0x0
+phy_chain_rx_polarity_flip_physical{47.0}=0x0
+phy_chain_rx_polarity_flip_physical{48.0}=0x0
+phy_chain_tx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x0
+phy_chain_tx_polarity_flip_physical{43.0}=0x0
+phy_chain_tx_polarity_flip_physical{44.0}=0x0
+phy_chain_tx_polarity_flip_physical{45.0}=0x0
+phy_chain_tx_polarity_flip_physical{46.0}=0x0
+phy_chain_tx_polarity_flip_physical{47.0}=0x0
+phy_chain_tx_polarity_flip_physical{48.0}=0x0
+
+
+#GPHY0
+dport_map_port_1=25
+dport_map_port_2=26
+dport_map_port_3=27
+dport_map_port_4=28
+portmap_1=1:1
+portmap_2=2:1
+portmap_3=3:1
+portmap_4=4:1
+phy_port_primary_and_offset_1=0x0100
+phy_port_primary_and_offset_2=0x0101
+phy_port_primary_and_offset_3=0x0102
+phy_port_primary_and_offset_4=0x0103
+
+
+#GPHY1
+dport_map_port_5=29
+dport_map_port_6=30
+dport_map_port_7=31
+dport_map_port_8=32
+portmap_5=5:1
+portmap_6=6:1
+portmap_7=7:1
+portmap_8=8:1
+phy_port_primary_and_offset_5=0x0500
+phy_port_primary_and_offset_6=0x0501
+phy_port_primary_and_offset_7=0x0502
+phy_port_primary_and_offset_8=0x0503
+
+
+#GPHY2
+dport_map_port_9=33
+dport_map_port_10=34
+dport_map_port_11=35
+dport_map_port_12=36
+portmap_9=9:1
+portmap_10=10:1
+portmap_11=11:1
+portmap_12=12:1
+phy_port_primary_and_offset_9=0x0900
+phy_port_primary_and_offset_10=0x0901
+phy_port_primary_and_offset_11=0x0902
+phy_port_primary_and_offset_12=0x0903
+
+
+#GPHY3
+dport_map_port_13=37
+dport_map_port_14=38
+dport_map_port_15=39
+dport_map_port_16=40
+portmap_13=13:1
+portmap_14=14:1
+portmap_15=15:1
+portmap_16=16:1
+phy_port_primary_and_offset_13=0x0d00
+phy_port_primary_and_offset_14=0x0d01
+phy_port_primary_and_offset_15=0x0d02
+phy_port_primary_and_offset_16=0x0d03
+
+
+#GPHY4
+dport_map_port_17=41
+dport_map_port_18=42
+dport_map_port_19=43
+dport_map_port_20=44
+portmap_17=17:1
+portmap_18=18:1
+portmap_19=19:1
+portmap_20=20:1
+phy_port_primary_and_offset_17=0x1100
+phy_port_primary_and_offset_18=0x1101
+phy_port_primary_and_offset_19=0x1102
+phy_port_primary_and_offset_20=0x1103
+
+
+#GPHY5
+dport_map_port_21=45
+dport_map_port_22=46
+dport_map_port_23=47
+dport_map_port_24=48
+portmap_21=21:1
+portmap_22=22:1
+portmap_23=23:1
+portmap_24=24:1
+phy_port_primary_and_offset_21=0x1500
+phy_port_primary_and_offset_22=0x1501
+phy_port_primary_and_offset_23=0x1502
+phy_port_primary_and_offset_24=0x1503
+
+
+#PHYx TSC-F16-0, TSC2
+dport_map_port_57=49
+dport_map_port_58=50
+dport_map_port_59=51
+dport_map_port_60=52
+portmap_57=57:10
+portmap_58=58:10
+portmap_59=59:10
+portmap_60=60:10
+phy_chain_tx_lane_map_physical{57.0}=0x3210
+phy_chain_tx_lane_map_physical{58.0}=0x3210
+phy_chain_tx_lane_map_physical{59.0}=0x3210
+phy_chain_tx_lane_map_physical{60.0}=0x3210
+phy_chain_rx_lane_map_physical{57.0}=0x3210
+phy_chain_rx_lane_map_physical{58.0}=0x3210
+phy_chain_rx_lane_map_physical{59.0}=0x3210
+phy_chain_rx_lane_map_physical{60.0}=0x3210
+phy_chain_tx_polarity_flip_physical{57.0}=0x0
+phy_chain_tx_polarity_flip_physical{58.0}=0x0
+phy_chain_tx_polarity_flip_physical{59.0}=0x0
+phy_chain_tx_polarity_flip_physical{60.0}=0x0
+phy_chain_rx_polarity_flip_physical{57.0}=0x0
+phy_chain_rx_polarity_flip_physical{58.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x0
+phy_chain_rx_polarity_flip_physical{60.0}=0x0
+ 
+
+#PHYx TSC-M16-0, TSC3
+dport_map_port_61=53
+dport_map_port_62=54
+#dport_map_port_63=55
+#dport_map_port_64=56
+portmap_61=61:10
+portmap_62=62:10
+#portmap_63=63:10
+#portmap_64=64:10
+phy_chain_tx_lane_map_physical{61.0}=0x3210
+phy_chain_tx_lane_map_physical{62.0}=0x3210
+phy_chain_tx_lane_map_physical{63.0}=0x3210
+phy_chain_tx_lane_map_physical{64.0}=0x3210
+phy_chain_rx_lane_map_physical{61.0}=0x3210
+phy_chain_rx_lane_map_physical{62.0}=0x3210
+#phy_chain_rx_lane_map_physical{63.0}=0x3210
+#phy_chain_rx_lane_map_physical{64.0}=0x3210
+phy_chain_tx_polarity_flip_physical{61.0}=0x0
+phy_chain_tx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x0
+phy_chain_tx_polarity_flip_physical{64.0}=0x0
+phy_chain_rx_polarity_flip_physical{61.0}=0x0
+phy_chain_rx_polarity_flip_physical{62.0}=0x0
+#phy_chain_rx_polarity_flip_physical{63.0}=0x0
+#phy_chain_rx_polarity_flip_physical{64.0}=0x0
+
+
+
+# MerlinCore-Q SerDes
+#port_gmii_mode=1 means that the device is running in QSGMII
+port_gmii_mode{25}=1
+port_gmii_mode{41}=1