barrier is needed after writing a PTE and before using the mapping

[stuyoder]

I found this issue when testing the dynamic shared memory patches. A mapping was created for incoming message arguments (i.e. PTE was written), followed fairly quickly by a read of the memory. It appears the read got executed before the PTE write, resulting in a data abort.

Inserting a dsb() in core_mmu_set_entry_primitive() in core/arch/arm/mm/core_mmu_lpae.c after the PTE update:

tbl[idx] = desc | pa;

...resolves the issue.

[stuyoder]

see #1796 for discussion on this

[etienne-lms]

Nice catch. A DSB seems missing here.

However, as discussed in #1796, the best place for the memory barrier are at hight level. Here, it appears that a DSB is missing in the function that mapps the registered shm. In this case, I think the dsb should be added in mobj_mapped_shm_alloc(), after it calls core_mmu_map_pages(), at mobj.c#L571.

There is another place where registered dyn-shm are map: when a TA is invoked (and memref parameters mapped). But this code is safe against PTE sync.

[stuyoder]

Jen's suggestion in the pull request was to put the fix in core_mmu_map_pages(). I'm going to let you guy's who know the kernel internals to sort out where the fix is needed.

[jforissier]

Closing, as this has been addressed in #1827.