No load/store-on-condition 2 facility

[OttoHollmann]

Hi there,
we have a problem with our application on s390 architecture that uses pcre2 with JIT enabled. We traced the issue and ended up here:

pcre2/src/sljit/sljitNativeS390X.c

Line 3725 in e466d41

/* TODO(mundaym): no load/store-on-condition 2 facility (ipm? branch-and-set?) */

As this TODO mentions, this part is not implemented yet and abort() is called instead of it.
Unfortunately, disabling JIT is not an option for us.

I would like to ask you, if there are any plans for implementing this feature.

Thanks in advance

[zherczeg]

This facility is introduced in 2015. To tell you the truth I haven't spent much effort on compatibility with older s390x cpus because of my limited time. In newer code, even the facility testing is missing.

[Veezywqp1]

Thanks

[aarnez]

This (crude) patch might fix this particular problem:

diff --git a/src/sljit/sljitNativeS390X.c b/src/sljit/sljitNativeS390X.c
index 3d70967..99e8463 100644
--- a/src/sljit/sljitNativeS390X.c
+++ b/src/sljit/sljitNativeS390X.c
@@ -3722,8 +3722,9 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_op_flags(struct sljit_compiler *co
 		FAIL_IF(push_inst(compiler,
 			WHEN2(op & SLJIT_32, lochi, locghi)));
 	} else {
-		/* TODO(mundaym): no load/store-on-condition 2 facility (ipm? branch-and-set?) */
-		abort();
+		FAIL_IF(push_load_imm_inst(compiler, loc_r, 1));
+		FAIL_IF(push_inst(compiler, brc(mask, 2 + 2)));
+		FAIL_IF(push_load_imm_inst(compiler, loc_r, 0));
 	}
 	#undef LEVAL

Perhaps you can give it a try? I'm not sure if that's the only issue with that older CPU though.

[zherczeg]

Thank you, it works. I landed it in zherczeg/sljit@cb9b068
It could be improved if lscond1 facility is present with loc instruction. You are right, there could be other issues with that cpu. You can run the jit compiler alone, but I think most features, which fails, is not used by pcre2, so it is not worth fixing them.