Update WebAssembly SIMD opcodes (#56)

* [WebAssembly] Enable recently implemented SIMD operations

Summary:
Moves a batch of instructions from unimplemented-simd128 to simd128
because they have recently become available in V8.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D73926

* [WebAssembly] Simplify extract_vector lowering

Summary:
Removes patterns that were not doing useful work, changes the
default extract instructions to be the unsigned versions now that
they are enabled by default, fixes PR44988, and adds tests for
sext_inreg lowering.

Reviewers: aheejin

Reviewed By: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75005

* [WebAssembly] Renumber SIMD opcodes

Summary:
As described in WebAssembly/simd#209. This is
the final reorganization of the SIMD opcode space before
standardization. It has been landed in concert with corresponding
changes in other projects in the WebAssembly SIMD ecosystem.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79224

Author: tlively

clang/lib/CodeGen/CGBuiltin.cpp

@@ -14881,8 +14881,7 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
   case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32_f64:
   case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i64_f32:
   case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i64_f64:
-  case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32x4_f32x4:
-  case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i64x2_f64x2: {
+  case WebAssembly::BI__builtin_wasm_trunc_saturate_s_i32x4_f32x4: {
     Value *Src = EmitScalarExpr(E->getArg(0));
     llvm::Type *ResT = ConvertType(E->getType());
     Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_trunc_saturate_signed,
@@ -14893,8 +14892,7 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
   case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i32_f64:
   case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i64_f32:
   case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i64_f64:
-  case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i32x4_f32x4:
-  case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i64x2_f64x2: {
+  case WebAssembly::BI__builtin_wasm_trunc_saturate_u_i32x4_f32x4: {
     Value *Src = EmitScalarExpr(E->getArg(0));
     llvm::Type *ResT = ConvertType(E->getType());
     Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_trunc_saturate_unsigned,

clang/test/CodeGen/builtins-wasm.c

@@ -603,18 +603,6 @@ i32x4 trunc_saturate_u_i32x4_f32x4(f32x4 f) {
   // WEBASSEMBLY-NEXT: ret
 }
 
-i64x2 trunc_saturate_s_i64x2_f64x2(f64x2 f) {
-  return __builtin_wasm_trunc_saturate_s_i64x2_f64x2(f);
-  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.trunc.saturate.signed.v2i64.v2f64(<2 x double> %f)
-  // WEBASSEMBLY-NEXT: ret
-}
-
-i64x2 trunc_saturate_u_i64x2_f64x2(f64x2 f) {
-  return __builtin_wasm_trunc_saturate_u_i64x2_f64x2(f);
-  // WEBASSEMBLY: call <2 x i64> @llvm.wasm.trunc.saturate.unsigned.v2i64.v2f64(<2 x double> %f)
-  // WEBASSEMBLY-NEXT: ret
-}
-
 i8x16 narrow_s_i8x16_i16x8(i16x8 low, i16x8 high) {
   return __builtin_wasm_narrow_s_i8x16_i16x8(low, high);
   // WEBASSEMBLY: call <16 x i8> @llvm.wasm.narrow.signed.v16i8.v8i16(

llvm/test/CodeGen/WebAssembly/simd-conversions.ll

@@ -31,8 +31,6 @@ define <4 x float> @convert_u_v4f32(<4 x i32> %x) {
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-VM-NOT: f64x2.convert_i64x2_s
 ; SIMD128-NEXT: .functype convert_s_v2f64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: f64x2.convert_i64x2_s $push[[R:[0-9]+]]=, $0
-; SIMD128-NEXT: return $pop[[R]]
 define <2 x double> @convert_s_v2f64(<2 x i64> %x) {
   %a = sitofp <2 x i64> %x to <2 x double>
   ret <2 x double> %a
@@ -42,8 +40,6 @@ define <2 x double> @convert_s_v2f64(<2 x i64> %x) {
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-VM-NOT: f64x2.convert_i64x2_u
 ; SIMD128-NEXT: .functype convert_u_v2f64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: f64x2.convert_i64x2_u $push[[R:[0-9]+]]=, $0
-; SIMD128-NEXT: return $pop[[R]]
 define <2 x double> @convert_u_v2f64(<2 x i64> %x) {
   %a = uitofp <2 x i64> %x to <2 x double>
   ret <2 x double> %a
@@ -73,8 +69,6 @@ define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) {
 ; NO-SIMD128-NOT: f64x2
 ; SIMD128-VM-NOT: i64x2.trunc_sat_f64x2_s
 ; SIMD128-NEXT: .functype trunc_sat_s_v2i64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i64x2.trunc_sat_f64x2_s $push[[R:[0-9]+]]=, $0
-; SIMD128-NEXT: return $pop[[R]]
 define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
   %a = fptosi <2 x double> %x to <2 x i64>
   ret <2 x i64> %a
@@ -84,8 +78,6 @@ define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
 ; NO-SIMD128-NOT: f64x2
 ; SIMD128-VM-NOT: i64x2.trunc_sat_f64x2_u
 ; SIMD128-NEXT: .functype trunc_sat_u_v2i64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i64x2.trunc_sat_f64x2_u $push[[R:[0-9]+]]=, $0
-; SIMD128-NEXT: return $pop[[R]]
 define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
   %a = fptoui <2 x double> %x to <2 x i64>
   ret <2 x i64> %a

llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

@@ -426,28 +426,6 @@ define <2 x i64> @bitselect_v2i64(<2 x i64> %v1, <2 x i64> %v2, <2 x i64> %c) {
   ret <2 x i64> %a
 }
 
-; CHECK-LABEL: trunc_sat_s_v2i64:
-; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .functype trunc_sat_s_v2i64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i64x2.trunc_sat_f64x2_s $push[[R:[0-9]+]]=, $0
-; SIMD128-NEXT: return $pop[[R]]
-declare <2 x i64> @llvm.wasm.trunc.saturate.signed.v2i64.v2f64(<2 x double>)
-define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
-  %a = call <2 x i64> @llvm.wasm.trunc.saturate.signed.v2i64.v2f64(<2 x double> %x)
-  ret <2 x i64> %a
-}
-
-; CHECK-LABEL: trunc_sat_u_v2i64:
-; NO-SIMD128-NOT: f32x4
-; SIMD128-NEXT: .functype trunc_sat_u_v2i64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i64x2.trunc_sat_f64x2_u $push[[R:[0-9]+]]=, $0
-; SIMD128-NEXT: return $pop[[R]]
-declare <2 x i64> @llvm.wasm.trunc.saturate.unsigned.v2i64.v2f64(<2 x double>)
-define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
-  %a = call <2 x i64> @llvm.wasm.trunc.saturate.unsigned.v2i64.v2f64(<2 x double> %x)
-  ret <2 x i64> %a
-}
-
 ; ==============================================================================
 ; 4 x f32
 ; ==============================================================================

llvm/test/MC/Disassembler/WebAssembly/wasm.txt

@@ -34,19 +34,19 @@
 0xFC 0x07
 
 # CHECK: v128.const 50462976, 117835012, 185207048, 252579084
-0xFD 0x02 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
+0xFD 0x0C 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
 
 # CHECK: v8x16.shuffle 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
-0xFD 0x03 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
+0xFD 0x0D 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
 
 # Check LEB128 encoding of SIMD instructions
-# CHECK: i64x2.all_true
-0xFD 0x86 0x01
+# CHECK: i16x8.all_true
+0xFD 0x83 0x01
 
 # Including non-canonical LEB128 encodings
-# CHECK: i64x2.any_true
-# CHECK-NOT: i64.div_u
-0xFD 0x85 0x81 0x80 0x80 0x80 0x80 0x00
+# CHECK: i16x8.any_true
+# CHECK-NOT: i16x8.neg
+0xFD 0x82 0x81 0x80 0x80 0x80 0x80 0x00
 
 # Check br_table, which has its own operand type.
 # CHECK: br_table {0, 1, 2}