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The timeline_drawer fails for the parameterized crx gate. The underlying problem might be in the schedulers such as ALAP.
timeline_drawer
crx
A minimal example shows one working case, and 3 failing cases:
import numpy as np from qiskit.circuit import QuantumCircuit from qiskit.transpiler import PassManager, InstructionDurations from qiskit.transpiler.passes import ALAPScheduleAnalysis, PadDynamicalDecoupling from qiskit.visualization import timeline_drawer from qiskit.circuit.library import RXGate durations = InstructionDurations( [("reset", None, 10), ("cz", None, 120), ("cx", None, 120), ("crx", None, 160), ("rx", None, 80), ('ry', None, 80), ('rz', None, 0), ("measure", None, 30_000)] ) dd_sequence = [RXGate(np.pi/2), RXGate(np.pi/2),RXGate(np.pi/2),RXGate(np.pi/2)] #%% ALAP + DD works circ = QuantumCircuit(2) circ.rx(np.pi/2, 0) circ.rz(-np.pi/2, 0) pm = PassManager([ALAPScheduleAnalysis(durations), PadDynamicalDecoupling(durations, dd_sequence)]) circ_dd = pm.run(circ) timeline_drawer(circ_dd) # works #%% Only ALAP fails circ = QuantumCircuit(2) circ.rx(np.pi/2, 0) circ.rz(-np.pi/2, 0) pm = PassManager([ALAPScheduleAnalysis(durations)]) circ_dd = pm.run(circ) timeline_drawer(circ_dd) # fails #%% CRX fails circ = QuantumCircuit(2) circ.rx(np.pi/2, 0) circ.crx(-np.pi/2, 0, 1) pm = PassManager([ALAPScheduleAnalysis(durations), PadDynamicalDecoupling(durations, dd_sequence)]) circ_dd = pm.run(circ) timeline_drawer(circ_dd) # works #%% Different parameters for the rx circ = QuantumCircuit(2) circ.rx(0.1 * np.pi, 0) circ.barrier() circ.rx(.9*np.pi, 0) circ.barrier() pm = PassManager([ALAPScheduleAnalysis(durations), PadDynamicalDecoupling(durations, dd_sequence)]) circ_dd = pm.run(circ) timeline_drawer(circ_dd) # plots, but how can I specify the duration of the two different rx gates?
The exception generated is TypeError: '>' not supported between instances of 'int' and 'NoneType'
TypeError: '>' not supported between instances of 'int' and 'NoneType'
If the gate durations are specified, the schedulers should produce circuits that can be plotted by timeline_drawer.
No response
The text was updated successfully, but these errors were encountered:
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Environment
What is happening?
The
timeline_drawer
fails for the parameterizedcrx
gate. The underlying problem might be in the schedulers such as ALAP.How can we reproduce the issue?
A minimal example shows one working case, and 3 failing cases:
The exception generated is
TypeError: '>' not supported between instances of 'int' and 'NoneType'
What should happen?
If the gate durations are specified, the schedulers should produce circuits that can be plotted by
timeline_drawer
.Any suggestions?
No response
The text was updated successfully, but these errors were encountered: