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perfmon_skylakeX_events.txt
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perfmon_skylakeX_events.txt
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# =======================================================================================
#
# Filename: perfmon_skylakeX_events.txt
#
# Description: Event list for Intel Skylake X
#
# Version: <VERSION>
# Released: <DATE>
#
# Author: Jan Treibig (jt), jan.treibig@gmail.com
# Thomas Gruber (tr), thomas.roehl@googlemail.com
# Project: likwid
#
# Copyright (C) 2015 RRZE, University Erlangen-Nuremberg
#
# This program is free software: you can redistribute it and/or modify it under
# the terms of the GNU General Public License as published by the Free Software
# Foundation, either version 3 of the License, or (at your option) any later
# version.
#
# This program is distributed in the hope that it will be useful, but WITHOUT ANY
# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
# PARTICULAR PURPOSE. See the GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along with
# this program. If not, see <http://www.gnu.org/licenses/>.
#
# =======================================================================================
EVENT_TEMP_CORE 0x00 TMP0
UMASK_TEMP_CORE 0x00
EVENT_PWR_PKG_ENERGY 0x02 PWR0
UMASK_PWR_PKG_ENERGY 0x00
EVENT_PWR_PP0_ENERGY 0x01 PWR1
UMASK_PWR_PP0_ENERGY 0x00
EVENT_PWR_PP1_ENERGY 0x04 PWR2
UMASK_PWR_PP1_ENERGY 0x00
EVENT_PWR_DRAM_ENERGY 0x03 PWR3
UMASK_PWR_DRAM_ENERGY 0x00
EVENT_PWR_PLATFORM_ENERGY 0x05 PWR4
UMASK_PWR_PLATFORM_ENERGY 0x00
EVENT_VOLTAGE_CORE 0x00 VTG0
UMASK_VOLTAGE_CORE 0x00
EVENT_INSTR_RETIRED 0x00 FIXC0
UMASK_INSTR_RETIRED_ANY 0x00
EVENT_CPU_CLK_UNHALTED 0x00 FIXC1
UMASK_CPU_CLK_UNHALTED_CORE 0x00
EVENT_CPU_CLK_UNHALTED 0x00 FIXC2
UMASK_CPU_CLK_UNHALTED_REF 0x00
EVENT_ICACHE_16B_IFDATA_STALL 0x80 PMC
UMASK_ICACHE_16B_IFDATA_STALL 0x04
EVENT_ICACHE_64B_IFTAG 0x83 PMC
UMASK_ICACHE_64B_IFTAG_HIT 0x01
UMASK_ICACHE_64B_IFTAG_MISS 0x02
UMASK_ICACHE_64B_IFTAG_ALL 0x03
UMASK_ICACHE_64B_IFTAG_STALL 0x04
EVENT_CPU_CLOCK_UNHALTED 0x3C PMC
UMASK_CPU_CLOCK_UNHALTED_THREAD_P 0x00
DEFAULT_OPTIONS_CPU_CLOCK_UNHALTED_THREAD_P_ANY EVENT_OPTION_ANYTHREAD=1
UMASK_CPU_CLOCK_UNHALTED_THREAD_P_ANY 0x00
UMASK_CPU_CLOCK_UNHALTED_REF_XCLK 0x01
DEFAULT_OPTIONS_CPU_CLOCK_UNHALTED_REF_XCLK_ANY EVENT_OPTION_ANYTHREAD=1
UMASK_CPU_CLOCK_UNHALTED_REF_XCLK_ANY 0x01
UMASK_CPU_CLOCK_UNHALTED_ONE_THREAD_ACTIVE 0x02
DEFAULT_OPTIONS_CPU_CLOCK_UNHALTED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0x2,EVENT_OPTION_INVERT=0x1
UMASK_CPU_CLOCK_UNHALTED_TOTAL_CYCLES 0x00
EVENT_BACLEARS 0xE6 PMC
UMASK_BACLEARS_ANY 0x01
EVENT_ITLB_FLUSH 0xAE PMC
UMASK_ITLB_FLUSH 0x01
EVENT_ILD_STALL_LCP 0x87 PMC
UMASK_ILD_STALL_LCP 0x01
EVENT_IDQ_UOPS_NOT_DELIVERED 0x9C PMC
UMASK_IDQ_UOPS_NOT_DELIVERED_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_0_UOPS_DELIV_CORE EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_0_UOPS_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_1_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_1_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_2_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_2_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_3_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_3_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_FE_WAS_OK EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=0x1
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_FE_WAS_OK 0x01
EVENT_DSB2MITE_SWITCHES_PENALTY_CYCLES 0xAB PMC
UMASK_DSB2MITE_SWITCHES_PENALTY_CYCLES 0x02
EVENT_INT_MISC 0x0D PMC
UMASK_INT_MISC_RECOVERY_CYCLES 0x01
DEFAULT_OPTIONS_INT_MISC_RECOVERY_COUNT EVENT_OPTION_EDGE=1
UMASK_INT_MISC_RECOVERY_COUNT 0x01
DEFAULT_OPTIONS_INT_MISC_RECOVERY_CYCLES_ANY EVENT_OPTION_ANYTHREAD=0x1
UMASK_INT_MISC_RECOVERY_CYCLES_ANY 0x01
DEFAULT_OPTIONS_INT_MISC_RECOVERY_COUNT_ANY EVENT_OPTION_ANYTHREAD=0x1,EVENT_OPTION_EDGE=1
UMASK_INT_MISC_RECOVERY_COUNT_ANY 0x01
UMASK_INT_MISC_CLEAR_RESTEER_CYCLES 0x80
DEFAULT_OPTIONS_INT_MISC_CLEAR_RESTEER_COUNT EVENT_OPTION_EDGE=1
UMASK_INT_MISC_CLEAR_RESTEER_COUNT 0x80
EVENT_RESOURCE_STALLS 0xA2 PMC
UMASK_RESOURCE_STALLS_ANY 0x01
UMASK_RESOURCE_STALLS_SB 0x08
EVENT_PARTIAL_RAT_STALLS_SCOREBOARD 0x59 PMC
UMASK_PARTIAL_RAT_STALLS_SCOREBOARD 0x01
EVENT_UOPS_ISSUED 0x0E PMC
UMASK_UOPS_ISSUED_ANY 0x01
UMASK_UOPS_ISSUED_VECTOR_WIDTH_MISMATCH 0x02
UMASK_UOPS_ISSUED_SLOW_LEA 0x20
DEFAULT_OPTIONS_UOPS_ISSUED_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_ISSUED_USED_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_ISSUED_STALL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_ISSUED_TOTAL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_USED_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_STALL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_TOTAL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_ISSUED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_ISSUED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_ISSUED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_ISSUED_CYCLES_GE_4_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_ISSUED_CYCLES_GE_5_UOPS_EXEC 0x01
EVENT_MEMORY_DISAMBIGUATION_HISTORY_RESET 0x09 PMC
UMASK_MEMORY_DISAMBIGUATION_HISTORY_RESET 0x01
EVENT_TX_EXEC 0x5D PMC
UMASK_TX_EXEC_MISC1 0x01
UMASK_TX_EXEC_MISC2 0x02
UMASK_TX_EXEC_MISC3 0x04
UMASK_TX_EXEC_MISC4 0x08
UMASK_TX_EXEC_MISC5 0x10
EVENT_RS_EVENTS_EMPTY 0x5E PMC
UMASK_RS_EVENTS_EMPTY_CYCLES 0x01
DEFAULT_OPTIONS_RS_EVENTS_EMPTY_END EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=0x1,EVENT_OPTION_EDGE=0x1
UMASK_RS_EVENTS_EMPTY_END 0x01
EVENT_HLE_RETIRED 0xC8 PMC
UMASK_HLE_RETIRED_START 0x01
UMASK_HLE_RETIRED_COMMIT 0x02
UMASK_HLE_RETIRED_ABORTED 0x04
UMASK_HLE_RETIRED_ABORTED_MEM 0x08
UMASK_HLE_RETIRED_ABORTED_TIMER 0x10
UMASK_HLE_RETIRED_ABORTED_UNFRIENDLY 0x20
UMASK_HLE_RETIRED_ABORTED_MEMTYPE 0x40
UMASK_HLE_RETIRED_ABORTED_EVENTS 0x80
EVENT_RTM_RETIRED 0xC9 PMC
UMASK_RTM_RETIRED_START 0x01
UMASK_RTM_RETIRED_COMMIT 0x02
UMASK_RTM_RETIRED_ABORTED 0x04
UMASK_RTM_RETIRED_ABORTED_MEM 0x08
UMASK_RTM_RETIRED_ABORTED_TIMER 0x10
UMASK_RTM_RETIRED_ABORTED_UNFRIENDLY 0x20
UMASK_RTM_RETIRED_ABORTED_MEMTYPE 0x40
UMASK_RTM_RETIRED_ABORTED_EVENTS 0x80
EVENT_MACHINE_CLEARS 0xC3 PMC
DEFAULT_OPTIONS_MACHINE_CLEARS_COUNT EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=0x1
UMASK_MACHINE_CLEARS_COUNT 0x01
UMASK_MACHINE_CLEARS_MEMORY_ORDERING 0x02
UMASK_MACHINE_CLEARS_SMC 0x04
EVENT_HW_INTERRUPTS_RECEIVED 0xCB PMC
UMASK_HW_INTERRUPTS_RECEIVED 0x01
EVENT_INST_RETIRED 0xC0 PMC
UMASK_INST_RETIRED_ANY 0x00
EVENT_UOPS_RETIRED 0xC2 PMC
UMASK_UOPS_RETIRED_ALL 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_ALL EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_ALL 0x01
UMASK_UOPS_RETIRED_RETIRE_SLOTS 0x02
DEFAULT_OPTIONS_UOPS_RETIRED_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_RETIRED_USED_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_RETIRED_STALL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_RETIRED_TOTAL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_RETIRE_SLOTS EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_RETIRE_SLOTS 0x02
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_USED_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_STALL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_TOTAL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_RETIRED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_RETIRED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_RETIRED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_RETIRED_CYCLES_GE_4_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_RETIRED_CYCLES_GE_5_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_RETIRED_CYCLES_GE_6_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_7_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x7
UMASK_UOPS_RETIRED_CYCLES_GE_7_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_8_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x8
UMASK_UOPS_RETIRED_CYCLES_GE_8_UOPS_EXEC 0x01
EVENT_BR_INST_RETIRED 0xC4 PMC
UMASK_BR_INST_RETIRED_ALL_BRANCHES 0x00
UMASK_BR_INST_RETIRED_CONDITIONAL 0x01
UMASK_BR_INST_RETIRED_NEAR_CALL 0x02
UMASK_BR_INST_RETIRED_NEAR_RETURN 0x08
UMASK_BR_INST_RETIRED_NOT_TAKEN 0x10
UMASK_BR_INST_RETIRED_NEAR_TAKEN 0x20
UMASK_BR_INST_RETIRED_FAR_BRANCH 0x40
EVENT_BR_MISP_RETIRED 0xC5 PMC
UMASK_BR_MISP_RETIRED_ALL_BRANCHES 0x00
UMASK_BR_MISP_RETIRED_CONDITIONAL 0x01
UMASK_BR_MISP_RETIRED_NEAR_TAKEN 0x20
EVENT_FP_ARITH_INST_RETIRED 0xC7 PMC
UMASK_FP_ARITH_INST_RETIRED_SCALAR_DOUBLE 0x01
UMASK_FP_ARITH_INST_RETIRED_SCALAR_SINGLE 0x02
UMASK_FP_ARITH_INST_RETIRED_128B_PACKED_DOUBLE 0x04
UMASK_FP_ARITH_INST_RETIRED_128B_PACKED_SINGLE 0x08
UMASK_FP_ARITH_INST_RETIRED_256B_PACKED_DOUBLE 0x10
UMASK_FP_ARITH_INST_RETIRED_256B_PACKED_SINGLE 0x20
UMASK_FP_ARITH_INST_RETIRED_512B_PACKED_DOUBLE 0x40
UMASK_FP_ARITH_INST_RETIRED_512B_PACKED_SINGLE 0x80
UMASK_FP_ARITH_INST_RETIRED_DOUBLE 0x55
UMASK_FP_ARITH_INST_RETIRED_SINGLE 0xAA
EVENT_FP_ASSIST_ANY 0xCA PMC
DEFAULT_OPTIONS_FP_ASSIST_ANY EVENT_OPTION_THRESHOLD=0x1
UMASK_FP_ASSIST_ANY 0x1E
EVENT_MEM_INST_RETIRED 0xD0 PMC
UMASK_MEM_INST_RETIRED_STLB_MISS_LOADS 0x11
UMASK_MEM_INST_RETIRED_STLB_MISS_STORES 0x12
UMASK_MEM_INST_RETIRED_LOCK_LOADS 0x21
UMASK_MEM_INST_RETIRED_SPLIT_LOADS 0x41
UMASK_MEM_INST_RETIRED_SPLIT_STORES 0x42
UMASK_MEM_INST_RETIRED_ALL_LOADS 0x81
UMASK_MEM_INST_RETIRED_ALL_STORES 0x82
UMASK_MEM_INST_RETIRED_ALL 0x83
EVENT_MEM_LOAD_RETIRED 0xD1 PMC
UMASK_MEM_LOAD_RETIRED_L1_HIT 0x01
UMASK_MEM_LOAD_RETIRED_L2_HIT 0x02
UMASK_MEM_LOAD_RETIRED_L3_HIT 0x04
UMASK_MEM_LOAD_RETIRED_L1_MISS 0x08
UMASK_MEM_LOAD_RETIRED_L2_MISS 0x10
UMASK_MEM_LOAD_RETIRED_L3_MISS 0x20
UMASK_MEM_LOAD_RETIRED_FB_HIT 0x40
UMASK_MEM_LOAD_RETIRED_L1_ALL 0x09
UMASK_MEM_LOAD_RETIRED_L2_ALL 0x12
UMASK_MEM_LOAD_RETIRED_L3_ALL 0x24
EVENT_MEM_LOAD_L3_HIT_RETIRED 0xD2 PMC
UMASK_MEM_LOAD_L3_HIT_RETIRED_XSNP_MISS 0x01
UMASK_MEM_LOAD_L3_HIT_RETIRED_XSNP_HIT 0x02
UMASK_MEM_LOAD_L3_HIT_RETIRED_XSNP_HITM 0x04
UMASK_MEM_LOAD_L3_HIT_RETIRED_XSNP_NONE 0x08
UMASK_MEM_LOAD_L3_HIT_RETIRED_XSNP_ALL 0x0F
EVENT_MEM_LOAD_L3_MISS_RETIRED 0xD3 PMC
UMASK_MEM_LOAD_L3_MISS_RETIRED_LOCAL_DRAM 0x01
UMASK_MEM_LOAD_L3_MISS_RETIRED_REMOTE_HITM 0x04
UMASK_MEM_LOAD_L3_MISS_RETIRED_REMOTE_FWD 0x08
UMASK_MEM_LOAD_L3_MISS_RETIRED_REMOTE_ALL 0x0E
EVENT_MEM_LOAD_MISC_RETIRED 0xD4 PMC
UMASK_MEM_LOAD_MISC_RETIRED_UC 0x04
EVENT_MEM_TRANS_RETIRED 0xCD PMC
UMASK_MEM_TRANS_RETIRED_LOAD_LATENCY_GT_4 0x01 0x0 0x04
UMASK_MEM_TRANS_RETIRED_LOAD_LATENCY_GT_8 0x01 0x0 0x08
UMASK_MEM_TRANS_RETIRED_LOAD_LATENCY_GT_16 0x01 0x0 0x10
UMASK_MEM_TRANS_RETIRED_LOAD_LATENCY_GT_32 0x01 0x0 0x20
UMASK_MEM_TRANS_RETIRED_LOAD_LATENCY_GT_64 0x01 0x0 0x40
UMASK_MEM_TRANS_RETIRED_LOAD_LATENCY_GT_128 0x01 0x0 0x80
UMASK_MEM_TRANS_RETIRED_LOAD_LATENCY_GT_256 0x01 0x0 0x100
UMASK_MEM_TRANS_RETIRED_LOAD_LATENCY_GT_512 0x01 0x0 0x200
EVENT_FRONTEND_RETIRED 0xC6 PMC
UMASK_FRONTEND_RETIRED_DSB_MISS 0x01 0x00 0x11
UMASK_FRONTEND_RETIRED_L1I_MISS 0x01 0x00 0x12
UMASK_FRONTEND_RETIRED_L2_MISS 0x01 0x00 0x13
UMASK_FRONTEND_RETIRED_ITLB_MISS 0x01 0x00 0x14
UMASK_FRONTEND_RETIRED_STLB_MISS 0x01 0x00 0x15
UMASK_FRONTEND_RETIRED_LATENCY_GE_2 0x01 0x00 0x400206
UMASK_FRONTEND_RETIRED_LATENCY_GE_2_BUBBLES_GE_2 0x01 0x00 0x200206
UMASK_FRONTEND_RETIRED_LATENCY_GE_4 0x01 0x00 0x400406
EVENT_UOPS_EXECUTED 0xB1 PMC
UMASK_UOPS_EXECUTED_THREAD 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_USED_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_STALL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_TOTAL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_EXECUTED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_EXECUTED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_EXECUTED_CYCLES_GE_4_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_EXECUTED_CYCLES_GE_5_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_EXECUTED_CYCLES_GE_6_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_7_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x7
UMASK_UOPS_EXECUTED_CYCLES_GE_7_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_8_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x8
UMASK_UOPS_EXECUTED_CYCLES_GE_8_UOPS_EXEC 0x01
UMASK_UOPS_EXECUTED_CORE 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CORE_USED_CYCLES 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_CORE_STALL_CYCLES 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_CORE_TOTAL_CYCLES 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_1_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_2_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_3_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_4_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_5_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_6_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_7_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x7
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_7_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_8_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x8
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_8_UOPS_EXEC 0x02
UMASK_UOPS_EXECUTED_X87 0x10
EVENT_EXE_ACTIVITY 0xA6 PMC
UMASK_EXE_ACTIVITY_EXE_BOUND_0_PORTS 0x01
UMASK_EXE_ACTIVITY_1_PORTS_UTIL 0x02
UMASK_EXE_ACTIVITY_2_PORTS_UTIL 0x04
UMASK_EXE_ACTIVITY_3_PORTS_UTIL 0x08
UMASK_EXE_ACTIVITY_4_PORTS_UTIL 0x10
UMASK_EXE_ACTIVITY_BOUND_ON_STORES 0x40
EVENT_UOPS_DISPATCHED_PORT 0xA1 PMC
UMASK_UOPS_DISPATCHED_PORT_PORT_0 0x01
UMASK_UOPS_DISPATCHED_PORT_PORT_1 0x02
UMASK_UOPS_DISPATCHED_PORT_PORT_2 0x04
UMASK_UOPS_DISPATCHED_PORT_PORT_3 0x08
UMASK_UOPS_DISPATCHED_PORT_PORT_4 0x10
UMASK_UOPS_DISPATCHED_PORT_PORT_5 0x20
UMASK_UOPS_DISPATCHED_PORT_PORT_6 0x40
UMASK_UOPS_DISPATCHED_PORT_PORT_7 0x80
UMASK_UOPS_DISPATCHED_PORT_ARITH_PORTS 0x63
DEFAULT_OPTIONS_UOPS_DISPATCHED_PORT_ARITH_PORTS_CORE EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_DISPATCHED_PORT_ARITH_PORTS_CORE 0x63
DEFAULT_OPTIONS_UOPS_DISPATCHED_PORT_DATA_PORTS EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_DISPATCHED_PORT_DATA_PORTS 0x9C
EVENT_CYCLE_ACTIVITY 0xA3 PMC
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_TOTAL EVENT_OPTION_THRESHOLD=0x4
UMASK_CYCLE_ACTIVITY_STALLS_TOTAL 0x04
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_NO_EXECUTE EVENT_OPTION_THRESHOLD=0x4
UMASK_CYCLE_ACTIVITY_CYCLES_NO_EXECUTE 0x04
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L2_MISS EVENT_OPTION_THRESHOLD=0x1
UMASK_CYCLE_ACTIVITY_CYCLES_L2_MISS 0x01
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L2_MISS EVENT_OPTION_THRESHOLD=0x5
UMASK_CYCLE_ACTIVITY_STALLS_L2_MISS 0x05
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L2_PENDING EVENT_OPTION_THRESHOLD=0x1
UMASK_CYCLE_ACTIVITY_CYCLES_L2_PENDING 0x01
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L2_PENDING EVENT_OPTION_THRESHOLD=0x5
UMASK_CYCLE_ACTIVITY_STALLS_L2_PENDING 0x05
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L3_MISS EVENT_OPTION_THRESHOLD=0x2
UMASK_CYCLE_ACTIVITY_CYCLES_L3_MISS 0x02
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L3_MISS EVENT_OPTION_THRESHOLD=0x6
UMASK_CYCLE_ACTIVITY_STALLS_L3_MISS 0x06
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L3_PENDING EVENT_OPTION_THRESHOLD=0x2
UMASK_CYCLE_ACTIVITY_CYCLES_L3_PENDING 0x02
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L3_PENDING EVENT_OPTION_THRESHOLD=0x6
UMASK_CYCLE_ACTIVITY_STALLS_L3_PENDING 0x06
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_MEM_ANY EVENT_OPTION_THRESHOLD=0x10
UMASK_CYCLE_ACTIVITY_CYCLES_MEM_ANY 0x10
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_MEM_ANY EVENT_OPTION_THRESHOLD=0x14
UMASK_CYCLE_ACTIVITY_STALLS_MEM_ANY 0x14
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_LDM_PENDING EVENT_OPTION_THRESHOLD=0x10
UMASK_CYCLE_ACTIVITY_CYCLES_LDM_PENDING 0x10
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_LDM_PENDING EVENT_OPTION_THRESHOLD=0x14
UMASK_CYCLE_ACTIVITY_STALLS_LDM_PENDING 0x14
EVENT_CYCLE_ACTIVITY_CYCLES_L1D_MISS 0xA3 PMC
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L1D_MISS EVENT_OPTION_THRESHOLD=0x8
UMASK_CYCLE_ACTIVITY_CYCLES_L1D_MISS 0x08
EVENT_CYCLE_ACTIVITY_STALLS_L1D_MISS 0xA3 PMC
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L1D_MISS EVENT_OPTION_THRESHOLD=0xC
UMASK_CYCLE_ACTIVITY_STALLS_L1D_MISS 0x0C
EVENT_CYCLE_ACTIVITY_CYCLES_L1D_PENDING 0xA3 PMC
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L1D_PENDING EVENT_OPTION_THRESHOLD=0x8
UMASK_CYCLE_ACTIVITY_CYCLES_L1D_PENDING 0x08
EVENT_CYCLE_ACTIVITY_STALLS_L1D_PENDING 0xA3 PMC
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L1D_PENDING EVENT_OPTION_THRESHOLD=0xC
UMASK_CYCLE_ACTIVITY_STALLS_L1D_PENDING 0x0C
EVENT_EPT_WALK_PENDING 0x4F PMC
UMASK_EPT_WALK_PENDING 0x10
EVENT_ITLB_MISSES 0x85 PMC
UMASK_ITLB_MISSES_CAUSES_A_WALK 0x01
UMASK_ITLB_MISSES_WALK_PENDING 0x10
UMASK_ITLB_MISSES_STLB_HIT 0x20
UMASK_ITLB_MISSES_WALK_COMPLETED 0x0E
UMASK_ITLB_MISSES_WALK_COMPLETED_4K 0x02
UMASK_ITLB_MISSES_WALK_COMPLETED_2M_4M 0x04
UMASK_ITLB_MISSES_WALK_COMPLETED_1G 0x08
DEFAULT_OPTIONS_ITLB_MISSES_WALK_ACTIVE EVENT_OPTION_THRESHOLD=0x1
UMASK_ITLB_MISSES_WALK_ACTIVE 0x10
EVENT_DTLB_LOAD_MISSES 0x08 PMC
UMASK_DTLB_LOAD_MISSES_CAUSES_A_WALK 0x01
UMASK_DTLB_LOAD_MISSES_WALK_PENDING 0x10
UMASK_DTLB_LOAD_MISSES_STLB_HIT 0x20
UMASK_DTLB_LOAD_MISSES_WALK_COMPLETED 0x0E
UMASK_DTLB_LOAD_MISSES_WALK_COMPLETED_4K 0x02
UMASK_DTLB_LOAD_MISSES_WALK_COMPLETED_2M_4M 0x04
UMASK_DTLB_LOAD_MISSES_WALK_COMPLETED_1G 0x08
DEFAULT_OPTIONS_DTLB_LOAD_MISSES_WALK_ACTIVE EVENT_OPTION_THRESHOLD=0x1
UMASK_DTLB_LOAD_MISSES_WALK_ACTIVE 0x10
EVENT_DTLB_STORE_MISSES 0x49 PMC
UMASK_DTLB_STORE_MISSES_CAUSES_A_WALK 0x01
UMASK_DTLB_STORE_MISSES_WALK_PENDING 0x10
UMASK_DTLB_STORE_MISSES_STLB_HIT 0x20
UMASK_DTLB_STORE_MISSES_WALK_COMPLETED 0x0E
UMASK_DTLB_STORE_MISSES_WALK_COMPLETED_4K 0x02
UMASK_DTLB_STORE_MISSES_WALK_COMPLETED_2M_4M 0x04
UMASK_DTLB_STORE_MISSES_WALK_COMPLETED_1G 0x08
DEFAULT_OPTIONS_DTLB_STORE_MISSES_WALK_ACTIVE EVENT_OPTION_THRESHOLD=0x1
UMASK_DTLB_STORE_MISSES_WALK_ACTIVE 0x10
EVENT_TLB_FLUSH 0xBD PMC
UMASK_TLB_FLUSH_DTLB_THREAD 0x01
UMASK_TLB_FLUSH_STLB_ANY 0x20
EVENT_L1D 0x51 PMC
UMASK_L1D_REPLACEMENT 0x01
UMASK_L1D_M_EVICT 0x04
EVENT_TX_MEM 0x54 PMC
UMASK_TX_MEM_ABORT_CONFLICT 0x01
UMASK_TX_MEM_ABORT_CAPACITY 0x02
UMASK_TX_MEM_ABORT_HLE_STORE_TO_ELIDED_LOCK 0x04
UMASK_TX_MEM_ABORT_HLE_ELISION_BUFFER_NOT_EMPTY 0x08
UMASK_TX_MEM_ABORT_HLE_ELISION_BUFFER_MISMATCH 0x10
UMASK_TX_MEM_ABORT_HLE_ELISION_BUFFER_UNSUPPORTED_ALIGNMENT 0x20
UMASK_TX_MEM_HLE_ELISION_BUFFER_FULL 0x40
EVENT_L1D_PEND_MISS 0x48 PMC
UMASK_L1D_PEND_MISS_PENDING 0x01
UMASK_L1D_PEND_MISS_FB_FULL 0x02
DEFAULT_OPTIONS_L1D_PEND_MISS_PENDING_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_L1D_PEND_MISS_PENDING_CYCLES 0x01
DEFAULT_OPTIONS_L1D_PEND_MISS_PENDING_CYCLES_ANY EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_ANYTHREAD=0x1
UMASK_L1D_PEND_MISS_PENDING_CYCLES_ANY 0x01
EVENT_LOAD_HIT_PRE_SW_PF 0x4C PMC
UMASK_LOAD_HIT_PRE_SW_PF 0x01
EVENT_LOCK_CYCLES_CACHE_LOCK 0x63 PMC
UMASK_LOCK_CYCLES_CACHE_LOCK_DURATION 0x02
DEFAULT_OPTIONS_LOCK_CYCLES_CACHE_LOCK_COUNT EVENT_OPTION_EDGE=1
UMASK_LOCK_CYCLES_CACHE_LOCK_COUNT 0x02
EVENT_LD_BLOCKS 0x03 PMC
UMASK_LD_BLOCKS_STORE_FORWARD 0x02
UMASK_LD_BLOCKS_NO_SR 0x08
EVENT_LD_BLOCKS_PARTIAL_ADDRESS_ALIAS 0x07 PMC
UMASK_LD_BLOCKS_PARTIAL_ADDRESS_ALIAS 0x01
EVENT_OFFCORE_REQUESTS 0xB0 PMC
UMASK_OFFCORE_REQUESTS_DEMAND_DATA_RD 0x01
UMASK_OFFCORE_REQUESTS_DEMAND_CODE_RD 0x02
UMASK_OFFCORE_REQUESTS_DEMAND_RFO 0x04
UMASK_OFFCORE_REQUESTS_ALL_DATA_RD 0x08
UMASK_OFFCORE_REQUESTS_L3_MISS_DEMAND_DATA_RD 0x10
UMASK_OFFCORE_REQUESTS_ALL_REQUESTS 0x80
EVENT_OFFCORE_REQUESTS_OUTSTANDING 0x60 PMC
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_DATA_RD 0x01
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_DATA_RD_GE_6 EVENT_OPTION_THRESHOLD=0x6
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_DATA_RD_GE_6 0x01
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_CODE_RD 0x02
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_RFO 0x04
UMASK_OFFCORE_REQUESTS_OUTSTANDING_ALL_DATA_RD 0x08
UMASK_OFFCORE_REQUESTS_OUTSTANDING_L3_MISS_DEMAND_DATA_RD 0x10
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DEMAND_DATA_RD EVENT_OPTION_THRESHOLD=0x1
UMASK_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DEMAND_DATA_RD 0x01
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DATA_RD EVENT_OPTION_THRESHOLD=0x1
UMASK_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DATA_RD 0x08
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DEMAND_CODE_RD EVENT_OPTION_THRESHOLD=0x1
UMASK_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DEMAND_CODE_RD 0x02
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DEMAND_RFO EVENT_OPTION_THRESHOLD=0x1
UMASK_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DEMAND_RFO 0x04
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_L3_MISS_DEMAND_DATA_RD EVENT_OPTION_THRESHOLD=0x1
UMASK_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_L3_MISS_DEMAND_DATA_RD 0x10
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_L3_MISS_DEMAND_DATA_RD_GE_6 EVENT_OPTION_THRESHOLD=0x6
UMASK_OFFCORE_REQUESTS_OUTSTANDING_L3_MISS_DEMAND_DATA_RD_GE_6 0x10
EVENT_OFFCORE_REQUESTS_BUFFER_SQ_FULL 0xB2 PMC
UMASK_OFFCORE_REQUESTS_BUFFER_SQ_FULL 0x01
# The only officially released event is L2_TRANS_L2_WB
# All others count something but no guarantees
EVENT_L2_TRANS 0xF0 PMC
UMASK_L2_TRANS_DEMAND_DATA_RD 0x01
UMASK_L2_TRANS_RFO 0x02
UMASK_L2_TRANS_CODE_RD 0x04
UMASK_L2_TRANS_ALL_PF 0x08
UMASK_L2_TRANS_L1D_WB 0x10
UMASK_L2_TRANS_L2_FILL 0x20
UMASK_L2_TRANS_L2_WB 0x40
UMASK_L2_TRANS_ALL_REQUESTS 0x80
EVENT_LONGEST_LAT_CACHE 0x2E PMC
UMASK_LONGEST_LAT_CACHE_MISS 0x41
UMASK_LONGEST_LAT_CACHE_REFERENCE 0x4F
EVENT_L2_RQSTS 0x24 PMC
UMASK_L2_RQSTS_DEMAND_DATA_RD_MISS 0x21
UMASK_L2_RQSTS_DEMAND_DATA_RD_HIT 0x41
UMASK_L2_RQSTS_ALL_DEMAND_DATA_RD 0xE1
UMASK_L2_RQSTS_ALL_RFO 0xE2
UMASK_L2_RQSTS_ALL_CODE_RD 0xE4
UMASK_L2_RQSTS_ALL_PF 0xF8
UMASK_L2_RQSTS_PF_MISS 0x38
UMASK_L2_RQSTS_PF_HIT 0xD8
UMASK_L2_RQSTS_RFO_HIT 0x42
UMASK_L2_RQSTS_RFO_MISS 0x22
UMASK_L2_RQSTS_CODE_RD_HIT 0x44
UMASK_L2_RQSTS_CODE_RD_MISS 0x24
UMASK_L2_RQSTS_ALL_DEMAND_MISS 0x27
UMASK_L2_RQSTS_ALL_DEMAND_REFERENCES 0xE7
UMASK_L2_RQSTS_MISS 0x3F
UMASK_L2_RQSTS_REFERENCES 0xFF
EVENT_IDQ 0x79 PMC
UMASK_IDQ_MITE_UOPS 0x04
UMASK_IDQ_DSB_UOPS 0x08
UMASK_IDQ_MS_DSB_UOPS 0x10
UMASK_IDQ_MS_MITE_UOPS 0x20
UMASK_IDQ_MS_UOPS 0x30
DEFAULT_OPTIONS_IDQ_MITE_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MITE_CYCLES 0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MITE_CYCLES_1_UOPS 0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MITE_CYCLES_2_UOPS 0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MITE_CYCLES_3_UOPS 0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MITE_CYCLES_4_UOPS 0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_5_UOPS EVENT_OPTION_THRESHOLD=0x5
UMASK_IDQ_MITE_CYCLES_5_UOPS 0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_6_UOPS EVENT_OPTION_THRESHOLD=0x6
UMASK_IDQ_MITE_CYCLES_6_UOPS 0x04
DEFAULT_OPTIONS_IDQ_DSB_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_DSB_CYCLES 0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_DSB_CYCLES_1_UOPS 0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_DSB_CYCLES_2_UOPS 0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_DSB_CYCLES_3_UOPS 0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_DSB_CYCLES_4_UOPS 0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_5_UOPS EVENT_OPTION_THRESHOLD=0x5
UMASK_IDQ_DSB_CYCLES_5_UOPS 0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_6_UOPS EVENT_OPTION_THRESHOLD=0x6
UMASK_IDQ_DSB_CYCLES_6_UOPS 0x08
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_DSB_CYCLES 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_DSB_CYCLES_1_UOPS 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_DSB_CYCLES_2_UOPS 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_DSB_CYCLES_3_UOPS 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_DSB_CYCLES_4_UOPS 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_5_UOPS EVENT_OPTION_THRESHOLD=0x5
UMASK_IDQ_MS_DSB_CYCLES_5_UOPS 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_6_UOPS EVENT_OPTION_THRESHOLD=0x6
UMASK_IDQ_MS_DSB_CYCLES_6_UOPS 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_OCCUR EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_IDQ_MS_DSB_OCCUR 0x10
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_MITE_CYCLES 0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_MITE_CYCLES_1_UOPS 0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_MITE_CYCLES_2_UOPS 0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_MITE_CYCLES_3_UOPS 0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_MITE_CYCLES_4_UOPS 0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_5_UOPS EVENT_OPTION_THRESHOLD=0x5
UMASK_IDQ_MS_MITE_CYCLES_5_UOPS 0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_6_UOPS EVENT_OPTION_THRESHOLD=0x6
UMASK_IDQ_MS_MITE_CYCLES_6_UOPS 0x20
DEFAULT_OPTIONS_IDQ_MS_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_CYCLES 0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_CYCLES_1_UOPS 0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_CYCLES_2_UOPS 0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_CYCLES_3_UOPS 0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_CYCLES_4_UOPS 0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_5_UOPS EVENT_OPTION_THRESHOLD=0x5
UMASK_IDQ_MS_CYCLES_5_UOPS 0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_6_UOPS EVENT_OPTION_THRESHOLD=0x6
UMASK_IDQ_MS_CYCLES_6_UOPS 0x30
DEFAULT_OPTIONS_IDQ_MS_SWITCHES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_IDQ_MS_SWITCHES 0x30
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_ANY_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_DSB_CYCLES_ANY_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_DSB_CYCLES_1_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_DSB_CYCLES_2_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_DSB_CYCLES_3_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_DSB_CYCLES_4_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_5_UOPS EVENT_OPTION_THRESHOLD=0x5
UMASK_IDQ_ALL_DSB_CYCLES_5_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_6_UOPS EVENT_OPTION_THRESHOLD=0x6
UMASK_IDQ_ALL_DSB_CYCLES_6_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_ANY_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_MITE_CYCLES_ANY_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_MITE_CYCLES_1_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_MITE_CYCLES_2_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_MITE_CYCLES_3_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_MITE_CYCLES_4_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_5_UOPS EVENT_OPTION_THRESHOLD=0x5
UMASK_IDQ_ALL_MITE_CYCLES_5_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_6_UOPS EVENT_OPTION_THRESHOLD=0x6
UMASK_IDQ_ALL_MITE_CYCLES_6_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_ANY_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_CYCLES_ANY_UOPS 0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_CYCLES_1_UOPS 0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_CYCLES_2_UOPS 0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_CYCLES_3_UOPS 0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_CYCLES_4_UOPS 0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_5_UOPS EVENT_OPTION_THRESHOLD=0x5
UMASK_IDQ_ALL_CYCLES_5_UOPS 0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_6_UOPS EVENT_OPTION_THRESHOLD=0x6
UMASK_IDQ_ALL_CYCLES_6_UOPS 0x3C
EVENT_ROB_MISC_EVENTS_LBR_INSERTS 0xCC PMC
UMASK_ROB_MISC_EVENTS_LBR_INSERTS 0x20
# Intel released only the event L2_LINES_IN.ALL for SKX
# Since this event has the umask 0x1F, the each bit has
# a meaning, so I added the I, S and E events. I didn't
# find the meaning of the other two bits 0x08 and 0x10.
EVENT_L2_LINES_IN 0xF1 PMC
UMASK_L2_LINES_IN_I 0x01
UMASK_L2_LINES_IN_S 0x02
UMASK_L2_LINES_IN_E 0x04
UMASK_L2_LINES_IN_ALL 0x1F
EVENT_L2_LINES_OUT 0xF2 PMC
UMASK_L2_LINES_OUT_SILENT 0x01
UMASK_L2_LINES_OUT_NON_SILENT 0x02
UMASK_L2_LINES_OUT_USELESS_PREF 0x04
EVENT_SQ_MISC 0xF4 PMC
UMASK_SQ_MISC_SPLIT_LOCK 0x10
EVENT_ARITH_DIVIDER 0x14 PMC
UMASK_ARITH_DIVIDER_ACTIVE 0x01
DEFAULT_OPTIONS_ARITH_DIVIDER_COUNT EVENT_OPTION_EDGE=0x1,EVENT_OPTION_THRESHOLD=0x1
UMASK_ARITH_DIVIDER_COUNT 0x01
EVENT_LSD_UOPS 0xA8 PMC
UMASK_LSD_UOPS 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_1 EVENT_OPTION_THRESHOLD=0x1
UMASK_LSD_UOPS_CYCLES_1 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_2 EVENT_OPTION_THRESHOLD=0x2
UMASK_LSD_UOPS_CYCLES_2 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_3 EVENT_OPTION_THRESHOLD=0x3
UMASK_LSD_UOPS_CYCLES_3 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_4 EVENT_OPTION_THRESHOLD=0x4
UMASK_LSD_UOPS_CYCLES_4 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_ACTIVE EVENT_OPTION_THRESHOLD=0x01
UMASK_LSD_UOPS_CYCLES_ACTIVE 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_INACTIVE EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_LSD_UOPS_CYCLES_INACTIVE 0x01
EVENT_OTHER_ASSISTS_ANY 0xC1 PMC
UMASK_OTHER_ASSISTS_ANY 0x3F
EVENT_FRONTEND_RETIRED_LATENCY 0xC6 PMC
UMASK_FRONTEND_RETIRED_LATENCY_GE_8 0x01 0x00 0x400806
UMASK_FRONTEND_RETIRED_LATENCY_GE_16 0x01 0x00 0x401006
UMASK_FRONTEND_RETIRED_LATENCY_GE_32 0x01 0x00 0x402006
UMASK_FRONTEND_RETIRED_LATENCY_GE_64 0x01 0x00 0x404006
UMASK_FRONTEND_RETIRED_LATENCY_GE_128 0x01 0x00 0x408006
UMASK_FRONTEND_RETIRED_LATENCY_GE_256 0x01 0x00 0x410006
UMASK_FRONTEND_RETIRED_LATENCY_GE_512 0x01 0x00 0x420006
UMASK_FRONTEND_RETIRED_LATENCY_GE_2_BUBBLES_GE_1 0x01 0x00 0x100206
UMASK_FRONTEND_RETIRED_LATENCY_GE_2_BUBBLES_GE_3 0x01 0x00 0x300206
EVENT_CORE_POWER 0x28 PMC
UMASK_CORE_POWER_LVL0_TURBO_LICENSE 0x07
UMASK_CORE_POWER_LVL1_TURBO_LICENSE 0x18
UMASK_CORE_POWER_LVL2_TURBO_LICENSE 0x20
EVENT_IDI_MISC 0xFE PMC
UMASK_IDI_MISC_WB_UPGRADE 0x02
UMASK_IDI_MISC_WB_DOWNGRADE 0x04
EVENT_OFFCORE_RESPONSE_0 0xB7 PMC
OPTIONS_OFFCORE_RESPONSE_0_OPTIONS EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
UMASK_OFFCORE_RESPONSE_0_OPTIONS 0x01 0xFF 0xFF
EVENT_OFFCORE_RESPONSE_1 0xBB PMC
OPTIONS_OFFCORE_RESPONSE_1_OPTIONS EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
UMASK_OFFCORE_RESPONSE_1_OPTIONS 0x01 0xFF 0xFF
EVENT_EVENT_MSG 0x42 UBOX
UMASK_EVENT_MSG_VLW_RCVD 0x01
UMASK_EVENT_MSG_MSI_RCVD 0x02
UMASK_EVENT_MSG_IPI_RCVD 0x04
UMASK_EVENT_MSG_DOORBELL_RCVD 0x08
UMASK_EVENT_MSG_INT_PRIO 0x10
EVENT_LOCK_CYCLES 0x44 UBOX
UMASK_LOCK_CYCLES 0x00
EVENT_PHOLD_CYCLES 0x45 UBOX
UMASK_PHOLD_CYCLES_ASSERT_TO_ACK 0x01
EVENT_RACU_DRNG 0x4C UBOX
UMASK_RACU_DRNG_RDRAND 0x01
UMASK_RACU_DRNG_RDSEED 0x02
UMASK_RACU_DRNG_PFTCH_BUF_EMPTY 0x04
EVENT_RACU_REQUESTS 0x46 UBOX
UMASK_RACU_REQUESTS 0x00
EVENT_UNCORE_CLOCK 0x00 UBOXFIX
UMASK_UNCORE_CLOCK 0x00
EVENT_2LM_NM_SETCONFLICTS 0x64 CBOX
UMASK_2LM_NM_SETCONFLICTS_SF 0x01
UMASK_2LM_NM_SETCONFLICTS_LLC 0x02
UMASK_2LM_NM_SETCONFLICTS_TOR 0x04
UMASK_2LM_NM_SETCONFLICTS_TOR_REJECT 0x08
UMASK_2LM_NM_SETCONFLICTS_IODC 0x10
EVENT_SF_EVICTION 0x3D CBOX
UMASK_SF_EVICTION_M 0x01
UMASK_SF_EVICTION_E 0x02
UMASK_SF_EVICTION_S 0x04
UMASK_SF_EVICTION_ANY 0x07
EVENT_BYPASS_CHA_IMC 0x57 CBOX
UMASK_BYPASS_CHA_IMC_TAKEN 0x01
UMASK_BYPASS_CHA_IMC_INTERMEDIATE 0x02
UMASK_BYPASS_CHA_IMC_NOT_TAKEN 0x04
EVENT_CBOX_CLOCKTICKS 0x00 CBOX
UMASK_CBOX_CLOCKTICKS 0x00
EVENT_CORE_PMA 0x17 CBOX
UMASK_CORE_PMA_C1_STATE 0x01
UMASK_CORE_PMA_C1_TRANSITION 0x02
UMASK_CORE_PMA_C6_STATE 0x04
UMASK_CORE_PMA_C6_TRANSITION 0x08
UMASK_CORE_PMA_GV 0x10
EVENT_CORE_SNP 0x33 CBOX
UMASK_CORE_SNP_EXT_ONE 0x21
UMASK_CORE_SNP_EXT_GTONE 0x22
UMASK_CORE_SNP_EXT_REMOTE 0x24
UMASK_CORE_SNP_CORE_ONE 0x41
UMASK_CORE_SNP_CORE_GTONE 0x42
UMASK_CORE_SNP_CORE_REMOTE 0x44
UMASK_CORE_SNP_EVICT_ONE 0x81
UMASK_CORE_SNP_EVICT_GTONE 0x82
UMASK_CORE_SNP_EVICT_REMOTE 0x84
UMASK_CORE_SNP_ANY_ONE 0xE1
UMASK_CORE_SNP_ANY_GTONE 0xE2
UMASK_CORE_SNP_ANY_REMOTE 0xE4
EVENT_COUNTER0_OCCUPANCY 0x1F CBOX0C0|CBOX1C0|CBOX2C0|CBOX3C0|CBOX4C0|CBOX5C0|CBOX6C0|CBOX7C0|CBOX8C0|CBOX9C0|CBOX10C0|CBOX11C0|CBOX12C0|CBOX13C0|CBOX14C0|CBOX15C0|CBOX16C0|CBOX17C0|CBOX18C0|CBOX19C0|CBOX20C0|CBOX21C0|CBOX22C0|CBOX23C0|CBOX24C0|CBOX25C0|CBOX26C0|CBOX27C0
UMASK_COUNTER0_OCCUPANCY 0x00
DEFAULT_OPTIONS_COUNTER0_OCCUPANCY_COUNT EVENT_OPTION_THRESHOLD=0x01
UMASK_COUNTER0_OCCUPANCY_COUNT 0x00
EVENT_DIR_LOOKUP 0x53 CBOX
UMASK_DIR_LOOKUP_SNP 0x01
UMASK_DIR_LOOKUP_NO_SNP 0x02
EVENT_DIR_UPDATE 0x54 CBOX
UMASK_DIR_UPDATE_HA 0x01
UMASK_DIR_UPDATE_TOR 0x02
EVENT_HITME_HIT 0x5F CBOX
UMASK_HITME_HIT_EX_RDS 0x01
UMASK_HITME_HIT_SHARED_OWNREQ 0x04
UMASK_HITME_HIT_WBMTOE 0x08
UMASK_HITME_HIT_WBMTOI_OR_S 0x10
EVENT_HITME_LOOKUP 0x5E CBOX
UMASK_HITME_LOOKUP_READ 0x01
UMASK_HITME_LOOKUP_WRITE 0x02
EVENT_HITME_MISS 0x60 CBOX
UMASK_HITME_MISS_SHARED_RDINVOWN 0x20
UMASK_HITME_MISS_NOTSHARED_RDINVOWN 0x40
UMASK_HITME_MISS_READ_OR_INV 0x80
EVENT_HITME_UPDATE 0x61 CBOX
UMASK_HITME_UPDATE_DEALLOCATE_RSPFWDI_LOC 0x01
UMASK_HITME_UPDATE_RSPFWDI_REM 0x02
UMASK_HITME_UPDATE_SHARED 0x04
UMASK_HITME_UPDATE_RDINVOWN 0x08
UMASK_HITME_UPDATE_DEALLOCATE 0x10
EVENT_IMC_READS_COUNT 0x59 CBOX
UMASK_IMC_READS_COUNT_NORMAL 0x01
UMASK_IMC_READS_COUNT_PRIORITY 0x02
UMASK_IMC_READS_COUNT_ANY 0x03
EVENT_IMC_WRITES_COUNT 0x5B CBOX
UMASK_IMC_WRITES_COUNT_FULL 0x01
UMASK_IMC_WRITES_COUNT_PARTIAL 0x02
UMASK_IMC_WRITES_COUNT_FULL_PRIORITY 0x04
UMASK_IMC_WRITES_COUNT_PARTIAL_PRIORITY 0x08
UMASK_IMC_WRITES_COUNT_FULL_MIG 0x10
UMASK_IMC_WRITES_COUNT_PARTIAL_MIG 0x20
UMASK_IMC_WRITES_COUNT_ANY 0x3F
EVENT_IODC_ALLOC 0x62 CBOX
UMASK_IODC_ALLOC_INVITOM 0x01
UMASK_IODC_ALLOC_IODCFULL 0x02
UMASK_IODC_ALLOC_OSBGATED 0x04
EVENT_IODC_DEALLOC 0x63 CBOX
UMASK_IODC_DEALLOC_WBMTOE 0x01
UMASK_IODC_DEALLOC_WBMTOI 0x02
UMASK_IODC_DEALLOC_WBPUSHMTOI 0x04
UMASK_IODC_DEALLOC_SNPOUT 0x08
UMASK_IODC_DEALLOC_ALL 0x10
EVENT_LLC_LOOKUP 0x34 CBOX
OPTIONS_LLC_LOOKUP_DATA_READ EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_DATA_READ 0x03
OPTIONS_LLC_LOOKUP_WRITE EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_WRITE 0x05
OPTIONS_LLC_LOOKUP_REMOTE_SNOOP EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_REMOTE_SNOOP 0x09
OPTIONS_LLC_LOOKUP_ANY EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_ANY 0x11
OPTIONS_LLC_LOOKUP_LOCAL EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_LOCAL 0x31
OPTIONS_LLC_LOOKUP_REMOTE EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_REMOTE 0x91
EVENT_LLC_VICTIMS 0x37 CBOX
UMASK_LLC_VICTIMS_M_STATE 0x01
UMASK_LLC_VICTIMS_E_STATE 0x02
UMASK_LLC_VICTIMS_S_STATE 0x04
UMASK_LLC_VICTIMS_F_STATE 0x08
UMASK_LLC_VICTIMS_ANY_STATE 0x0F
UMASK_LLC_VICTIMS_LOCAL 0x20
UMASK_LLC_VICTIMS_REMOTE 0x80
UMASK_LLC_VICTIMS_M_LOCAL 0x21
UMASK_LLC_VICTIMS_E_LOCAL 0x22
UMASK_LLC_VICTIMS_S_LOCAL 0x24
UMASK_LLC_VICTIMS_F_LOCAL 0x28
UMASK_LLC_VICTIMS_ANY_LOCAL 0x2F
UMASK_LLC_VICTIMS_M_REMOTE 0x81
UMASK_LLC_VICTIMS_E_REMOTE 0x82
UMASK_LLC_VICTIMS_S_REMOTE 0x84
UMASK_LLC_VICTIMS_F_REMOTE 0x88
UMASK_LLC_VICTIMS_ANY_REMOTE 0x8F
UMASK_LLC_VICTIMS_M_ANY 0xA1
UMASK_LLC_VICTIMS_E_ANY 0xA2
UMASK_LLC_VICTIMS_S_ANY 0xA4
UMASK_LLC_VICTIMS_F_ANY 0xA8
UMASK_LLC_VICTIMS_ANY_ANY 0xAF
EVENT_MISC 0x39 CBOX
UMASK_MISC_RSPI_WAS_FSE 0x01
UMASK_MISC_WC_ALIASING 0x02
UMASK_MISC_RFO_HIT_S 0x08
UMASK_MISC_CVZERO_PREFETCH_VICTIM 0x10
UMASK_MISC_CVZERO_PREFETCH_MISS 0x20
EVENT_OSB_EDR 0x55 CBOX
UMASK_OSB_EDR 0x00
EVENT_READ_NO_CREDITS 0x58 CBOX
UMASK_READ_NO_CREDITS_MC0_SMI0 0x01
UMASK_READ_NO_CREDITS_MC1_SMI1 0x02
UMASK_READ_NO_CREDITS_MC_ALL 0x03
UMASK_READ_NO_CREDITS_EDC0_SMI2 0x04
UMASK_READ_NO_CREDITS_EDC1_SMI3 0x08
UMASK_READ_NO_CREDITS_EDC2_SMI4 0x10
UMASK_READ_NO_CREDITS_EDC3_SMI5 0x20
UMASK_READ_NO_CREDITS_EDC_ALL 0x3C
EVENT_WRITE_NO_CREDITS 0x5A CBOX
UMASK_WRITE_NO_CREDITS_MC0_SMI0 0x01
UMASK_WRITE_NO_CREDITS_MC1_SMI1 0x02
UMASK_WRITE_NO_CREDITS_MC_ALL 0x03
UMASK_WRITE_NO_CREDITS_EDC0_SMI2 0x04
UMASK_WRITE_NO_CREDITS_EDC1_SMI3 0x08
UMASK_WRITE_NO_CREDITS_EDC2_SMI4 0x10
UMASK_WRITE_NO_CREDITS_EDC3_SMI5 0x20
UMASK_WRITE_NO_CREDITS_EDC_ALL 0x3C
EVENT_REQUESTS 0x50 CBOX
UMASK_REQUESTS_READS_LOCAL 0x01
UMASK_REQUESTS_READS_REMOTE 0x02
UMASK_REQUESTS_READS 0x03
UMASK_REQUESTS_WRITES_LOCAL 0x04
UMASK_REQUESTS_WRITES_REMOTE 0x08
UMASK_REQUESTS_WRITES 0x0C
UMASK_REQUESTS_INVITOE_LOCAL 0x10
UMASK_REQUESTS_INVITOE_REMOTE 0x20
UMASK_REQUESTS_INVITOE 0x30
EVENT_RXC_INSERTS 0x13 CBOX
UMASK_RXC_INSERTS_IRQ 0x01
UMASK_RXC_INSERTS_IRQ_REJ 0x02
UMASK_RXC_INSERTS_IPQ 0x04
UMASK_RXC_INSERTS_PRQ 0x10
UMASK_RXC_INSERTS_PRQ_REJ 0x20
UMASK_RXC_INSERTS_RRQ 0x20
UMASK_RXC_INSERTS_WBQ 0x40
EVENT_RXC_IPQ0_REJECT 0x22 CBOX
UMASK_RXC_IPQ0_REJECT_AD_REQ_VN0 0x01
UMASK_RXC_IPQ0_REJECT_AD_RSP_VN0 0x02
UMASK_RXC_IPQ0_REJECT_BL_RSP_VN0 0x04