-
Notifications
You must be signed in to change notification settings - Fork 0
/
image_generator_tb.vhd
109 lines (105 loc) · 3.24 KB
/
image_generator_tb.vhd
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
-----Testbench file:----------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.all;
------------------------------------------------------------------------
ENTITY image_generator_tb IS
GENERIC (
Ha: INTEGER := 136; --Hpulse
Hb: INTEGER := 296; --Hpulse+HBP
Hc: INTEGER := 1320; --Hpulse+HBP+Hactive
Hd: INTEGER := 1344; --Hpulse+HBP+Hactive+HFP
Va: INTEGER := 6; --Vpulse
Vb: INTEGER := 35; --Vpulse+VBP
Vc: INTEGER := 803; --Vpulse+VBP+Vactive
Vd: INTEGER := 806); --Vpulse+VBP+Vactive+VFP
END ENTITY;
------------------------------------------------------------------------
ARCHITECTURE testbench OF image_generator_tb IS
SIGNAL red_switch_tb, green_switch_tb, blue_switch_tb: STD_LOGIC :='0';
SIGNAL clk50_tb, Hsync_tb, Vsync_tb, Hactive_tb, Vactive_tb, dena_tb: STD_LOGIC :='0';
SIGNAL R_tb, G_tb, B_tb: STD_LOGIC_VECTOR(7 DOWNTO 0);
COMPONENT image_generator IS
PORT (
red_switch, green_switch, blue_switch: IN STD_LOGIC;
clk50, Hsync, Vsync, Hactive, Vactive, dena: IN STD_LOGIC;
R, G, B: OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END COMPONENT;
BEGIN
image_gen: image_generator PORT MAP (
red_switch_tb, green_switch_tb, blue_switch_tb, clk50_tb, Hsync_tb, Vsync_tb, Hactive_tb, Vactive_tb, dena_tb, R_tb, G_tb, B_tb);
PROCESS
BEGIN
WAIT FOR 10ns;
clk50_tb <= NOT clk50_tb;
END PROCESS;
--PROCESS
---Horizontal signals generation:----
PROCESS (clk50_tb)
VARIABLE Hcount: INTEGER RANGE 0 TO Hd := 0;
BEGIN
IF(clk50_tb'EVENT AND clk50_tb='1') THEN
Hcount := Hcount +1;
IF(Hcount=Ha) THEN
Hsync_tb <='1';
ELSIF(Hcount =Hb) THEN
Hactive_tb<= '1';
ELSIF(Hcount =Hc) THEN
Hactive_tb <='0';
ELSIF(Hcount =Hd) THEN
Hsync_tb <= '0';
Hcount := 0;
END IF;
END IF;
END PROCESS;
----Vertical signals genration:-----
PROCESS (Hsync_tb)
VARIABLE Vcount: INTEGER RANGE 0 TO Vd := 0;
BEGIN
IF (Hsync_tb'EVENT AND Hsync_tb ='0') THEN
Vcount:= Vcount +1;
IF (Vcount =Va) THEN
Vsync_tb <= '1';
ELSIF(Vcount=Vb) THEN
Vactive_tb <= '1';
ELSIF(Vcount =Vc) THEN
Vactive_tb <= '0';
ElSIF(Vcount = Vd) THEN
Vsync_tb <= '0';
Vcount :=0;
END IF;
END IF;
END PROCESS;
----Display-enable genration:------
dena_tb <= Hactive_tb AND Vactive_tb;
PROCESS
BEGIN
WAIT FOR 60000ns;
red_switch_tb <= '1';
green_switch_tb <= '0';
blue_switch_tb <= '0';
WAIT FOR 30000ns;
red_switch_tb <= '0';
green_switch_tb <= '1';
blue_switch_tb <= '0';
WAIT FOR 30000ns;
red_switch_tb <= '1';
green_switch_tb <= '1';
blue_switch_tb <= '0';
WAIT FOR 30000ns;
red_switch_tb <= '0';
green_switch_tb <= '0';
blue_switch_tb <= '1';
WAIT FOR 30000ns;
red_switch_tb <= '1';
green_switch_tb <= '0';
blue_switch_tb <= '1';
WAIT FOR 30000ns;
red_switch_tb <= '0';
green_switch_tb <= '1';
blue_switch_tb <= '1';
WAIT FOR 30000ns;
red_switch_tb <= '1';
green_switch_tb <= '1';
blue_switch_tb <= '1';
END PROCESS;
END ARCHITECTURE;