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I became very interested in your work regarding SystemRDL/PeakRDL.
I am a freelancer in FPGA/ASIC design, and have a few customers that maintain separate (msword) documentation and VHDL (/verilog) register maps.
Their software (c-code) is developed, based on the hand-written word-documentation.
This is inefficient and error-prone.
I did not want to publish it on your community-contributions page of the Peak-RDL project (yet), before asking you if such a plugin-exporter would be useful and wanted.
Do you think it is useful?
If so, how can I move on?
Best Regards,
Alex Nijmeijer
The text was updated successfully, but these errors were encountered:
Hi Alex, @amykyta3
I became very interested in your work regarding SystemRDL/PeakRDL.
I am a freelancer in FPGA/ASIC design, and have a few customers that maintain separate (msword) documentation and VHDL (/verilog) register maps.
Their software (c-code) is developed, based on the hand-written word-documentation.
This is inefficient and error-prone.
To make use of your PeakRDL libraries, I was missing the option to create ms-word documents. So, I have created one.
You can find it in https://github.com/nijmeijer/PeakRDL-docx
I have also created a installable python package on test-Pypi: https://test.pypi.org/project/peakrdl-docx/
I did not want to publish it on your community-contributions page of the Peak-RDL project (yet), before asking you if such a plugin-exporter would be useful and wanted.
Do you think it is useful?
If so, how can I move on?
Best Regards,
Alex Nijmeijer
The text was updated successfully, but these errors were encountered: